| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | integratorap.dts | 17 #size-cells = <0>; 19 cpu@0 { 28 reg = <0>; 37 operating-points = <71000 0 38 66000 0 39 60000 0 40 48000 0 41 36000 0 42 24000 0 43 12000 0>; [all …]
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| H A D | ep7209.dtsi | 26 #address-cells = <0>; 27 #size-cells = <0>; 45 reg = <0x80000000 0xc000>; 51 reg = <0x80000000 0x4000>; 58 reg = <0x80000000 0x1 0x80000040 0x1>; 65 reg = <0x80000001 0x1 0x80000041 0x1>; 72 reg = <0x80000003 0x1 0x80000043 0x1>; 79 reg = <0x80000083 0x1 0x800000c3 0x1>; 86 reg = <0x80000100 0x80>; 94 reg = <0x80000180 0x80>; [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-uniphier/clk/ |
| H A D | pll-ld4.c | 24 /* set 0 to SNRT(UPLLCTRL.bit28) and K_LD(UPLLCTRL.bit[27]) */ in upll_init() 26 tmp &= ~0x18000000; in upll_init() 33 tmp &= ~0x07ffffff; in upll_init() 34 tmp |= 0x0228f5c0; in upll_init() 37 tmp &= ~0x07ffffff; in upll_init() 38 tmp |= 0x02328000; in upll_init() 45 tmp |= 0x08000000; in upll_init() 52 tmp |= 0x10000000; in upll_init() 65 tmp |= 0x00000001; in vpll_init() 68 tmp |= 0x00000001; in vpll_init() [all …]
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| H A D | pll-pro4.c | 31 tmp |= 0x00000001; in vpll_init() 34 tmp |= 0x00000001; in vpll_init() 39 tmp &= ~0x10000000; in vpll_init() 42 tmp &= ~0x10000000; in vpll_init() 45 /* Set VPLA_M and VPLB_M to 0x20 */ in vpll_init() 47 tmp &= ~0x0000007f; in vpll_init() 48 tmp |= 0x00000020; in vpll_init() 51 tmp &= ~0x0000007f; in vpll_init() 52 tmp |= 0x00000020; in vpll_init() 59 tmp &= ~0x000fffff; in vpll_init() [all …]
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| /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/ |
| H A D | t104xd4rdb.dtsi | 42 size = <0 0x1000000>; 43 alignment = <0 0x1000000>; 46 size = <0 0x400000>; 47 alignment = <0 0x400000>; 50 size = <0 0x2000000>; 51 alignment = <0 0x2000000>; 56 reg = <0xf 0xfe124000 0 0x2000>; 57 ranges = <0 0 0xf 0xe8000000 0x08000000 58 2 0 0xf 0xff800000 0x00010000 59 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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| H A D | t104xrdb.dtsi | 48 size = <0 0x1000000>; 49 alignment = <0 0x1000000>; 52 size = <0 0x400000>; 53 alignment = <0 0x400000>; 56 size = <0 0x2000000>; 57 alignment = <0 0x2000000>; 62 reg = <0xf 0xfe124000 0 0x2000>; 63 ranges = <0 0 0xf 0xe8000000 0x08000000 64 2 0 0xf 0xff800000 0x00010000 65 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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| H A D | t1023rdb.dts | 50 size = <0 0x1000000>; 51 alignment = <0 0x1000000>; 55 size = <0 0x400000>; 56 alignment = <0 0x400000>; 60 size = <0 0x2000000>; 61 alignment = <0 0x2000000>; 66 reg = <0xf 0xfe124000 0 0x2000>; 67 ranges = <0 0 0xf 0xe8000000 0x08000000 68 1 0 0xf 0xff800000 0x00010000>; 70 nor@0,0 { [all …]
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| H A D | t1024rdb.dts | 54 size = <0 0x1000000>; 55 alignment = <0 0x1000000>; 59 size = <0 0x400000>; 60 alignment = <0 0x400000>; 64 size = <0 0x2000000>; 65 alignment = <0 0x2000000>; 70 reg = <0xf 0xfe124000 0 0x2000>; 71 ranges = <0 0 0xf 0xe8000000 0x08000000 72 2 0 0xf 0xff800000 0x00010000 73 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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| H A D | t104xqds.dtsi | 74 size = <0 0x1000000>; 75 alignment = <0 0x1000000>; 78 size = <0 0x400000>; 79 alignment = <0 0x400000>; 82 size = <0 0x2000000>; 83 alignment = <0 0x2000000>; 88 reg = <0xf 0xfe124000 0 0x2000>; 89 ranges = <0 0 0xf 0xe8000000 0x08000000 90 2 0 0xf 0xff800000 0x00010000 91 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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| H A D | kmcent2.dts | 27 size = <0 0x1000000>; 28 alignment = <0 0x1000000>; 31 size = <0 0x400000>; 32 alignment = <0 0x400000>; 35 size = <0 0x2000000>; 36 alignment = <0 0x2000000>; 41 reg = <0xf 0xfe124000 0 0x2000>; 42 ranges = <0 0 0xf 0xe8000000 0x04000000 43 1 0 0xf 0xfa000000 0x00010000 44 2 0 0xf 0xfb000000 0x00010000 [all …]
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| H A D | t1024qds.dts | 50 size = <0 0x1000000>; 51 alignment = <0 0x1000000>; 55 size = <0 0x400000>; 56 alignment = <0 0x400000>; 60 size = <0 0x2000000>; 61 alignment = <0 0x2000000>; 66 reg = <0xf 0xfe124000 0 0x2000>; 67 ranges = <0 0 0xf 0xe8000000 0x08000000 68 2 0 0xf 0xff800000 0x00010000 69 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/etnaviv/ |
| H A D | common.xml.h | 7 http://0x04.net/cgit/index.cgi/rules-ng-ng 8 git clone git://0x04.net/rules-ng-ng 43 #define PIPE_ID_PIPE_3D 0x00000000 44 #define PIPE_ID_PIPE_2D 0x00000001 45 #define SYNC_RECIPIENT_FE 0x00000001 46 #define SYNC_RECIPIENT_RA 0x00000005 47 #define SYNC_RECIPIENT_PE 0x00000007 48 #define SYNC_RECIPIENT_DE 0x0000000b 49 #define SYNC_RECIPIENT_BLT 0x00000010 50 #define ENDIAN_MODE_NO_SWAP 0x00000000 [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mtd/ |
| H A D | atmel-nand.txt | 38 device (always 0) 39 3rd entry: the memory region size (always 0x800000) 77 reg = <0x70000000 0x8000000>; 82 reg = <0xffffc070 0x490>, 83 <0xffffc500 0x100>; 91 reg = <0x10000000 0x10000000 92 0x40000000 0x30000000>; 93 ranges = <0x0 0x0 0x10000000 0x10000000 94 0x1 0x0 0x40000000 0x10000000 95 0x2 0x0 0x50000000 0x10000000 [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | atmel,ebi.txt | 103 reg = <0x10000000 0x10000000 104 0x40000000 0x30000000>; 105 ranges = <0x0 0x0 0x10000000 0x10000000 106 0x1 0x0 0x40000000 0x10000000 107 0x2 0x0 0x50000000 0x10000000 108 0x3 0x0 0x60000000 0x10000000>; 112 pinctrl-0 = <&pinctrl_ebi_addr>; 114 nor: flash@0,0 { 118 reg = <0x0 0x0 0x1000000>; 124 atmel,smc-ncs-rd-setup-ns = <0>; [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | exynos5422-odroidxu3.dts | 24 reg = <0x40000000 0x10000000 25 0x50000000 0x10000000 26 0x60000000 0x10000000 27 0x70000000 0x10000000 28 0x80000000 0x10000000 29 0x90000000 0x10000000 30 0xa0000000 0x10000000 31 0xb0000000 0xea00000>; 42 reg = <0x66>; 221 regulator-name = "vdd_1.0v_ldo"; [all …]
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| /OK3568_Linux_fs/u-boot/arch/mips/include/asm/ |
| H A D | malta.h | 11 #define MALTA_GT_BASE 0x1be00000 12 #define MALTA_GT_PCIIO_BASE 0x18000000 13 #define MALTA_GT_UART0_BASE (MALTA_GT_PCIIO_BASE + 0x3f8) 15 #define MALTA_MSC01_BIU_BASE 0x1bc80000 16 #define MALTA_MSC01_PCI_BASE 0x1bd00000 17 #define MALTA_MSC01_PBC_BASE 0x1bd40000 18 #define MALTA_MSC01_IP1_BASE 0x1bc00000 19 #define MALTA_MSC01_IP1_SIZE 0x00400000 20 #define MALTA_MSC01_IP2_BASE1 0x10000000 21 #define MALTA_MSC01_IP2_SIZE1 0x08000000 [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/ti/ |
| H A D | k3-j721e.dtsi | 40 #size-cells = <0>; 54 cpu0: cpu@0 { 56 reg = <0x000>; 59 i-cache-size = <0xC000>; 62 d-cache-size = <0x8000>; 70 reg = <0x001>; 73 i-cache-size = <0xC000>; 76 d-cache-size = <0x8000>; 86 cache-size = <0x100000>; 127 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ [all …]
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| /OK3568_Linux_fs/kernel/arch/xtensa/include/asm/ |
| H A D | kmem_layout.h | 23 #define XCHAL_PAGE_TABLE_VADDR __XTENSA_UL_CONST(0x80000000) 24 #define XCHAL_PAGE_TABLE_SIZE __XTENSA_UL_CONST(0x00400000) 28 #define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xd0000000) 29 #define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xd8000000) 30 #define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x08000000) 31 #define XCHAL_KSEG_ALIGNMENT __XTENSA_UL_CONST(0x08000000) 37 #define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xb0000000) 38 #define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xc0000000) 39 #define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x10000000) 40 #define XCHAL_KSEG_ALIGNMENT __XTENSA_UL_CONST(0x10000000) [all …]
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| H A D | initialize_mmu.h | 34 #define CA_WRITEBACK (0x4) 49 movi a3, 0x25 /* For SMP/MX -- internal for writeback, 53 movi a3, 0x29 /* non-MX -- Most cores use Std Memory 71 movi a1, 0 76 1: movi a2, 0x10000000 78 #if CONFIG_KERNEL_LOAD_ADDRESS < 0x40000000ul 79 #define TEMP_MAPPING_VADDR 0x40000000 81 #define TEMP_MAPPING_VADDR 0x00000000 84 /* Step 1: invalidate mapping at 0x40000000..0x5FFFFFFF. */ 91 /* Step 2: map 0x40000000..0x47FFFFFF to paddr containing this code [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/stm32/ |
| H A D | st,mlahb.yaml | 61 reg = <0x10000000 0x40000>; 63 dma-ranges = <0x00000000 0x38000000 0x10000>, 64 <0x10000000 0x10000000 0x60000>, 65 <0x30000000 0x30000000 0x60000>; 68 reg = <0x10000000 0x40000>;
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| /OK3568_Linux_fs/u-boot/board/terasic/de1-soc/qts/ |
| H A D | iocsr_config.h | 16 0x00000000, 17 0x00000000, 18 0x0FF00000, 19 0xC0000000, 20 0x0000003F, 21 0x00008000, 22 0x00060180, 23 0x18060000, 24 0x18000000, 25 0x00018060, [all …]
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| /OK3568_Linux_fs/u-boot/board/terasic/de0-nano-soc/qts/ |
| H A D | iocsr_config.h | 16 0x00000000, 17 0x00000000, 18 0x0FF00000, 19 0xC0000000, 20 0x0000003F, 21 0x00008000, 22 0x00020080, 23 0x18060000, 24 0x08000000, 25 0x00018020, [all …]
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| /OK3568_Linux_fs/u-boot/board/terasic/de10-nano/qts/ |
| H A D | iocsr_config.h | 16 0x00000000, 17 0x00000000, 18 0x0FF00000, 19 0xC0000000, 20 0x0000003F, 21 0x00008000, 22 0x00020080, 23 0x18060000, 24 0x08000000, 25 0x00018020, [all …]
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| /OK3568_Linux_fs/u-boot/board/freescale/mpc8541cds/ |
| H A D | tlb.c | 14 /* TLB 0 - for temp stack in cache */ 15 SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR, 16 MAS3_SX|MAS3_SW|MAS3_SR, 0, 17 0, 0, BOOKE_PAGESZ_4K, 0), 18 SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024 , CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, 19 MAS3_SX|MAS3_SW|MAS3_SR, 0, 20 0, 0, BOOKE_PAGESZ_4K, 0), 21 SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024 , CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, 22 MAS3_SX|MAS3_SW|MAS3_SR, 0, 23 0, 0, BOOKE_PAGESZ_4K, 0), [all …]
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| /OK3568_Linux_fs/u-boot/board/freescale/mpc8555cds/ |
| H A D | tlb.c | 14 /* TLB 0 - for temp stack in cache */ 15 SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR, 16 MAS3_SX|MAS3_SW|MAS3_SR, 0, 17 0, 0, BOOKE_PAGESZ_4K, 0), 18 SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024 , CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, 19 MAS3_SX|MAS3_SW|MAS3_SR, 0, 20 0, 0, BOOKE_PAGESZ_4K, 0), 21 SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024 , CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, 22 MAS3_SX|MAS3_SW|MAS3_SR, 0, 23 0, 0, BOOKE_PAGESZ_4K, 0), [all …]
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