xref: /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/t1024qds.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * T1024 QDS Device Tree Source
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright 2014 Freescale Semiconductor Inc.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without
7*4882a593Smuzhiyun * modification, are permitted provided that the following conditions are met:
8*4882a593Smuzhiyun *     * Redistributions of source code must retain the above copyright
9*4882a593Smuzhiyun *	 notice, this list of conditions and the following disclaimer.
10*4882a593Smuzhiyun *     * Redistributions in binary form must reproduce the above copyright
11*4882a593Smuzhiyun *	 notice, this list of conditions and the following disclaimer in the
12*4882a593Smuzhiyun *	 documentation and/or other materials provided with the distribution.
13*4882a593Smuzhiyun *     * Neither the name of Freescale Semiconductor nor the
14*4882a593Smuzhiyun *	 names of its contributors may be used to endorse or promote products
15*4882a593Smuzhiyun *	 derived from this software without specific prior written permission.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * ALTERNATIVELY, this software may be distributed under the terms of the
19*4882a593Smuzhiyun * GNU General Public License ("GPL") as published by the Free Software
20*4882a593Smuzhiyun * Foundation, either version 2 of that License or (at your option) any
21*4882a593Smuzhiyun * later version.
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24*4882a593Smuzhiyun * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25*4882a593Smuzhiyun * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26*4882a593Smuzhiyun * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27*4882a593Smuzhiyun * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28*4882a593Smuzhiyun * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29*4882a593Smuzhiyun * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30*4882a593Smuzhiyun * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32*4882a593Smuzhiyun * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33*4882a593Smuzhiyun */
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun/include/ "t102xsi-pre.dtsi"
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun/ {
38*4882a593Smuzhiyun	model = "fsl,T1024QDS";
39*4882a593Smuzhiyun	compatible = "fsl,T1024QDS";
40*4882a593Smuzhiyun	#address-cells = <2>;
41*4882a593Smuzhiyun	#size-cells = <2>;
42*4882a593Smuzhiyun	interrupt-parent = <&mpic>;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun	reserved-memory {
45*4882a593Smuzhiyun		#address-cells = <2>;
46*4882a593Smuzhiyun		#size-cells = <2>;
47*4882a593Smuzhiyun		ranges;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun		bman_fbpr: bman-fbpr {
50*4882a593Smuzhiyun			size = <0 0x1000000>;
51*4882a593Smuzhiyun			alignment = <0 0x1000000>;
52*4882a593Smuzhiyun		};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun		qman_fqd: qman-fqd {
55*4882a593Smuzhiyun			size = <0 0x400000>;
56*4882a593Smuzhiyun			alignment = <0 0x400000>;
57*4882a593Smuzhiyun		};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun		qman_pfdr: qman-pfdr {
60*4882a593Smuzhiyun			size = <0 0x2000000>;
61*4882a593Smuzhiyun			alignment = <0 0x2000000>;
62*4882a593Smuzhiyun		};
63*4882a593Smuzhiyun	};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun	ifc: localbus@ffe124000 {
66*4882a593Smuzhiyun		reg = <0xf 0xfe124000 0 0x2000>;
67*4882a593Smuzhiyun		ranges = <0 0 0xf 0xe8000000 0x08000000
68*4882a593Smuzhiyun			  2 0 0xf 0xff800000 0x00010000
69*4882a593Smuzhiyun			  3 0 0xf 0xffdf0000 0x00008000>;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun		nor@0,0 {
72*4882a593Smuzhiyun			#address-cells = <1>;
73*4882a593Smuzhiyun			#size-cells = <1>;
74*4882a593Smuzhiyun			compatible = "cfi-flash";
75*4882a593Smuzhiyun			reg = <0x0 0x0 0x8000000>;
76*4882a593Smuzhiyun			bank-width = <2>;
77*4882a593Smuzhiyun			device-width = <1>;
78*4882a593Smuzhiyun		};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun		nand@2,0 {
81*4882a593Smuzhiyun			#address-cells = <1>;
82*4882a593Smuzhiyun			#size-cells = <1>;
83*4882a593Smuzhiyun			compatible = "fsl,ifc-nand";
84*4882a593Smuzhiyun			reg = <0x2 0x0 0x10000>;
85*4882a593Smuzhiyun		};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun		board-control@3,0 {
88*4882a593Smuzhiyun			#address-cells = <1>;
89*4882a593Smuzhiyun			#size-cells = <1>;
90*4882a593Smuzhiyun			compatible = "fsl,tetra-fpga", "fsl,fpga-qixis";
91*4882a593Smuzhiyun			reg = <3 0 0x300>;
92*4882a593Smuzhiyun			ranges = <0 3 0 0x300>;
93*4882a593Smuzhiyun		};
94*4882a593Smuzhiyun	};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun	memory {
97*4882a593Smuzhiyun		device_type = "memory";
98*4882a593Smuzhiyun	};
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun	dcsr: dcsr@f00000000 {
101*4882a593Smuzhiyun		ranges = <0x00000000 0xf 0x00000000 0x01072000>;
102*4882a593Smuzhiyun	};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun	bportals: bman-portals@ff4000000 {
105*4882a593Smuzhiyun		ranges = <0x0 0xf 0xf4000000 0x2000000>;
106*4882a593Smuzhiyun	};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun	qportals: qman-portals@ff6000000 {
109*4882a593Smuzhiyun		ranges = <0x0 0xf 0xf6000000 0x2000000>;
110*4882a593Smuzhiyun	};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun	soc: soc@ffe000000 {
113*4882a593Smuzhiyun		ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
114*4882a593Smuzhiyun		reg = <0xf 0xfe000000 0 0x00001000>;
115*4882a593Smuzhiyun		spi@110000 {
116*4882a593Smuzhiyun			flash@0 {
117*4882a593Smuzhiyun				#address-cells = <1>;
118*4882a593Smuzhiyun				#size-cells = <1>;
119*4882a593Smuzhiyun				compatible = "micron,n25q128a11", "jedec,spi-nor";  /* 16MB */
120*4882a593Smuzhiyun				reg = <0>;
121*4882a593Smuzhiyun				spi-max-frequency = <10000000>;
122*4882a593Smuzhiyun			};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun			flash@1 {
125*4882a593Smuzhiyun				#address-cells = <1>;
126*4882a593Smuzhiyun				#size-cells = <1>;
127*4882a593Smuzhiyun				compatible = "sst,sst25wf040", "jedec,spi-nor";  /* 512KB */
128*4882a593Smuzhiyun				reg = <1>;
129*4882a593Smuzhiyun				spi-max-frequency = <10000000>;
130*4882a593Smuzhiyun			};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun			flash@2 {
133*4882a593Smuzhiyun				#address-cells = <1>;
134*4882a593Smuzhiyun				#size-cells = <1>;
135*4882a593Smuzhiyun				compatible = "eon,en25s64", "jedec,spi-nor";   /* 8MB */
136*4882a593Smuzhiyun				reg = <2>;
137*4882a593Smuzhiyun				spi-max-frequency = <10000000>;
138*4882a593Smuzhiyun			};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun			slic@2 {
141*4882a593Smuzhiyun				compatible = "maxim,ds26522";
142*4882a593Smuzhiyun				reg = <2>;
143*4882a593Smuzhiyun				spi-max-frequency = <2000000>;
144*4882a593Smuzhiyun			};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun			slic@3 {
147*4882a593Smuzhiyun				compatible = "maxim,ds26522";
148*4882a593Smuzhiyun				reg = <3>;
149*4882a593Smuzhiyun				spi-max-frequency = <2000000>;
150*4882a593Smuzhiyun			};
151*4882a593Smuzhiyun		};
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun		i2c@118000 {
154*4882a593Smuzhiyun			pca9547@77 {
155*4882a593Smuzhiyun				compatible = "nxp,pca9547";
156*4882a593Smuzhiyun				reg = <0x77>;
157*4882a593Smuzhiyun				#address-cells = <1>;
158*4882a593Smuzhiyun				#size-cells = <0>;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun				i2c@0 {
161*4882a593Smuzhiyun					#address-cells = <1>;
162*4882a593Smuzhiyun					#size-cells = <0>;
163*4882a593Smuzhiyun					reg = <0x0>;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun					eeprom@50 {
166*4882a593Smuzhiyun						compatible = "atmel,24c512";
167*4882a593Smuzhiyun						reg = <0x50>;
168*4882a593Smuzhiyun					};
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun					eeprom@51 {
171*4882a593Smuzhiyun						compatible = "atmel,24c02";
172*4882a593Smuzhiyun						reg = <0x51>;
173*4882a593Smuzhiyun					};
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun					eeprom@57 {
176*4882a593Smuzhiyun						compatible = "atmel,24c02";
177*4882a593Smuzhiyun						reg = <0x57>;
178*4882a593Smuzhiyun					};
179*4882a593Smuzhiyun				};
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun				i2c@2 {
182*4882a593Smuzhiyun					#address-cells = <1>;
183*4882a593Smuzhiyun					#size-cells = <0>;
184*4882a593Smuzhiyun					reg = <0x2>;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun					ina220@40 {
187*4882a593Smuzhiyun						compatible = "ti,ina220";
188*4882a593Smuzhiyun						reg = <0x40>;
189*4882a593Smuzhiyun						shunt-resistor = <1000>;
190*4882a593Smuzhiyun					};
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun					ina220@41 {
193*4882a593Smuzhiyun						compatible = "ti,ina220";
194*4882a593Smuzhiyun						reg = <0x41>;
195*4882a593Smuzhiyun						shunt-resistor = <1000>;
196*4882a593Smuzhiyun					};
197*4882a593Smuzhiyun				};
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun				i2c@3 {
200*4882a593Smuzhiyun					#address-cells = <1>;
201*4882a593Smuzhiyun					#size-cells = <0>;
202*4882a593Smuzhiyun					reg = <0x3>;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun					adt7461@4c {
205*4882a593Smuzhiyun						/* Thermal Monitor */
206*4882a593Smuzhiyun						compatible = "adi,adt7461";
207*4882a593Smuzhiyun						reg = <0x4c>;
208*4882a593Smuzhiyun					};
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun					eeprom@55 {
211*4882a593Smuzhiyun						compatible = "atmel,24c02";
212*4882a593Smuzhiyun						reg = <0x55>;
213*4882a593Smuzhiyun					};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun					eeprom@56 {
216*4882a593Smuzhiyun						compatible = "atmel,24c512";
217*4882a593Smuzhiyun						reg = <0x56>;
218*4882a593Smuzhiyun					};
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun					eeprom@57 {
221*4882a593Smuzhiyun						compatible = "atmel,24c512";
222*4882a593Smuzhiyun						reg = <0x57>;
223*4882a593Smuzhiyun					};
224*4882a593Smuzhiyun				};
225*4882a593Smuzhiyun			};
226*4882a593Smuzhiyun			rtc@68 {
227*4882a593Smuzhiyun				compatible = "dallas,ds3232";
228*4882a593Smuzhiyun				reg = <0x68>;
229*4882a593Smuzhiyun				interrupts = <0x5 0x1 0 0>;
230*4882a593Smuzhiyun			};
231*4882a593Smuzhiyun		};
232*4882a593Smuzhiyun	};
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun	pci0: pcie@ffe240000 {
235*4882a593Smuzhiyun		reg = <0xf 0xfe240000 0 0x10000>;
236*4882a593Smuzhiyun		ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0 0x10000000
237*4882a593Smuzhiyun			  0x01000000 0 0x00000000 0xf 0xf8000000 0 0x00010000>;
238*4882a593Smuzhiyun		pcie@0 {
239*4882a593Smuzhiyun			ranges = <0x02000000 0 0xe0000000
240*4882a593Smuzhiyun				  0x02000000 0 0xe0000000
241*4882a593Smuzhiyun				  0 0x10000000
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun				  0x01000000 0 0x00000000
244*4882a593Smuzhiyun				  0x01000000 0 0x00000000
245*4882a593Smuzhiyun				  0 0x00010000>;
246*4882a593Smuzhiyun		};
247*4882a593Smuzhiyun	};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun	pci1: pcie@ffe250000 {
250*4882a593Smuzhiyun		reg = <0xf 0xfe250000 0 0x10000>;
251*4882a593Smuzhiyun		ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000
252*4882a593Smuzhiyun			  0x01000000 0 0x00000000 0xf 0xf8010000 0 0x00010000>;
253*4882a593Smuzhiyun		pcie@0 {
254*4882a593Smuzhiyun			ranges = <0x02000000 0 0xe0000000
255*4882a593Smuzhiyun				  0x02000000 0 0xe0000000
256*4882a593Smuzhiyun				  0 0x10000000
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun				  0x01000000 0 0x00000000
259*4882a593Smuzhiyun				  0x01000000 0 0x00000000
260*4882a593Smuzhiyun				  0 0x00010000>;
261*4882a593Smuzhiyun		};
262*4882a593Smuzhiyun	};
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun	pci2: pcie@ffe260000 {
265*4882a593Smuzhiyun		reg = <0xf 0xfe260000 0 0x10000>;
266*4882a593Smuzhiyun		ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
267*4882a593Smuzhiyun			  0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
268*4882a593Smuzhiyun		pcie@0 {
269*4882a593Smuzhiyun			ranges = <0x02000000 0 0xe0000000
270*4882a593Smuzhiyun				  0x02000000 0 0xe0000000
271*4882a593Smuzhiyun				  0 0x10000000
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun				  0x01000000 0 0x00000000
274*4882a593Smuzhiyun				  0x01000000 0 0x00000000
275*4882a593Smuzhiyun				  0 0x00010000>;
276*4882a593Smuzhiyun		};
277*4882a593Smuzhiyun	};
278*4882a593Smuzhiyun};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun#include "t1024si-post.dtsi"
281