1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * T1023 RDB Device Tree Source 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright 2014 Freescale Semiconductor Inc. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without 7*4882a593Smuzhiyun * modification, are permitted provided that the following conditions are met: 8*4882a593Smuzhiyun * * Redistributions of source code must retain the above copyright 9*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer. 10*4882a593Smuzhiyun * * Redistributions in binary form must reproduce the above copyright 11*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer in the 12*4882a593Smuzhiyun * documentation and/or other materials provided with the distribution. 13*4882a593Smuzhiyun * * Neither the name of Freescale Semiconductor nor the 14*4882a593Smuzhiyun * names of its contributors may be used to endorse or promote products 15*4882a593Smuzhiyun * derived from this software without specific prior written permission. 16*4882a593Smuzhiyun * 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * ALTERNATIVELY, this software may be distributed under the terms of the 19*4882a593Smuzhiyun * GNU General Public License ("GPL") as published by the Free Software 20*4882a593Smuzhiyun * Foundation, either version 2 of that License or (at your option) any 21*4882a593Smuzhiyun * later version. 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY 24*4882a593Smuzhiyun * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25*4882a593Smuzhiyun * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26*4882a593Smuzhiyun * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27*4882a593Smuzhiyun * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28*4882a593Smuzhiyun * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29*4882a593Smuzhiyun * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30*4882a593Smuzhiyun * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32*4882a593Smuzhiyun * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33*4882a593Smuzhiyun */ 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun/include/ "t102xsi-pre.dtsi" 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun/ { 38*4882a593Smuzhiyun model = "fsl,T1023RDB"; 39*4882a593Smuzhiyun compatible = "fsl,T1023RDB"; 40*4882a593Smuzhiyun #address-cells = <2>; 41*4882a593Smuzhiyun #size-cells = <2>; 42*4882a593Smuzhiyun interrupt-parent = <&mpic>; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun reserved-memory { 45*4882a593Smuzhiyun #address-cells = <2>; 46*4882a593Smuzhiyun #size-cells = <2>; 47*4882a593Smuzhiyun ranges; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun bman_fbpr: bman-fbpr { 50*4882a593Smuzhiyun size = <0 0x1000000>; 51*4882a593Smuzhiyun alignment = <0 0x1000000>; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun qman_fqd: qman-fqd { 55*4882a593Smuzhiyun size = <0 0x400000>; 56*4882a593Smuzhiyun alignment = <0 0x400000>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun qman_pfdr: qman-pfdr { 60*4882a593Smuzhiyun size = <0 0x2000000>; 61*4882a593Smuzhiyun alignment = <0 0x2000000>; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun ifc: localbus@ffe124000 { 66*4882a593Smuzhiyun reg = <0xf 0xfe124000 0 0x2000>; 67*4882a593Smuzhiyun ranges = <0 0 0xf 0xe8000000 0x08000000 68*4882a593Smuzhiyun 1 0 0xf 0xff800000 0x00010000>; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun nor@0,0 { 71*4882a593Smuzhiyun #address-cells = <1>; 72*4882a593Smuzhiyun #size-cells = <1>; 73*4882a593Smuzhiyun status = "disabled"; 74*4882a593Smuzhiyun compatible = "cfi-flash"; 75*4882a593Smuzhiyun reg = <0x0 0x0 0x8000000>; 76*4882a593Smuzhiyun bank-width = <2>; 77*4882a593Smuzhiyun device-width = <1>; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun nand@1,0 { 81*4882a593Smuzhiyun #address-cells = <1>; 82*4882a593Smuzhiyun #size-cells = <1>; 83*4882a593Smuzhiyun compatible = "fsl,ifc-nand"; 84*4882a593Smuzhiyun reg = <0x1 0x0 0x10000>; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun memory { 89*4882a593Smuzhiyun device_type = "memory"; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun dcsr: dcsr@f00000000 { 93*4882a593Smuzhiyun ranges = <0x00000000 0xf 0x00000000 0x01072000>; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun bportals: bman-portals@ff4000000 { 97*4882a593Smuzhiyun ranges = <0x0 0xf 0xf4000000 0x2000000>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun qportals: qman-portals@ff6000000 { 101*4882a593Smuzhiyun ranges = <0x0 0xf 0xf6000000 0x2000000>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun soc: soc@ffe000000 { 105*4882a593Smuzhiyun ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 106*4882a593Smuzhiyun reg = <0xf 0xfe000000 0 0x00001000>; 107*4882a593Smuzhiyun spi@110000 { 108*4882a593Smuzhiyun flash@0 { 109*4882a593Smuzhiyun #address-cells = <1>; 110*4882a593Smuzhiyun #size-cells = <1>; 111*4882a593Smuzhiyun compatible = "spansion,s25fl512s", "jedec,spi-nor"; 112*4882a593Smuzhiyun reg = <0>; 113*4882a593Smuzhiyun spi-max-frequency = <10000000>; /* input clk */ 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun i2c@118000 { 118*4882a593Smuzhiyun eeprom@50 { 119*4882a593Smuzhiyun compatible = "st,m24256"; 120*4882a593Smuzhiyun reg = <0x50>; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun rtc@68 { 124*4882a593Smuzhiyun compatible = "dallas,ds1339"; 125*4882a593Smuzhiyun reg = <0x68>; 126*4882a593Smuzhiyun interrupts = <0x5 0x1 0 0>; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun i2c@118100 { 131*4882a593Smuzhiyun current-sensor@40 { 132*4882a593Smuzhiyun compatible = "ti,ina220"; 133*4882a593Smuzhiyun reg = <0x40>; 134*4882a593Smuzhiyun shunt-resistor = <1000>; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun current-sensor@41 { 138*4882a593Smuzhiyun compatible = "ti,ina220"; 139*4882a593Smuzhiyun reg = <0x41>; 140*4882a593Smuzhiyun shunt-resistor = <1000>; 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun }; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun fman@400000 { 145*4882a593Smuzhiyun fm1mac1: ethernet@e0000 { 146*4882a593Smuzhiyun phy-handle = <&sgmii_rtk_phy2>; 147*4882a593Smuzhiyun phy-connection-type = "sgmii"; 148*4882a593Smuzhiyun sleep = <&rcpm 0x80000000>; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun fm1mac2: ethernet@e2000 { 152*4882a593Smuzhiyun sleep = <&rcpm 0x40000000>; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun fm1mac3: ethernet@e4000 { 156*4882a593Smuzhiyun phy-handle = <&sgmii_aqr_phy3>; 157*4882a593Smuzhiyun phy-connection-type = "2500base-x"; 158*4882a593Smuzhiyun sleep = <&rcpm 0x20000000>; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun fm1mac4: ethernet@e6000 { 162*4882a593Smuzhiyun phy-handle = <&rgmii_rtk_phy1>; 163*4882a593Smuzhiyun phy-connection-type = "rgmii"; 164*4882a593Smuzhiyun sleep = <&rcpm 0x10000000>; 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun mdio0: mdio@fc000 { 169*4882a593Smuzhiyun rgmii_rtk_phy1: ethernet-phy@1 { 170*4882a593Smuzhiyun reg = <0x1>; 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun sgmii_rtk_phy2: ethernet-phy@3 { 173*4882a593Smuzhiyun reg = <0x3>; 174*4882a593Smuzhiyun }; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun xmdio0: mdio@fd000 { 178*4882a593Smuzhiyun sgmii_aqr_phy3: ethernet-phy@2 { 179*4882a593Smuzhiyun compatible = "ethernet-phy-ieee802.3-c45"; 180*4882a593Smuzhiyun reg = <0x2>; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun pci0: pcie@ffe240000 { 187*4882a593Smuzhiyun reg = <0xf 0xfe240000 0 0x10000>; 188*4882a593Smuzhiyun ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0 0x10000000 189*4882a593Smuzhiyun 0x01000000 0 0x00000000 0xf 0xf8000000 0 0x00010000>; 190*4882a593Smuzhiyun pcie@0 { 191*4882a593Smuzhiyun ranges = <0x02000000 0 0xe0000000 192*4882a593Smuzhiyun 0x02000000 0 0xe0000000 193*4882a593Smuzhiyun 0 0x10000000 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun 0x01000000 0 0x00000000 196*4882a593Smuzhiyun 0x01000000 0 0x00000000 197*4882a593Smuzhiyun 0 0x00010000>; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun }; 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun pci1: pcie@ffe250000 { 202*4882a593Smuzhiyun reg = <0xf 0xfe250000 0 0x10000>; 203*4882a593Smuzhiyun ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000 204*4882a593Smuzhiyun 0x01000000 0 0x00000000 0xf 0xf8010000 0 0x00010000>; 205*4882a593Smuzhiyun pcie@0 { 206*4882a593Smuzhiyun ranges = <0x02000000 0 0xe0000000 207*4882a593Smuzhiyun 0x02000000 0 0xe0000000 208*4882a593Smuzhiyun 0 0x10000000 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun 0x01000000 0 0x00000000 211*4882a593Smuzhiyun 0x01000000 0 0x00000000 212*4882a593Smuzhiyun 0 0x00010000>; 213*4882a593Smuzhiyun }; 214*4882a593Smuzhiyun }; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun pci2: pcie@ffe260000 { 217*4882a593Smuzhiyun reg = <0xf 0xfe260000 0 0x10000>; 218*4882a593Smuzhiyun ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000 219*4882a593Smuzhiyun 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; 220*4882a593Smuzhiyun pcie@0 { 221*4882a593Smuzhiyun ranges = <0x02000000 0 0xe0000000 222*4882a593Smuzhiyun 0x02000000 0 0xe0000000 223*4882a593Smuzhiyun 0 0x10000000 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun 0x01000000 0 0x00000000 226*4882a593Smuzhiyun 0x01000000 0 0x00000000 227*4882a593Smuzhiyun 0 0x00010000>; 228*4882a593Smuzhiyun }; 229*4882a593Smuzhiyun }; 230*4882a593Smuzhiyun}; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun#include "t1023si-post.dtsi" 233