xref: /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/kmcent2.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Keymile kmcent2 Device Tree Source, based on T1040RDB DTS
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * (C) Copyright 2016
6*4882a593Smuzhiyun * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Copyright 2014 - 2015 Freescale Semiconductor Inc.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/include/ "t104xsi-pre.dtsi"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun/ {
14*4882a593Smuzhiyun	model = "keymile,kmcent2";
15*4882a593Smuzhiyun	compatible = "keymile,kmcent2";
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	aliases {
18*4882a593Smuzhiyun		front_phy = &front_phy;
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	reserved-memory {
22*4882a593Smuzhiyun		#address-cells = <2>;
23*4882a593Smuzhiyun		#size-cells = <2>;
24*4882a593Smuzhiyun		ranges;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun		bman_fbpr: bman-fbpr {
27*4882a593Smuzhiyun			size = <0 0x1000000>;
28*4882a593Smuzhiyun			alignment = <0 0x1000000>;
29*4882a593Smuzhiyun		};
30*4882a593Smuzhiyun		qman_fqd: qman-fqd {
31*4882a593Smuzhiyun			size = <0 0x400000>;
32*4882a593Smuzhiyun			alignment = <0 0x400000>;
33*4882a593Smuzhiyun		};
34*4882a593Smuzhiyun		qman_pfdr: qman-pfdr {
35*4882a593Smuzhiyun			size = <0 0x2000000>;
36*4882a593Smuzhiyun			alignment = <0 0x2000000>;
37*4882a593Smuzhiyun		};
38*4882a593Smuzhiyun	};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun	ifc: localbus@ffe124000 {
41*4882a593Smuzhiyun		reg = <0xf 0xfe124000 0 0x2000>;
42*4882a593Smuzhiyun		ranges = <0 0 0xf 0xe8000000 0x04000000
43*4882a593Smuzhiyun			  1 0 0xf 0xfa000000 0x00010000
44*4882a593Smuzhiyun			  2 0 0xf 0xfb000000 0x00010000
45*4882a593Smuzhiyun			  4 0 0xf 0xc0000000 0x08000000
46*4882a593Smuzhiyun			  6 0 0xf 0xd0000000 0x08000000
47*4882a593Smuzhiyun			  7 0 0xf 0xd8000000 0x08000000>;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun		nor@0,0 {
50*4882a593Smuzhiyun			#address-cells = <1>;
51*4882a593Smuzhiyun			#size-cells = <1>;
52*4882a593Smuzhiyun			compatible = "cfi-flash";
53*4882a593Smuzhiyun			reg = <0x0 0x0 0x04000000>;
54*4882a593Smuzhiyun			bank-width = <2>;
55*4882a593Smuzhiyun			device-width = <2>;
56*4882a593Smuzhiyun		};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun		nand@1,0 {
59*4882a593Smuzhiyun			#address-cells = <1>;
60*4882a593Smuzhiyun			#size-cells = <1>;
61*4882a593Smuzhiyun			compatible = "fsl,ifc-nand";
62*4882a593Smuzhiyun			reg = <0x1 0x0 0x10000>;
63*4882a593Smuzhiyun		};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun		board-control@2,0 {
66*4882a593Smuzhiyun			compatible = "keymile,qriox";
67*4882a593Smuzhiyun			reg = <0x2 0x0 0x80>;
68*4882a593Smuzhiyun		};
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun		chassis-mgmt@6,0 {
71*4882a593Smuzhiyun			compatible = "keymile,bfticu";
72*4882a593Smuzhiyun			reg = <6 0 0x100>;
73*4882a593Smuzhiyun			interrupt-controller;
74*4882a593Smuzhiyun			interrupt-parent = <&mpic>;
75*4882a593Smuzhiyun			interrupts = <11 1 0 0>;
76*4882a593Smuzhiyun			#interrupt-cells = <1>;
77*4882a593Smuzhiyun		};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun	};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun	memory {
82*4882a593Smuzhiyun		device_type = "memory";
83*4882a593Smuzhiyun	};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	dcsr: dcsr@f00000000 {
86*4882a593Smuzhiyun		ranges = <0x00000000 0xf 0x00000000 0x01072000>;
87*4882a593Smuzhiyun	};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun	bportals: bman-portals@ff4000000 {
90*4882a593Smuzhiyun		ranges = <0x0 0xf 0xf4000000 0x2000000>;
91*4882a593Smuzhiyun	};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun	qportals: qman-portals@ff6000000 {
94*4882a593Smuzhiyun		ranges = <0x0 0xf 0xf6000000 0x2000000>;
95*4882a593Smuzhiyun	};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun	soc: soc@ffe000000 {
98*4882a593Smuzhiyun		ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
99*4882a593Smuzhiyun		reg = <0xf 0xfe000000 0 0x00001000>;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun		spi@110000 {
102*4882a593Smuzhiyun			network-clock@1 {
103*4882a593Smuzhiyun				compatible = "zarlink,zl30364";
104*4882a593Smuzhiyun				reg = <1>;
105*4882a593Smuzhiyun				spi-max-frequency = <1000000>;
106*4882a593Smuzhiyun			};
107*4882a593Smuzhiyun		};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun		sdhc@114000 {
110*4882a593Smuzhiyun			status = "disabled";
111*4882a593Smuzhiyun		};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun		i2c@118000 {
114*4882a593Smuzhiyun			clock-frequency = <100000>;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun			mux@70 {
117*4882a593Smuzhiyun				compatible = "nxp,pca9547";
118*4882a593Smuzhiyun				reg = <0x70>;
119*4882a593Smuzhiyun				#address-cells = <1>;
120*4882a593Smuzhiyun				#size-cells = <0>;
121*4882a593Smuzhiyun				i2c-mux-idle-disconnect;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun				i2c@0 {
124*4882a593Smuzhiyun					reg = <0>;
125*4882a593Smuzhiyun					#address-cells = <1>;
126*4882a593Smuzhiyun					#size-cells = <0>;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun					eeprom@54 {
129*4882a593Smuzhiyun						compatible = "atmel,24c02";
130*4882a593Smuzhiyun						reg = <0x54>;
131*4882a593Smuzhiyun						pagesize = <2>;
132*4882a593Smuzhiyun						read-only;
133*4882a593Smuzhiyun						label = "ddr3-spd";
134*4882a593Smuzhiyun					};
135*4882a593Smuzhiyun				};
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun				i2c@7 {
138*4882a593Smuzhiyun					reg = <7>;
139*4882a593Smuzhiyun					#address-cells = <1>;
140*4882a593Smuzhiyun					#size-cells = <0>;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun					temp-sensor@48 {
143*4882a593Smuzhiyun						compatible = "national,lm75";
144*4882a593Smuzhiyun						reg = <0x48>;
145*4882a593Smuzhiyun						label = "SENSOR_0";
146*4882a593Smuzhiyun					};
147*4882a593Smuzhiyun					temp-sensor@4a {
148*4882a593Smuzhiyun						compatible = "national,lm75";
149*4882a593Smuzhiyun						reg = <0x4a>;
150*4882a593Smuzhiyun						label = "SENSOR_2";
151*4882a593Smuzhiyun					};
152*4882a593Smuzhiyun					temp-sensor@4b {
153*4882a593Smuzhiyun						compatible = "national,lm75";
154*4882a593Smuzhiyun						reg = <0x4b>;
155*4882a593Smuzhiyun						label = "SENSOR_3";
156*4882a593Smuzhiyun					};
157*4882a593Smuzhiyun				};
158*4882a593Smuzhiyun			};
159*4882a593Smuzhiyun		};
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun		i2c@118100 {
162*4882a593Smuzhiyun			clock-frequency = <100000>;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun			eeprom@50 {
165*4882a593Smuzhiyun				compatible = "atmel,24c08";
166*4882a593Smuzhiyun				reg = <0x50>;
167*4882a593Smuzhiyun				pagesize = <16>;
168*4882a593Smuzhiyun			};
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun			eeprom@54 {
171*4882a593Smuzhiyun				compatible = "atmel,24c08";
172*4882a593Smuzhiyun				reg = <0x54>;
173*4882a593Smuzhiyun				pagesize = <16>;
174*4882a593Smuzhiyun			};
175*4882a593Smuzhiyun		};
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun		i2c@119000 {
178*4882a593Smuzhiyun			status = "disabled";
179*4882a593Smuzhiyun		};
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun		i2c@119100 {
182*4882a593Smuzhiyun			status = "disabled";
183*4882a593Smuzhiyun		};
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun		serial2: serial@11d500 {
186*4882a593Smuzhiyun			status = "disabled";
187*4882a593Smuzhiyun		};
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun		serial3: serial@11d600 {
190*4882a593Smuzhiyun			status = "disabled";
191*4882a593Smuzhiyun		};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun		usb0: usb@210000 {
194*4882a593Smuzhiyun			status = "disabled";
195*4882a593Smuzhiyun		};
196*4882a593Smuzhiyun		usb1: usb@211000 {
197*4882a593Smuzhiyun			status = "disabled";
198*4882a593Smuzhiyun		};
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun		display@180000 {
201*4882a593Smuzhiyun			status = "disabled";
202*4882a593Smuzhiyun		};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun		sata@220000 {
205*4882a593Smuzhiyun			status = "disabled";
206*4882a593Smuzhiyun		};
207*4882a593Smuzhiyun		sata@221000 {
208*4882a593Smuzhiyun			status = "disabled";
209*4882a593Smuzhiyun		};
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun		fman@400000 {
212*4882a593Smuzhiyun			ethernet@e0000 {
213*4882a593Smuzhiyun				phy-mode = "sgmii";
214*4882a593Smuzhiyun				fixed-link {
215*4882a593Smuzhiyun					speed = <1000>;
216*4882a593Smuzhiyun					full-duplex;
217*4882a593Smuzhiyun				};
218*4882a593Smuzhiyun			};
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun			ethernet@e2000 {
221*4882a593Smuzhiyun				phy-mode = "sgmii";
222*4882a593Smuzhiyun				fixed-link {
223*4882a593Smuzhiyun					speed = <1000>;
224*4882a593Smuzhiyun					full-duplex;
225*4882a593Smuzhiyun				};
226*4882a593Smuzhiyun			};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun			ethernet@e4000 {
229*4882a593Smuzhiyun				status = "disabled";
230*4882a593Smuzhiyun			};
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun			ethernet@e6000 {
233*4882a593Smuzhiyun				status = "disabled";
234*4882a593Smuzhiyun			};
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun			ethernet@e8000 {
237*4882a593Smuzhiyun				phy-handle = <&front_phy>;
238*4882a593Smuzhiyun				phy-mode = "rgmii-id";
239*4882a593Smuzhiyun			};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun			mdio0: mdio@fc000 {
242*4882a593Smuzhiyun				front_phy: ethernet-phy@11 {
243*4882a593Smuzhiyun					reg = <0x11>;
244*4882a593Smuzhiyun				};
245*4882a593Smuzhiyun			};
246*4882a593Smuzhiyun		};
247*4882a593Smuzhiyun	};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun	pci0: pcie@ffe240000 {
251*4882a593Smuzhiyun		reg = <0xf 0xfe240000 0 0x10000>;
252*4882a593Smuzhiyun		ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
253*4882a593Smuzhiyun			  0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
254*4882a593Smuzhiyun		pcie@0 {
255*4882a593Smuzhiyun			ranges = <0x02000000 0 0xe0000000
256*4882a593Smuzhiyun				  0x02000000 0 0xe0000000
257*4882a593Smuzhiyun				  0 0x20000000
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun				  0x01000000 0 0x00000000
260*4882a593Smuzhiyun				  0x01000000 0 0x00000000
261*4882a593Smuzhiyun				  0 0x00010000>;
262*4882a593Smuzhiyun		};
263*4882a593Smuzhiyun	};
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun	pci1: pcie@ffe250000 {
266*4882a593Smuzhiyun		status = "disabled";
267*4882a593Smuzhiyun		reg = <0xf 0xfe250000 0 0x10000>;
268*4882a593Smuzhiyun		ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000
269*4882a593Smuzhiyun			  0x01000000 0 0 0xf 0xf8010000 0 0x00010000>;
270*4882a593Smuzhiyun		pcie@0 {
271*4882a593Smuzhiyun			ranges = <0x02000000 0 0xe0000000
272*4882a593Smuzhiyun				  0x02000000 0 0xe0000000
273*4882a593Smuzhiyun				  0 0x10000000
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun				  0x01000000 0 0x00000000
276*4882a593Smuzhiyun				  0x01000000 0 0x00000000
277*4882a593Smuzhiyun				  0 0x00010000>;
278*4882a593Smuzhiyun		};
279*4882a593Smuzhiyun	};
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun	pci2: pcie@ffe260000 {
282*4882a593Smuzhiyun		status = "disabled";
283*4882a593Smuzhiyun		reg = <0xf 0xfe260000 0 0x10000>;
284*4882a593Smuzhiyun		ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
285*4882a593Smuzhiyun			  0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
286*4882a593Smuzhiyun		pcie@0 {
287*4882a593Smuzhiyun			ranges = <0x02000000 0 0xe0000000
288*4882a593Smuzhiyun				  0x02000000 0 0xe0000000
289*4882a593Smuzhiyun				  0 0x10000000
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun				  0x01000000 0 0x00000000
292*4882a593Smuzhiyun				  0x01000000 0 0x00000000
293*4882a593Smuzhiyun				  0 0x00010000>;
294*4882a593Smuzhiyun		};
295*4882a593Smuzhiyun	};
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun	pci3: pcie@ffe270000 {
298*4882a593Smuzhiyun		status = "disabled";
299*4882a593Smuzhiyun		reg = <0xf 0xfe270000 0 0x10000>;
300*4882a593Smuzhiyun		ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000
301*4882a593Smuzhiyun			  0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
302*4882a593Smuzhiyun		pcie@0 {
303*4882a593Smuzhiyun			ranges = <0x02000000 0 0xe0000000
304*4882a593Smuzhiyun				  0x02000000 0 0xe0000000
305*4882a593Smuzhiyun				  0 0x10000000
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun				  0x01000000 0 0x00000000
308*4882a593Smuzhiyun				  0x01000000 0 0x00000000
309*4882a593Smuzhiyun				  0 0x00010000>;
310*4882a593Smuzhiyun		};
311*4882a593Smuzhiyun	};
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun	qe: qe@ffe140000 {
314*4882a593Smuzhiyun		ranges = <0x0 0xf 0xfe140000 0x40000>;
315*4882a593Smuzhiyun		reg = <0xf 0xfe140000 0 0x480>;
316*4882a593Smuzhiyun		brg-frequency = <0>;
317*4882a593Smuzhiyun		bus-frequency = <0>;
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun		si1: si@700 {
320*4882a593Smuzhiyun			compatible = "fsl,t1040-qe-si";
321*4882a593Smuzhiyun			reg = <0x700 0x80>;
322*4882a593Smuzhiyun		};
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun		siram1: siram@1000 {
325*4882a593Smuzhiyun			compatible = "fsl,t1040-qe-siram";
326*4882a593Smuzhiyun			reg = <0x1000 0x800>;
327*4882a593Smuzhiyun		};
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun		ucc_hdlc: ucc@2000 {
330*4882a593Smuzhiyun			device_type = "hdlc";
331*4882a593Smuzhiyun			compatible = "fsl,ucc-hdlc";
332*4882a593Smuzhiyun			rx-clock-name = "clk9";
333*4882a593Smuzhiyun			tx-clock-name = "clk9";
334*4882a593Smuzhiyun			fsl,hdlc-bus;
335*4882a593Smuzhiyun		};
336*4882a593Smuzhiyun	};
337*4882a593Smuzhiyun};
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun#include "t1040si-post.dtsi"
340