Home
last modified time | relevance | path

Searched +full:0 +full:x00500000 (Results 1 – 25 of 153) sorted by relevance

1234567

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/interrupt-controller/
H A Dcsky,apb-intc.txt46 reg = <0x00500000 0x400>;
53 reg = <0x00500000 0x400>;
60 reg = <0x00500000 0x400>;
/OK3568_Linux_fs/u-boot/include/configs/
H A Drk3308_common.h21 #define CONFIG_SPL_TEXT_BASE 0x00000000
22 #define CONFIG_SPL_MAX_SIZE 0x40000
23 #define CONFIG_SPL_BSS_START_ADDR 0x00400000
24 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000
25 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
29 #define CONFIG_SYS_TEXT_BASE 0x00600000
30 #define CONFIG_SYS_INIT_SP_ADDR 0x00800000
31 #define CONFIG_SYS_LOAD_ADDR 0x00C00800
32 #define CONFIG_SPL_STACK 0x00400000
37 #define GICD_BASE 0xff581000
[all …]
H A Dthunderx_88xx.h16 #define MEM_BASE 0x00500000
21 #define CONFIG_SYS_TEXT_BASE 0x00500000
22 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
25 #define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
28 #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
43 #define GICD_BASE (0x801000000000)
44 #define GICR_BASE (0x801000002000)
45 #define CONFIG_SYS_SERIAL0 0x87e024000000
46 #define CONFIG_SYS_SERIAL1 0x87e025000000
61 #define PHYS_SDRAM_1_SIZE (0x80000000-MEM_BASE) /* 2048 MB */
[all …]
H A Drk3368_common.h17 #define CONFIG_SYS_SDRAM_BASE 0
18 #define SDRAM_MAX_SIZE 0xfe000000
24 #define CONFIG_SYS_TEXT_BASE 0x00200000
25 #define CONFIG_SYS_INIT_SP_ADDR 0x00400000
26 #define CONFIG_SYS_LOAD_ADDR 0x00280000
30 #define CONFIG_SPL_TEXT_BASE 0x00000000
31 #define CONFIG_SPL_MAX_SIZE 0x40000
32 #define CONFIG_SPL_BSS_START_ADDR 0x400000
33 #define CONFIG_SPL_BSS_MAX_SIZE 0x20000
34 #define CONFIG_SPL_STACK 0x00188000
[all …]
H A Drk3328_common.h18 #define CONFIG_SYS_TEXT_BASE 0x00200000
19 #define CONFIG_SYS_INIT_SP_ADDR 0x00400000
20 #define CONFIG_SYS_LOAD_ADDR 0x00800800
21 #define CONFIG_SPL_STACK 0x00400000
22 #define CONFIG_SPL_TEXT_BASE 0x00000000
23 #define CONFIG_SPL_MAX_SIZE 0x40000
24 #define CONFIG_SPL_BSS_START_ADDR 0x00400000
25 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000
28 #define GICD_BASE 0xFF811000
29 #define GICC_BASE 0xFF812000
[all …]
H A Drk1808_common.h13 #define CONFIG_SPL_TEXT_BASE 0x00000000
14 #define CONFIG_SPL_MAX_SIZE 0x00020000
15 #define CONFIG_SPL_BSS_START_ADDR 0x03fe0000
16 #define CONFIG_SPL_BSS_MAX_SIZE 0x00002000
17 #define CONFIG_SPL_STACK 0x03fe0000
22 #define CONFIG_SYS_TEXT_BASE 0x00600000
23 #define CONFIG_SYS_INIT_SP_ADDR 0x00800000
24 #define CONFIG_SYS_LOAD_ADDR 0x00800800
28 #define GICD_BASE 0xff100000
29 #define GICR_BASE 0xff140000
[all …]
H A Drk3399_common.h20 #define CONFIG_SYS_TEXT_BASE 0x00200000
21 #define CONFIG_SYS_INIT_SP_ADDR 0x00400000
22 #define CONFIG_SYS_LOAD_ADDR 0x00800800
23 #define CONFIG_SPL_STACK 0x00400000
24 #define CONFIG_SPL_TEXT_BASE 0x00000000
25 #define CONFIG_SPL_MAX_SIZE 0x40000
26 #define CONFIG_SPL_BSS_START_ADDR 0x00400000
27 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000
30 #define GICD_BASE 0xFEE00000
31 #define GICR_BASE 0xFEF00000
[all …]
H A Dpx30_common.h20 #define CONFIG_SYS_TEXT_BASE 0x00200000
21 #define CONFIG_SYS_INIT_SP_ADDR 0x00400000
22 #define CONFIG_SYS_LOAD_ADDR 0x00800800
23 #define CONFIG_SPL_STACK 0x00400000
24 #define CONFIG_SPL_TEXT_BASE 0x00000000
25 #define CONFIG_SPL_MAX_SIZE 0x40000
26 #define CONFIG_SPL_BSS_START_ADDR 0x2000000
27 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000
32 #define GICD_BASE 0xff131000
33 #define GICC_BASE 0xff132000
[all …]
H A Drk3588_common.h13 #define CONFIG_SPL_TEXT_BASE 0x00000000
14 #define CONFIG_SPL_MAX_SIZE 0x00040000
15 #define CONFIG_SPL_BSS_START_ADDR 0x03fe0000
16 #define CONFIG_SPL_BSS_MAX_SIZE 0x00010000
17 #define CONFIG_SPL_STACK 0x03fe0000
21 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x10000000
26 #define CONFIG_SYS_TEXT_BASE 0x00200000
28 #define CONFIG_SYS_INIT_SP_ADDR 0x00600000
29 #define CONFIG_SYS_LOAD_ADDR 0x00600800
33 #define GICD_BASE 0xfe600000
[all …]
H A Dat91sam9261ek.h33 #define CONFIG_SYS_TEXT_BASE 0x21f00000
60 #define CONFIG_SYS_SDRAM_BASE 0x20000000
61 #define CONFIG_SYS_SDRAM_SIZE 0x04000000
68 #define CONFIG_SYS_NAND_BASE 0x40000000
81 #define CONFIG_DM9000_BASE 0x30000000
94 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
102 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
105 #define CONFIG_SYS_MEMTEST_END 0x23e00000
110 #define CONFIG_ENV_OFFSET 0x4200
111 #define CONFIG_ENV_SIZE 0x4200
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91sam9x5.h20 #define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
26 #define ATMEL_ID_USART0 5 /* USART 0 */
30 #define ATMEL_ID_TWI0 9 /* Two-Wire Interface 0 */
33 #define ATMEL_ID_HSMCI0 12 /* High Speed Multimedia Card Interface 0 */
34 #define ATMEL_ID_SPI0 13 /* Serial Peripheral Interface 0 */
36 #define ATMEL_ID_UART0 15 /* UART 0 */
38 #define ATMEL_ID_TC01 17 /* Timer Counter 0, 1, 2, 3, 4 and 5 */
41 #define ATMEL_ID_DMAC0 20 /* DMA Controller 0 */
56 #define ATMEL_BASE_SPI0 0xf0000000
57 #define ATMEL_BASE_SPI1 0xf0004000
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Drv1126-thunder-boot-emmc.dtsi11 reg = <0x0020f000 0x00001000>;
15 reg = <0x00500000 0x00100000>;
21 reg = <0xffc50000 0x4000>;
30 post-power-on-delay-ms = <0>;
H A Dkirkwood-guruplug-server-plus.dts13 reg = <0x00000000 0x20000000>;
58 pinctrl-0 = < &pmx_led_health_r &pmx_led_health_g
84 partition@0 {
86 reg = <0x00000000 0x00100000>;
92 reg = <0x00100000 0x00400000>;
97 reg = <0x00500000 0x1fb00000>;
104 ethphy0: ethernet-phy@0 {
106 compatible = "ethernet-phy-id0141.0cb0",
108 reg = <0>;
113 compatible = "ethernet-phy-id0141.0cb0",
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-s3c/include/mach/
H A Dmap-base.h13 /* Fit all our registers in at 0xF6000000 upwards, trying to use as
21 #define S3C_ADDR_BASE 0xF6000000
29 #define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */
30 #define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */
31 #define S3C_VA_MEM S3C_ADDR(0x00200000) /* memory control */
32 #define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */
33 #define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */
34 #define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */
40 #define S3C_ADDR_CPU(x) S3C_ADDR(0x00500000 + (x))
/OK3568_Linux_fs/kernel/arch/sh/configs/
H A Dpolaris_defconfig16 CONFIG_MEMORY_START=0x0C000000
29 …ck2 rootfstype=jffs2 mem=63M mtdparts=physmap-flash.0:0x00100000(bootloader)ro,0x00500000(Kernel)r…
47 CONFIG_MTD_PHYSMAP_START=0x00000000
48 CONFIG_MTD_PHYSMAP_LEN=0x01000000
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/interconnect/
H A Dqcom,msm8916.yaml54 reg = <0x00400000 0x62000>;
63 reg = <0x00500000 0x11000>;
72 reg = <0x00580000 0x14000>;
H A Dqcom,qcs404.yaml53 reg = <0x00400000 0x80000>;
62 reg = <0x00500000 0x15080>;
71 reg = <0x00580000 0x23080>;
/OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/
H A Dp1021mds.dts23 reg = <0x0 0xffe05000 0x0 0x1000>;
26 ranges = <0x0 0x0 0x0 0xfc000000 0x02000000
27 0x1 0x0 0x0 0xf8000000 0x00008000
28 0x2 0x0 0x0 0xf8010000 0x00020000
29 0x3 0x0 0x0 0xf8020000 0x00020000>;
31 nand@0,0 {
36 reg = <0x0 0x0 0x40000>;
38 partition@0 {
41 reg = <0x0 0x00100000>;
48 reg = <0x00100000 0x00100000>;
[all …]
/OK3568_Linux_fs/kernel/arch/sh/include/mach-se/mach/
H A Dse7721.h16 #define PA_ROM 0xa0000000 /* EPROM */
17 #define PA_ROM_SIZE 0x00200000 /* EPROM size 2M byte */
18 #define PA_FROM 0xa1000000 /* Flash-ROM */
19 #define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */
20 #define PA_EXT1 0xa4000000
21 #define PA_EXT1_SIZE 0x04000000
22 #define PA_SDRAM 0xaC000000 /* SDRAM(Area3) 64MB */
23 #define PA_SDRAM_SIZE 0x04000000
25 #define PA_EXT4 0xb0000000
26 #define PA_EXT4_SIZE 0x04000000
[all …]
H A Dse7722.h17 #define PA_ROM 0xa0000000 /* EPROM */
18 #define PA_ROM_SIZE 0x00200000 /* EPROM size 2M byte */
19 #define PA_FROM 0xa1000000 /* Flash-ROM */
20 #define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */
21 #define PA_EXT1 0xa4000000
22 #define PA_EXT1_SIZE 0x04000000
23 #define PA_SDRAM 0xaC000000 /* DDR-SDRAM(Area3) 64MB */
24 #define PA_SDRAM_SIZE 0x04000000
26 #define PA_EXT4 0xb0000000
27 #define PA_EXT4_SIZE 0x04000000
[all …]
/OK3568_Linux_fs/u-boot/doc/
H A DREADME.lynxkdi42 #define CONFIG_SYS_IMMR 0xFA200000
43 #define CONFIG_SYS_BCSR 0xFA100000
44 #define CONFIG_SYS_BR1_PRELIM 0xFA101801
50 LynxOS: -a 0x00004000 -e 0x00004020
51 BlueCat: -a 0x00500000 -e 0x00507000
/OK3568_Linux_fs/kernel/arch/arm/mach-orion5x/
H A Drd88f6183ap-ge-setup.c35 .port_names[0] = "lan1",
46 .offset = 0x00000000,
47 .size = 0x00200000,
50 .offset = 0x00200000,
51 .size = 0x00500000,
54 .offset = 0x00700000,
55 .size = 0x00080000,
70 .bus_num = 0,
71 .chip_select = 0,
108 return 0; in rd88f6183ap_ge_pci_init()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/
H A Datmel,lcdc.txt32 reg = <0x00500000 0x1000>;
33 interrupts = <23 3 0>;
35 pinctrl-0 = <&pinctrl_fb>;
46 reg = <0x00700000 0x1000 0x70000000 0x200000>;
69 atmel,dmacon = <0x1>;
70 atmel,lcdcon2 = <0x80008002>;
/OK3568_Linux_fs/kernel/arch/parisc/mm/
H A Dioremap.c38 if ((phys_addr >= 0x00080000 && end < 0x000fffff) || in ioremap()
39 (phys_addr >= 0x00500000 && end < 0x03bfffff)) in ioremap()
40 phys_addr |= F_EXTEND(0xfc000000); in ioremap()
/OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/
H A Da3m071.dts26 ranges = <0 0xf0000000 0x0000c000>;
27 reg = <0xf0000000 0x00000100>;
28 bus-frequency = <0>; /* From boot loader */
29 system-frequency = <0>; /* From boot loader */
41 reg = <0x2000 0x100>;
42 interrupts = <2 1 0>;
63 reg = <0x2c00 0x100>;
64 interrupts = <2 4 0>;
73 reg = <0x03>;
94 ranges = <0 0 0xfc000000 0x02000000
[all …]

1234567