1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2021 Rockchip Electronics Co., Ltd 4 * 5 */ 6 7 #ifndef __CONFIG_RK3588_COMMON_H 8 #define __CONFIG_RK3588_COMMON_H 9 10 #include "rockchip-common.h" 11 12 #define CONFIG_SPL_FRAMEWORK 13 #define CONFIG_SPL_TEXT_BASE 0x00000000 14 #define CONFIG_SPL_MAX_SIZE 0x00040000 15 #define CONFIG_SPL_BSS_START_ADDR 0x03fe0000 16 #define CONFIG_SPL_BSS_MAX_SIZE 0x00010000 17 #define CONFIG_SPL_STACK 0x03fe0000 18 #ifdef CONFIG_SPL_LOAD_FIT_ADDRESS 19 #undef CONFIG_SPL_LOAD_FIT_ADDRESS 20 #endif 21 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x10000000 22 23 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 24 #define CONFIG_SYS_CBSIZE 1024 25 #define CONFIG_SKIP_LOWLEVEL_INIT 26 #define CONFIG_SYS_TEXT_BASE 0x00200000 27 28 #define CONFIG_SYS_INIT_SP_ADDR 0x00600000 29 #define CONFIG_SYS_LOAD_ADDR 0x00600800 30 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 31 #define COUNTER_FREQUENCY 24000000 32 33 #define GICD_BASE 0xfe600000 34 #define GICR_BASE 0xfe680000 35 #define GICC_BASE 0xfe600000 36 37 /* secure otp */ 38 #define OTP_UBOOT_ROLLBACK_OFFSET 0x150 39 #define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */ 40 #define OTP_ALL_ONES_NUM_BITS 32 41 #define OTP_SECURE_BOOT_ENABLE_ADDR 0x20 42 #define OTP_SECURE_BOOT_ENABLE_SIZE 1 43 #define OTP_RSA_HASH_ADDR 0x9c0 44 #define OTP_RSA_HASH_SIZE 32 45 46 /* MMC/SD IP block */ 47 #define CONFIG_BOUNCE_BUFFER 48 49 #define CONFIG_SYS_SDRAM_BASE 0 50 #define SDRAM_MAX_SIZE 0xf0000000 51 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 52 53 #ifndef CONFIG_SPL_BUILD 54 /* usb mass storage */ 55 #define CONFIG_USB_FUNCTION_MASS_STORAGE 56 #define CONFIG_ROCKUSB_G_DNL_PID 0x350b 57 58 /* 59 * decompressed kernel: 4M ~ 84M 60 * Why not start from 2M ? if kernel < 5.10 in Android image, 61 * the image header will use the 0x180000~0x200000, which is 62 * overlap with share memory region 0x100000~0x200000. 63 * 64 * compressed kernel: 84M ~ 130M 65 */ 66 #define ENV_MEM_LAYOUT_SETTINGS \ 67 "scriptaddr=0x00500000\0" \ 68 "pxefile_addr_r=0x00600000\0" \ 69 "fdt_addr_r=0x08300000\0" \ 70 "kernel_addr_r=0x00400000\0" \ 71 "kernel_addr_c=0x05480000\0" \ 72 "ramdisk_addr_r=0x0a200000\0" 73 74 #include <config_distro_bootcmd.h> 75 76 #define CONFIG_EXTRA_ENV_SETTINGS \ 77 BOOTENV_SHARED_MTD \ 78 ENV_MEM_LAYOUT_SETTINGS \ 79 "partitions=" PARTS_RKIMG \ 80 ROCKCHIP_DEVICE_SETTINGS \ 81 RKIMG_DET_BOOTDEV \ 82 BOOTENV 83 #endif 84 85 /* rockchip ohci host driver */ 86 #define CONFIG_USB_OHCI_NEW 87 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 88 89 #define CONFIG_PREBOOT 90 #define CONFIG_LIB_HW_RAND 91 92 #endif 93