1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2017 Rockchip Electronics Co., Ltd 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __CONFIG_RK3308_COMMON_H 8*4882a593Smuzhiyun #define __CONFIG_RK3308_COMMON_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include "rockchip-common.h" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (10 << 20) 13*4882a593Smuzhiyun #define CONFIG_SYS_CBSIZE 1024 14*4882a593Smuzhiyun #define CONFIG_SKIP_LOWLEVEL_INIT 15*4882a593Smuzhiyun #define CONFIG_SYS_MAX_NAND_DEVICE 1 16*4882a593Smuzhiyun #define CONFIG_SYS_NAND_ONFI_DETECTION 17*4882a593Smuzhiyun #define CONFIG_SYS_NAND_PAGE_SIZE 2048 18*4882a593Smuzhiyun #define CONFIG_SYS_NAND_PAGE_COUNT 64 19*4882a593Smuzhiyun #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 20*4882a593Smuzhiyun #define CONFIG_SPL_FRAMEWORK 21*4882a593Smuzhiyun #define CONFIG_SPL_TEXT_BASE 0x00000000 22*4882a593Smuzhiyun #define CONFIG_SPL_MAX_SIZE 0x40000 23*4882a593Smuzhiyun #define CONFIG_SPL_BSS_START_ADDR 0x00400000 24*4882a593Smuzhiyun #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 25*4882a593Smuzhiyun #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #define CONFIG_SYS_NS16550_MEM32 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x00600000 30*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR 0x00800000 31*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR 0x00C00800 32*4882a593Smuzhiyun #define CONFIG_SPL_STACK 0x00400000 33*4882a593Smuzhiyun #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #define COUNTER_FREQUENCY 24000000 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define GICD_BASE 0xff581000 38*4882a593Smuzhiyun #define GICC_BASE 0xff582000 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun #define OTP_SECURE_BOOT_ENABLE_ADDR 0x0 41*4882a593Smuzhiyun #define OTP_SECURE_BOOT_ENABLE_SIZE 1 42*4882a593Smuzhiyun #define OTP_RSA_HASH_ADDR 0x10 43*4882a593Smuzhiyun #define OTP_RSA_HASH_SIZE 32 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun /* MMC/SD IP block */ 48*4882a593Smuzhiyun #define CONFIG_BOUNCE_BUFFER 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE 0 51*4882a593Smuzhiyun #define SDRAM_MAX_SIZE 0xff000000 52*4882a593Smuzhiyun #define SDRAM_BANK_SIZE (2UL << 30) 53*4882a593Smuzhiyun #ifdef CONFIG_DM_DVFS 54*4882a593Smuzhiyun #define CONFIG_PREBOOT "dvfs repeat" 55*4882a593Smuzhiyun #else 56*4882a593Smuzhiyun #define CONFIG_PREBOOT 57*4882a593Smuzhiyun #endif 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #ifndef CONFIG_SPL_BUILD 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun /* usb mass storage */ 62*4882a593Smuzhiyun #define CONFIG_USB_FUNCTION_MASS_STORAGE 63*4882a593Smuzhiyun #define CONFIG_ROCKUSB_G_DNL_PID 0x330d 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun #ifdef CONFIG_ARM64 66*4882a593Smuzhiyun #define ENV_MEM_LAYOUT_SETTINGS \ 67*4882a593Smuzhiyun "scriptaddr=0x00500000\0" \ 68*4882a593Smuzhiyun "pxefile_addr_r=0x00600000\0" \ 69*4882a593Smuzhiyun "fdt_addr_r=0x01f00000\0" \ 70*4882a593Smuzhiyun "kernel_addr_no_low_bl32_r=0x00280000\0" \ 71*4882a593Smuzhiyun "kernel_addr_r=0x00680000\0" \ 72*4882a593Smuzhiyun "kernel_addr_c=0x02480000\0" \ 73*4882a593Smuzhiyun "ramdisk_addr_r=0x04000000\0" 74*4882a593Smuzhiyun #else 75*4882a593Smuzhiyun #define ENV_MEM_LAYOUT_SETTINGS \ 76*4882a593Smuzhiyun "scriptaddr=0x00500000\0" \ 77*4882a593Smuzhiyun "pxefile_addr_r=0x00600000\0" \ 78*4882a593Smuzhiyun "fdt_addr_r=0x02800000\0" \ 79*4882a593Smuzhiyun "kernel_addr_r=0x00058000\0" \ 80*4882a593Smuzhiyun "kernel_addr_c=0x2008000\0" \ 81*4882a593Smuzhiyun "ramdisk_addr_r=0x02900000\0" 82*4882a593Smuzhiyun #endif 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun #include <config_distro_bootcmd.h> 85*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 86*4882a593Smuzhiyun ENV_MEM_LAYOUT_SETTINGS \ 87*4882a593Smuzhiyun "partitions=" PARTS_DEFAULT \ 88*4882a593Smuzhiyun ROCKCHIP_DEVICE_SETTINGS \ 89*4882a593Smuzhiyun RKIMG_DET_BOOTDEV \ 90*4882a593Smuzhiyun BOOTENV_SHARED_RKNAND \ 91*4882a593Smuzhiyun BOOTENV 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun #endif 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun #endif 96