1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * a3m071 board Device Tree Source 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2012 Stefan Roese <sr@denx.de> 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (C) 2011 DENX Software Engineering GmbH 8*4882a593Smuzhiyun * Heiko Schocher <hs@denx.de> 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * Copyright (C) 2007 Semihalf 11*4882a593Smuzhiyun * Marian Balakowicz <m8@semihalf.com> 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun/include/ "mpc5200b.dtsi" 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun&gpt0 { fsl,has-wdt; }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun/ { 19*4882a593Smuzhiyun model = "anonymous,a3m071"; 20*4882a593Smuzhiyun compatible = "anonymous,a3m071"; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun soc5200@f0000000 { 23*4882a593Smuzhiyun #address-cells = <1>; 24*4882a593Smuzhiyun #size-cells = <1>; 25*4882a593Smuzhiyun compatible = "fsl,mpc5200b-immr"; 26*4882a593Smuzhiyun ranges = <0 0xf0000000 0x0000c000>; 27*4882a593Smuzhiyun reg = <0xf0000000 0x00000100>; 28*4882a593Smuzhiyun bus-frequency = <0>; /* From boot loader */ 29*4882a593Smuzhiyun system-frequency = <0>; /* From boot loader */ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun spi@f00 { 32*4882a593Smuzhiyun status = "disabled"; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun usb: usb@1000 { 36*4882a593Smuzhiyun status = "disabled"; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun psc@2000 { 40*4882a593Smuzhiyun compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 41*4882a593Smuzhiyun reg = <0x2000 0x100>; 42*4882a593Smuzhiyun interrupts = <2 1 0>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun psc@2200 { 46*4882a593Smuzhiyun status = "disabled"; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun psc@2400 { 50*4882a593Smuzhiyun status = "disabled"; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun psc@2600 { 54*4882a593Smuzhiyun status = "disabled"; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun psc@2800 { 58*4882a593Smuzhiyun status = "disabled"; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun psc@2c00 { // PSC6 62*4882a593Smuzhiyun compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; 63*4882a593Smuzhiyun reg = <0x2c00 0x100>; 64*4882a593Smuzhiyun interrupts = <2 4 0>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun ethernet@3000 { 68*4882a593Smuzhiyun phy-handle = <&phy0>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun mdio@3000 { 72*4882a593Smuzhiyun phy0: ethernet-phy@3 { 73*4882a593Smuzhiyun reg = <0x03>; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun ata@3a00 { 78*4882a593Smuzhiyun status = "disabled"; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun i2c@3d00 { 82*4882a593Smuzhiyun status = "disabled"; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun i2c@3d40 { 86*4882a593Smuzhiyun status = "disabled"; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun localbus { 91*4882a593Smuzhiyun compatible = "fsl,mpc5200b-lpb","simple-bus"; 92*4882a593Smuzhiyun #address-cells = <2>; 93*4882a593Smuzhiyun #size-cells = <1>; 94*4882a593Smuzhiyun ranges = <0 0 0xfc000000 0x02000000 95*4882a593Smuzhiyun 3 0 0xe9000000 0x00080000 96*4882a593Smuzhiyun 5 0 0xe8000000 0x00010000>; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun flash@0,0 { 99*4882a593Smuzhiyun #address-cells = <1>; 100*4882a593Smuzhiyun #size-cells = <1>; 101*4882a593Smuzhiyun reg = <0 0x0 0x02000000>; 102*4882a593Smuzhiyun compatible = "cfi-flash"; 103*4882a593Smuzhiyun bank-width = <2>; 104*4882a593Smuzhiyun partition@0 { 105*4882a593Smuzhiyun label = "u-boot"; 106*4882a593Smuzhiyun reg = <0x00000000 0x00040000>; 107*4882a593Smuzhiyun read-only; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun partition@40000 { 110*4882a593Smuzhiyun label = "env"; 111*4882a593Smuzhiyun reg = <0x00040000 0x00020000>; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun partition@60000 { 114*4882a593Smuzhiyun label = "dtb"; 115*4882a593Smuzhiyun reg = <0x00060000 0x00020000>; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun partition@80000 { 118*4882a593Smuzhiyun label = "kernel"; 119*4882a593Smuzhiyun reg = <0x00080000 0x00500000>; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun partition@580000 { 122*4882a593Smuzhiyun label = "root"; 123*4882a593Smuzhiyun reg = <0x00580000 0x00A80000>; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun fpga@3,0 { 128*4882a593Smuzhiyun compatible = "anonymous,a3m071-fpga"; 129*4882a593Smuzhiyun reg = <3 0x0 0x00080000 130*4882a593Smuzhiyun 5 0x0 0x00010000>; 131*4882a593Smuzhiyun interrupts = <0 0 3>; /* level low */ 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun pci@f0000d00 { 136*4882a593Smuzhiyun status = "disabled"; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun}; 139