| 301f8dd1 | 03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
UPSTREAM: mtd: Rename free() to rfree()
This function name conflicts with our desire to #define free() to
something else on sandbox. Since it deals with resources, rename it to
rfree().
Change-Id:
UPSTREAM: mtd: Rename free() to rfree()
This function name conflicts with our desire to #define free() to
something else on sandbox. Since it deals with resources, rename it to
rfree().
Change-Id: I2718843dd4646b7450c36e84cc16e6440c718959
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 8d38a8459b0de45f5ff41f3e11c278a5cf395fd0)
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| b16d7c22 | 04-Sep-2019 |
William Zhang <william.zhang@broadcom.com> |
UPSTREAM: drivers: nand: brcmnand: fix nand_chip ecc layout structure
The current brcmnand driver is based on 4.18 linux kernel which uses
mtd_set_ooblayout to set ecc layout. But nand base code in
UPSTREAM: drivers: nand: brcmnand: fix nand_chip ecc layout structure
The current brcmnand driver is based on 4.18 linux kernel which uses
mtd_set_ooblayout to set ecc layout. But nand base code in u-boot is from
old kernel which does not use this new API and expect nand_chip.ecc.layout
structure to be set. This cause nand_scan_tail function running into a bug
check if the device has a different oob size than the default ones.
This patch ports the brcmstb_choose_ecc_layout function from kernel 4.6.7
that supports the ecc layout struture and replaces the mtd_set_ooblayout
method
Change-Id: I31aec45275decfb03af2829c744c3dda0e261d12
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit e365de90517ba4686d7a88417b1a729f5891d376)
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| bfb4edbc | 02-Jun-2020 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: spinand: Propagate ECC information to the MTD structure
This is done by default in the raw NAND core (nand_base.c) but was
missing in the SPI-NAND core. Without these two lines the ecc_strength
mtd: spinand: Propagate ECC information to the MTD structure
This is done by default in the raw NAND core (nand_base.c) but was
missing in the SPI-NAND core. Without these two lines the ecc_strength
and ecc_step_size values are not exported to the user through sysfs.
Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
Change-Id: I37f29616e1522d9ce9e9d7ec18a473c73e1d1551
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| 0ebe7291 | 02-Jun-2020 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: spinand: Do not erase the block before writing a bad block marker
Currently when marking a block, we use spinand_erase_op() to erase
the block before writing the marker to the OOB area. Doing s
mtd: spinand: Do not erase the block before writing a bad block marker
Currently when marking a block, we use spinand_erase_op() to erase
the block before writing the marker to the OOB area. Doing so without
waiting for the operation to finish can lead to the marking failing
silently and no bad block marker being written to the flash.
In fact we don't need to do an erase at all before writing the BBM.
The ECC is disabled for raw accesses to the OOB data and we don't
need to work around any issues with chips reporting ECC errors as it
is known to be the case for raw NAND.
Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Cc: stable@vger.kernel.org
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-4-frieder.schrempf@kontron.de
Change-Id: Ieaa72162810105bf5d62caf2efc16a1c2ef89d6d
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| 35a88e77 | 02-Jun-2020 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: spinand: Explicitly use MTD_OPS_RAW to write the bad block marker to OOB
When writing the bad block marker to the OOB area the access mode
should be set to MTD_OPS_RAW as it is done for reading
mtd: spinand: Explicitly use MTD_OPS_RAW to write the bad block marker to OOB
When writing the bad block marker to the OOB area the access mode
should be set to MTD_OPS_RAW as it is done for reading the marker.
Currently this only works because req.mode is initialized to
MTD_OPS_PLACE_OOB (0) and spinand_write_to_cache_op() checks for
req.mode != MTD_OPS_AUTO_OOB.
Fix this by explicitly setting req.mode to MTD_OPS_RAW.
Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-3-frieder.schrempf@kontron.de
Change-Id: Id415efc0cd8d61d97d98e0340729f8bc60fc28cf
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| d537a52d | 02-Jun-2020 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: spinand: Stop using spinand->oobbuf for buffering bad block markers
For reading and writing the bad block markers, spinand->oobbuf is
currently used as a buffer for the marker bytes. During the
mtd: spinand: Stop using spinand->oobbuf for buffering bad block markers
For reading and writing the bad block markers, spinand->oobbuf is
currently used as a buffer for the marker bytes. During the
underlying read and write operations to actually get/set the content
of the OOB area, the content of spinand->oobbuf is reused and changed
by accessing it through spinand->oobbuf and/or spinand->databuf.
This is a flaw in the original design of the SPI NAND core and at the
latest from 13c15e07eedf ("mtd: spinand: Handle the case where
PROGRAM LOAD does not reset the cache") on, it results in not having
the bad block marker written at all, as the spinand->oobbuf is
cleared to 0xff after setting the marker bytes to zero.
To fix it, we now just store the two bytes for the marker on the
stack and let the read/write operations copy it from/to the page
buffer later.
Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Cc: stable@vger.kernel.org
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-2-frieder.schrempf@kontron.de
Change-Id: I5a47981f004c60d753da382ef6d683a7da1e436b
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| 0d1b2165 | 29-Apr-2019 |
Bartosz Golaszewski <bgolaszewski@baylibre.com> |
UPSTREAM: nand: davinci: remove dead code for dm644x
The support for DaVinci DM* SoCs has been dropped. The code that used
to be relevant to dm644x is no longer needed. Remove it.
Change-Id: I202b8
UPSTREAM: nand: davinci: remove dead code for dm644x
The support for DaVinci DM* SoCs has been dropped. The code that used
to be relevant to dm644x is no longer needed. Remove it.
Change-Id: I202b85f5f963d82dea73f0b7b88430134f00ba88
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit a7fc3d7c687e4b7b61784ee7a13fd9e054a18e17)
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| 0cc120e3 | 17-Apr-2019 |
Gregory CLEMENT <gregory.clement@bootlin.com> |
UPSTREAM: mtd: nand: raw: Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior
The purpose of "mtd: nand: raw: allow to disable unneeded ECC layouts"
was to allow disabling the default ECC layouts if a dr
UPSTREAM: mtd: nand: raw: Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior
The purpose of "mtd: nand: raw: allow to disable unneeded ECC layouts"
was to allow disabling the default ECC layouts if a driver is known to
provide its own ECC layout. However, this commit did the opposite and
disabled the default layout when it was _not_ selected.
It breaks all the NAND drivers not providing their own ECC layout this
patch fix this situation.
It was tested with the lpc32xx_nand_slc driver.
Fixes: a38c3af868 ("mtd: nand: raw: allow to disable unneeded ECC layouts")
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Change-Id: I5bb978707782b690533152aaf71f34e10387fc6d
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tested-by: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 5f626e78491c95dbf3e5036cc0c67aea8b1746fd)
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| 8eea0cf1 | 15-Mar-2019 |
Philippe Reynes <philippe.reynes@softathome.com> |
UPSTREAM: drivers: nand: brcmnand: add an option to read the write-protect from device tree
The option write-protect may only change on the kernel command line,
we add a property in the device tree
UPSTREAM: drivers: nand: brcmnand: add an option to read the write-protect from device tree
The option write-protect may only change on the kernel command line,
we add a property in the device tree to be more flexible.
Change-Id: I9b09732a963f89571b723b66c62978aacf274a98
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit f917438772c7c7da7f30e9209d9f100edac0255e)
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