xref: /rk3399_rockchip-uboot/arch/arm/mach-rockchip/Kconfig (revision b2ee20d32b42b15d4336b15744e0d0eca8f389ae)
1if ARCH_ROCKCHIP
2
3config ROCKCHIP_PX30
4	bool "Support Rockchip PX30"
5	select ARM64 if !ARM64_BOOT_AARCH32
6	select GICV2
7	select ARM_SMCCC
8	select SUPPORT_SPL
9	select SUPPORT_TPL
10	select SPL if !ARM64_BOOT_AARCH32
11	select TPL if !ARM64_BOOT_AARCH32
12	select TPL_TINY_FRAMEWORK if TPL
13
14	imply SPL_SEPARATE_BSS
15	imply SPL_SERIAL_SUPPORT
16	imply TPL_SERIAL_SUPPORT
17	select DEBUG_UART_BOARD_INIT
18	help
19	  The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35
20	  including NEON and GPU, Mali-400 graphics, several DDR3 options
21	  and video codec support. Peripherals include Gigabit Ethernet,
22	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
23
24if ROCKCHIP_PX30
25
26config TPL_LDSCRIPT
27	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
28
29config TPL_TEXT_BASE
30	default 0xff0e1000
31
32config TPL_MAX_SIZE
33	default 10240
34
35config ROCKCHIP_RK3326
36	bool "Support Rockchip RK3326 "
37	help
38	  RK3326 can use most code from PX30, but at some situations we have
39	  to distinguish between RK3326 and PX30, so this macro gives help.
40	  It is usually selected in rk3326 board defconfig.
41endif
42
43config ROCKCHIP_RK3036
44	bool "Support Rockchip RK3036"
45	select CPU_V7
46	select SUPPORT_SPL
47	select SUPPORT_TPL
48	select SPL
49	select TPL
50	select BOARD_LATE_INIT
51	select ROCKCHIP_BROM_HELPER
52	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
53	select TPL_NEEDS_SEPARATE_STACK if TPL
54	select DEBUG_UART_BOARD_INIT
55	select ARM_SMCCC
56	help
57	  The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
58	  including NEON and GPU, Mali-400 graphics, several DDR3 options
59	  and video codec support. Peripherals include Gigabit Ethernet,
60	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
61
62config ROCKCHIP_RK3128
63	bool "Support Rockchip RK3128"
64	select CPU_V7
65	select GICV2
66	select ARM_SMCCC
67	help
68	  The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
69	  including NEON and GPU, Mali-400 graphics, several DDR3 options
70	  and video codec support. Peripherals include Gigabit Ethernet,
71	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
72
73if ROCKCHIP_RK3128
74
75config ROCKCHIP_RK3126
76	bool "Support Rockchip RK3126 "
77	help
78	  RK3126 can use most code from RK3128, but at some situations we have
79	  to distinguish between RK3126 and RK3128, so this macro gives help.
80	  It is usually selected in rk3126 board defconfig.
81
82config ROCKCHIP_PX3SE
83	bool "Support Rockchip PX3SE"
84	help
85	  PX3SE is a variant of RK3128, it shares codes with RK3128, but we still
86	  need this macro to distinguish PX3SE and RK3128.
87endif
88
89config ROCKCHIP_RK3066
90	bool "Support Rockchip RK3066"
91	select CPU_V7
92	select SUPPORT_SPL
93	select SUPPORT_TPL
94	select SPL
95	select TPL
96	select BOARD_LATE_INIT
97	select ROCKCHIP_BROM_HELPER
98	select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
99	help
100	  The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9
101	  including NEON and GPU, Mali-400 graphics, several DDR3 options
102	  and video codec support. Peripherals include ethernet, USB2 host
103	  and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
104
105config ROCKCHIP_RK3188
106	bool "Support Rockchip RK3188"
107	select CPU_V7
108	select SPL_BOARD_INIT if SPL
109	select SUPPORT_SPL
110	select SPL
111	select SPL_CLK
112	select SPL_REGMAP
113	select SPL_SYSCON
114	select SPL_RAM
115	select SPL_DRIVERS_MISC_SUPPORT
116	select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
117	select BOARD_LATE_INIT
118	select ROCKCHIP_BROM_HELPER
119	help
120	  The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
121	  including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
122	  video interfaces, several memory options and video codec support.
123	  Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
124	  UART, SPI, I2C and PWMs.
125
126config ROCKCHIP_RK322X
127	bool "Support Rockchip RK3228/RK3229"
128	select CPU_V7
129	select SUPPORT_SPL
130	select SUPPORT_TPL
131	select SPL
132	select TPL
133	select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
134	select TPL_NEEDS_SEPARATE_STACK if TPL
135	select SPL_DRIVERS_MISC_SUPPORT
136	imply SPL_SERIAL_SUPPORT
137	imply TPL_SERIAL_SUPPORT
138	select ROCKCHIP_BROM_HELPER
139	select DEBUG_UART_BOARD_INIT
140	select TPL_LIBCOMMON_SUPPORT
141	select TPL_LIBGENERIC_SUPPORT
142	select GICV2
143	select ARM_SMCCC
144	help
145	  The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
146	  including NEON and GPU, Mali-400 graphics, several DDR3 options
147	  and video codec support. Peripherals include Gigabit Ethernet,
148	  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
149
150if ROCKCHIP_RK322X
151
152config ROCKCHIP_RK3128X
153	bool "Support Rockchip RK3128X "
154	help
155	  RK3128X can use most code from RK322X, but at some situations we have
156	  to distinguish between RK3128X and RK322X, so this macro gives help.
157	  It is usually selected in RK3128X board defconfig.
158endif
159
160config ROCKCHIP_RK3288
161	bool "Support Rockchip RK3288"
162	select CPU_V7
163	select SPL_BOARD_INIT if SPL
164	select SUPPORT_SPL
165	select SUPPORT_TPL
166	select SPL
167	select TPL
168	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
169	select TPL_NEEDS_SEPARATE_STACK if TPL
170	imply TPL_SERIAL_SUPPORT
171	select GICV2
172	select ARM_SMCCC
173	select SPL_OPTEE
174	select FIT
175	select SPL_LOAD_FIT
176	select TPL_LIBCOMMON_SUPPORT
177	select TPL_LIBGENERIC_SUPPORT
178	select TPL_SYS_MALLOC_SIMPLE
179	select TPL_BOOTROM_SUPPORT
180	select TPL_DRIVERS_MISC_SUPPORT
181	select TPL_OF_CONTROL
182	select TPL_DM
183	select TPL_REGMAP
184	select TPL_SYSCON
185	select TPL_RAM
186	select TPL_CLK
187	select TPL_TINY_MEMSET
188	help
189	  The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
190	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
191	  video interfaces supporting HDMI and eDP, several DDR3 options
192	  and video codec support. Peripherals include Gigabit Ethernet,
193	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
194
195if ROCKCHIP_RK3288
196config SPL_FIT_GENERATOR
197	default "arch/arm/mach-rockchip/make_fit_optee.sh"
198
199config TPL_LDSCRIPT
200	default "arch/arm/mach-rockchip/u-boot-tpl.lds"
201
202config TPL_TEXT_BASE
203	default 0xff704000
204
205config TPL_MAX_SIZE
206	default 32768
207
208config TPL_STACK
209	default 0xff718000
210
211endif
212
213config ROCKCHIP_RK3308
214	bool "Support Rockchip RK3308"
215	select ARM64 if !ARM64_BOOT_AARCH32
216	select DEBUG_UART_BOARD_INIT
217	select ARM_SMCCC
218	select GICV2
219	select SUPPORT_SPL if !ARM64_BOOT_AARCH32
220	select SUPPORT_TPL if !ARM64_BOOT_AARCH32
221	select SPL if !ARM64_BOOT_AARCH32
222	select TPL if !ARM64_BOOT_AARCH32
223	imply SPL_CLK
224	imply SPL_REGMAP
225	imply SPL_SYSCON
226	imply SPL_RAM
227	imply SPL_SERIAL_SUPPORT
228	imply TPL_SERIAL_SUPPORT
229	imply SPL_SEPARATE_BSS
230	help
231	  The Rockchip RK3308 is a ARM-based Soc which embeded with quad
232	  Cortex-A35 and highly integrated audio interfaces.
233
234config ROCKCHIP_RK3328
235	bool "Support Rockchip RK3328"
236	select ARM64
237	select GICV2
238	select SUPPORT_SPL
239	select SUPPORT_TPL
240	select SPL
241	select TPL
242	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
243	select TPL_NEEDS_SEPARATE_STACK if TPL
244	imply SPL_SERIAL_SUPPORT
245	imply TPL_SERIAL_SUPPORT
246	imply SPL_SEPARATE_BSS
247	select DEBUG_UART_BOARD_INIT
248	select ARM_SMCCC
249	help
250	  The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
251	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
252	  video interfaces supporting HDMI and eDP, several DDR3 options
253	  and video codec support. Peripherals include Gigabit Ethernet,
254	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
255
256if ROCKCHIP_RK3328
257
258config TPL_LDSCRIPT
259	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
260
261config TPL_TEXT_BASE
262        default 0xff091000
263
264config TPL_MAX_SIZE
265        default 28672
266
267config TPL_STACK
268        default 0xff098000
269
270endif
271
272config ROCKCHIP_RK3368
273	bool "Support Rockchip RK3368"
274	select ARM64
275	select SUPPORT_SPL
276	select SUPPORT_TPL
277	select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
278	select TPL_NEEDS_SEPARATE_STACK if TPL
279	imply SPL_SEPARATE_BSS
280	imply SPL_SERIAL_SUPPORT
281	imply TPL_SERIAL_SUPPORT
282	select DEBUG_UART_BOARD_INIT
283	select GICV2
284	select ARM_SMCCC
285	help
286	  The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
287	  into a big and little cluster with 4 cores each) Cortex-A53 including
288	  AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
289	  (for the little cluster), PowerVR G6110 based graphics, one video
290	  output processor supporting LVDS/HDMI/eDP, several DDR3 options and
291	  video codec support.
292
293	  On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
294	  I2S, UARTs, SPI, I2C and PWMs.
295
296if ROCKCHIP_RK3368
297
298config ROCKCHIP_PX5
299	bool "Support Rockchip PX5"
300	help
301	  PX5 is a variant of RK3368, it shares codes with RK3368, but we still
302	  need this macro to distinguish PX5 and RK3368.
303
304config TPL_LDSCRIPT
305	default "arch/arm/mach-rockchip/rk3368/u-boot-tpl.lds"
306
307config TPL_TEXT_BASE
308        default 0xff8c1000
309
310config TPL_MAX_SIZE
311        default 28672
312
313config TPL_STACK
314        default 0xff8cffff
315
316endif
317
318config ROCKCHIP_RK3399
319	bool "Support Rockchip RK3399"
320	select ARM64
321	select SUPPORT_SPL
322	select SUPPORT_TPL
323	select SPL
324	select TPL
325	select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
326	select TPL_NEEDS_SEPARATE_STACK if TPL
327	imply TPL_SERIAL_SUPPORT
328	select SPL_SEPARATE_BSS
329	select SPL_SERIAL_SUPPORT
330	select SPL_DRIVERS_MISC_SUPPORT
331	select DEBUG_UART_BOARD_INIT
332	select GICV3
333	select BOARD_LATE_INIT
334	select ROCKCHIP_BROM_HELPER
335	select ARM_SMCCC
336	select TPL_LIBCOMMON_SUPPORT
337	select TPL_LIBGENERIC_SUPPORT
338	select TPL_SYS_MALLOC_SIMPLE
339	select TPL_BOOTROM_SUPPORT
340	select TPL_DRIVERS_MISC_SUPPORT
341	select TPL_OF_CONTROL
342	select TPL_DM
343	select TPL_REGMAP
344	select TPL_SYSCON
345	select TPL_RAM
346	select TPL_CLK
347	select TPL_TINY_MEMSET
348	help
349	  The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
350	  and quad-core Cortex-A53.
351	  including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
352	  video interfaces supporting HDMI and eDP, several DDR3 options
353	  and video codec support. Peripherals include Gigabit Ethernet,
354	  USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
355
356if ROCKCHIP_RK3399
357
358config ROCKCHIP_RK3399PRO
359	bool "Support Rockchip RK3399Pro"
360
361config TPL_LDSCRIPT
362	default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
363
364config TPL_TEXT_BASE
365        default 0xff8c2000
366
367config TPL_MAX_SIZE
368        default 188416
369
370config TPL_STACK
371        default 0xff8effff
372
373endif
374
375config ROCKCHIP_RK1808
376	bool "Support Rockchip RK1808"
377	select ARM64
378	select ARM_SMCCC
379	select GICV3 if !COPROCESSOR_RK1808
380	select DEBUG_UART_BOARD_INIT
381	help
382	  The Rockchip RK1808 is a ARM-based Soc which embedded with dual
383	  Cortex-A35.
384
385if ROCKCHIP_RK1808
386
387config COPROCESSOR_RK1808
388	bool "RK1808 coprocessor"
389	help
390	  This indicates the RK1808 is working as a coprocessor for another
391	  more powerful SoC.
392
393endif
394
395config ROCKCHIP_RV1108
396	bool "Support Rockchip RV1108"
397	select CPU_V7
398	select SUPPORT_SPL
399	select SUPPORT_TPL
400	select SPL
401	select TPL
402	select BOARD_LATE_INIT
403	help
404	  The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
405	  and a DSP.
406
407if ROCKCHIP_RV1108
408
409config TPL_LDSCRIPT
410        default "arch/arm/mach-rockchip/u-boot-tpl.lds"
411
412config TPL_TEXT_BASE
413        default 0x10080800
414
415config TPL_MAX_SIZE
416        default 6144
417
418config TPL_STACK
419        default 0x10082000
420
421endif
422
423config SPL_ROCKCHIP_BACK_TO_BROM
424	bool "SPL returns to bootrom"
425	default y if ROCKCHIP_RK3036
426	select ROCKCHIP_BROM_HELPER
427	depends on SPL
428	help
429	  Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
430          SPL will return to the boot rom, which will then load the U-Boot
431          binary to keep going on.
432
433config TPL_ROCKCHIP_BACK_TO_BROM
434	bool "TPL returns to bootrom"
435	default y
436	select ROCKCHIP_BROM_HELPER
437	depends on TPL
438	help
439	  Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
440          SPL will return to the boot rom, which will then load the U-Boot
441          binary to keep going on.
442
443config ARM64_BOOT_AARCH32
444	bool "Support Boot an ARM64 on AArch32 execution state"
445	select CPU_V7
446	default n
447	help
448	  If you want to boot an ARM64 processor on 32-bit mode, say y here.
449
450config ROCKCHIP_BOOT_MODE_REG
451	hex "Rockchip boot mode flag register address"
452	default 0xff010200 if ROCKCHIP_PX30
453	default 0x200081c8 if ROCKCHIP_RK3036
454	default 0x100a0038 if ROCKCHIP_RK3128
455	default 0x20004040 if ROCKCHIP_RK3188
456	default 0x110005c8 if ROCKCHIP_RK322X
457	default 0xff730094 if ROCKCHIP_RK3288
458	default 0xff000500 if ROCKCHIP_RK3308
459	default 0xff1005c8 if ROCKCHIP_RK3328
460	default 0xff738200 if ROCKCHIP_RK3368
461	default 0xff320300 if ROCKCHIP_RK3399
462	default 0xfe020200 if ROCKCHIP_RK1808
463	default 0x10300580 if ROCKCHIP_RV1108
464	default 0
465	help
466	  The Soc will enter to different boot mode(defined in asm/arch/boot_mode.h)
467	  according to the value from this register.
468
469config ROCKCHIP_STIMER_BASE
470	hex "Rockchip Secure timer base address"
471	default 0xff220020 if ROCKCHIP_PX30
472	default 0x200440a0 if ROCKCHIP_RK3036
473	default 0x2000e000 if ROCKCHIP_RK3066
474	default 0x20018020 if ROCKCHIP_RK3126
475	default 0x200440a0 if ROCKCHIP_RK3128
476	default 0x2000e000 if ROCKCHIP_RK3188
477	default 0x110d0020 if ROCKCHIP_RK322X
478	default 0xff810020 if ROCKCHIP_RK3288
479	default 0xff1d0020 if ROCKCHIP_RK3328
480	default 0xff830020 if ROCKCHIP_RK3368
481	default 0xff8680a0 if ROCKCHIP_RK3399
482	default 0x10350020 if ROCKCHIP_RV1108
483	default 0
484	help
485	  The secure timer inited in SPL/TPL in secure word, ARM generic timer
486	  works after this timer work.
487
488config ROCKCHIP_IRAM_START_ADDR
489	hex "Rockchip Secure timer base address"
490	default 0xff0e0000 if ROCKCHIP_PX30
491	default 0x10080000 if ROCKCHIP_RK3036
492	default 0x10080000 if ROCKCHIP_RK3128
493	default 0x10080000 if ROCKCHIP_RK3188
494	default 0x10080000 if ROCKCHIP_RK322X
495	default 0xff700000 if ROCKCHIP_RK3288
496	default 0xfff80000 if ROCKCHIP_RK3308
497	default 0xff091000 if ROCKCHIP_RK3328
498	default 0xff8c0000 if ROCKCHIP_RK3368
499	default 0xff8c0000 if ROCKCHIP_RK3399
500	default 0x10080000 if ROCKCHIP_RV1108
501	default 0
502	help
503	  The IRAM start addr is to locate variant of the boot device from
504	  bootrom.
505
506config ROCKCHIP_SPL_RESERVE_IRAM
507	hex "Size of IRAM reserved in SPL"
508	default 0
509	help
510	  SPL may need reserve memory for firmware loaded by SPL, whose load
511	  address is in IRAM and may overlay with SPL text area if not
512	  reserved.
513
514config ROCKCHIP_BROM_HELPER
515	bool
516
517config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
518        bool "SPL requires early-return (for RK3188-style BROM) to BROM"
519	depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
520	help
521	  Some Rockchip BROM variants (e.g. on the RK3188) load the
522	  first stage in segments and enter multiple times. E.g. on
523	  the RK3188, the first 1KB of the first stage are loaded
524	  first and entered; after returning to the BROM, the
525	  remainder of the first stage is loaded, but the BROM
526	  re-enters at the same address/to the same code as previously.
527
528	  This enables support code in the BOOT0 hook for the SPL stage
529	  to allow multiple entries.
530
531config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
532        bool "TPL requires early-return (for RK3188-style BROM) to BROM"
533	depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
534	help
535	  Some Rockchip BROM variants (e.g. on the RK3188) load the
536	  first stage in segments and enter multiple times. E.g. on
537	  the RK3188, the first 1KB of the first stage are loaded
538	  first and entered; after returning to the BROM, the
539	  remainder of the first stage is loaded, but the BROM
540	  re-enters at the same address/to the same code as previously.
541
542	  This enables support code in the BOOT0 hook for the TPL stage
543	  to allow multiple entries.
544
545config SPL_MMC_SUPPORT
546	default y if !SPL_ROCKCHIP_BACK_TO_BROM
547
548config RKIMG_BOOTLOADER
549	bool "Support for Rockchip Image Bootloader boot flow"
550	default n
551	help
552	  Rockchip use this to boot Android during development cycle and for
553	  other OS, typical content kernel.img with zImage/Image, boot.img and
554	  recovery.img with Ramdisk, packed with 'KNRL' header; and resource.img
555	  with dtb and uboot/kernel logo bmp, vendor storage for custom info
556	  like SN and MAC address.
557
558config RKIMG_ANDROID_BOOTMODE_LEGACY
559	bool "Support set androidboot.mode with legacy rule"
560	depends on RKIMG_BOOTLOADER
561	default n
562	help
563	  Rockchip set "androidboot.mode=" as "charger" or boot media for android,
564	  which is a rockchip private solution(SDK < 8.1) and deprecated.
565
566config ROCKCHIP_RESOURCE_IMAGE
567	bool "Enable support for rockchip resource image"
568	depends on RKIMG_BOOTLOADER
569	default y
570	help
571	  This enables support to get dtb or logo files from
572	  rockchip resource image format partition.
573
574config ROCKCHIP_EARLY_DISTRO_DTB
575	bool "Enable support for distro dtb early"
576	depends on DISTRO_DEFAULTS && USING_KERNEL_DTB
577	default n
578	help
579	  This enables loading dtb from distro bootable partition when there
580	  is no valid dtb in android boot.img and rockchip resource.img.
581
582if ROCKCHIP_EARLY_DISTRO_DTB
583
584config ROCKCHIP_EARLY_DISTRO_DTB_PATH
585	string "/rk-kernel.dtb"
586	help
587	  "DTB file path in the bootable partition image"
588endif
589
590config ROCKCHIP_VENDOR_PARTITION
591	bool "Rockchip vendor storage partition support"
592	depends on RKIMG_BOOTLOADER
593	help
594	  This enable support to read/write vendor configuration data from/to
595	  this partition.
596
597config USING_KERNEL_DTB
598	bool "Using dtb from Kernel/resource for U-Boot"
599	depends on RKIMG_BOOTLOADER && OF_LIVE
600	default y
601	help
602	  This enable support to read dtb from resource and use it for U-Boot,
603	  the uart and emmc will still using U-Boot dtb, but other devices like
604	  regulator/pmic, display, usb will use dts node from kernel.
605
606config ROCKCHIP_CRC
607	bool "Rockchip CRC verify images"
608	help
609	  This enable support Rockchip CRC verify images. It takes a lot of time,
610	  so it is better only used for debug.
611
612config ROCKCHIP_SMCCC
613	bool "Rockchip SMCCC"
614	default y if ARM_SMCCC
615	help
616	  This enable support for Rockchip SMC calls
617
618config ROCKCHIP_DEBUGGER
619	bool "Rockchip debugger"
620	depends on IRQ
621	help
622	  This enable support for Rockchip debugger. Now we install a timer interrupt
623	  and dump pt_regs when the timeout event trigger. This helps us to know cpu
624	  state when system hang.
625
626config ROCKCHIP_CRASH_DUMP
627	bool "Rockchip crash dump registers"
628	help
629	  This enable dump registers when system crash, the registers you would like
630	  to dump can be added in show_regs().
631
632config ROCKCHIP_PRELOADER_ATAGS
633	bool "Rockchip pre-loader atags"
634	default y if ARCH_ROCKCHIP
635	help
636	  This enable support Rockchip atags among pre-loaders, i.e. ddr, miniloader, ATF,
637	  tos, U-Boot, etc. It delivers boot and configure information, shared with pre-loaders
638	  and finally ends with U-Boot.
639
640config ROCKCHIP_PRELOADER_SERIAL
641	bool "Rockchip pre-loader serial"
642	default y if ROCKCHIP_PRELOADER_ATAGS
643	help
644	  This enable U-Boot using pre-loader atags serial configure to initialize console.
645	  It denpends on serial aliases to find pre-loader serial number.
646
647config GICV2
648	bool "ARM GICv2"
649
650config GICV3
651	bool "ARM GICv3"
652
653source "arch/arm/mach-rockchip/px30/Kconfig"
654source "arch/arm/mach-rockchip/rk3036/Kconfig"
655source "arch/arm/mach-rockchip/rk3066/Kconfig"
656source "arch/arm/mach-rockchip/rk3128/Kconfig"
657source "arch/arm/mach-rockchip/rk3188/Kconfig"
658source "arch/arm/mach-rockchip/rk322x/Kconfig"
659source "arch/arm/mach-rockchip/rk3288/Kconfig"
660source "arch/arm/mach-rockchip/rk3308/Kconfig"
661source "arch/arm/mach-rockchip/rk3328/Kconfig"
662source "arch/arm/mach-rockchip/rk3368/Kconfig"
663source "arch/arm/mach-rockchip/rk3399/Kconfig"
664source "arch/arm/mach-rockchip/rk1808/Kconfig"
665source "arch/arm/mach-rockchip/rv1108/Kconfig"
666endif
667