1 /* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <amp.h> 9 #include <android_bootloader.h> 10 #include <android_image.h> 11 #include <bidram.h> 12 #include <boot_rkimg.h> 13 #include <cli.h> 14 #include <clk.h> 15 #include <console.h> 16 #include <debug_uart.h> 17 #include <dm.h> 18 #include <dvfs.h> 19 #include <io-domain.h> 20 #include <image.h> 21 #include <key.h> 22 #include <memblk.h> 23 #include <misc.h> 24 #include <of_live.h> 25 #include <ram.h> 26 #include <rockchip_debugger.h> 27 #include <syscon.h> 28 #include <sysmem.h> 29 #include <video_rockchip.h> 30 #include <asm/io.h> 31 #include <asm/gpio.h> 32 #include <dm/uclass-internal.h> 33 #include <dm/root.h> 34 #include <power/charge_display.h> 35 #include <power/regulator.h> 36 #include <optee_include/OpteeClientInterface.h> 37 #include <asm/arch/boot_mode.h> 38 #include <asm/arch/clock.h> 39 #include <asm/arch/cpu.h> 40 #include <asm/arch/hotkey.h> 41 #include <asm/arch/param.h> 42 #include <asm/arch/periph.h> 43 #include <asm/arch/resource_img.h> 44 #include <asm/arch/rk_atags.h> 45 #include <asm/arch/vendor.h> 46 47 DECLARE_GLOBAL_DATA_PTR; 48 49 __weak int rk_board_late_init(void) 50 { 51 return 0; 52 } 53 54 __weak int rk_board_fdt_fixup(void *blob) 55 { 56 return 0; 57 } 58 59 __weak int soc_clk_dump(void) 60 { 61 return 0; 62 } 63 64 __weak int set_armclk_rate(void) 65 { 66 return 0; 67 } 68 69 __weak int rk_board_init(void) 70 { 71 return 0; 72 } 73 74 /* 75 * define serialno max length, the max length is 512 Bytes 76 * The remaining bytes are used to ensure that the first 512 bytes 77 * are valid when executing 'env_set("serial#", value)'. 78 */ 79 #define VENDOR_SN_MAX 513 80 #define CPUID_LEN 0x10 81 #define CPUID_OFF 0x07 82 83 static int rockchip_set_ethaddr(void) 84 { 85 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 86 char buf[ARP_HLEN_ASCII + 1]; 87 u8 ethaddr[ARP_HLEN]; 88 int ret; 89 90 ret = vendor_storage_read(VENDOR_LAN_MAC_ID, ethaddr, sizeof(ethaddr)); 91 if (ret > 0 && is_valid_ethaddr(ethaddr)) { 92 sprintf(buf, "%pM", ethaddr); 93 env_set("ethaddr", buf); 94 } 95 #endif 96 return 0; 97 } 98 99 static int rockchip_set_serialno(void) 100 { 101 u8 low[CPUID_LEN / 2], high[CPUID_LEN / 2]; 102 u8 cpuid[CPUID_LEN] = {0}; 103 char serialno_str[VENDOR_SN_MAX]; 104 int ret = 0, i; 105 u64 serialno; 106 107 /* Read serial number from vendor storage part */ 108 memset(serialno_str, 0, VENDOR_SN_MAX); 109 110 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 111 ret = vendor_storage_read(VENDOR_SN_ID, serialno_str, (VENDOR_SN_MAX-1)); 112 if (ret > 0) { 113 i = strlen(serialno_str); 114 for (; i > 0; i--) { 115 if ((serialno_str[i] >= 'a' && serialno_str[i] <= 'z') || 116 (serialno_str[i] >= 'A' && serialno_str[i] <= 'Z') || 117 (serialno_str[i] >= '0' && serialno_str[i] <= '9')) 118 break; 119 } 120 121 serialno_str[i + 1] = 0x0; 122 env_set("serial#", serialno_str); 123 } else { 124 #endif 125 #ifdef CONFIG_ROCKCHIP_EFUSE 126 struct udevice *dev; 127 128 /* retrieve the device */ 129 ret = uclass_get_device_by_driver(UCLASS_MISC, 130 DM_GET_DRIVER(rockchip_efuse), 131 &dev); 132 if (ret) { 133 printf("%s: could not find efuse device\n", __func__); 134 return ret; 135 } 136 137 /* read the cpu_id range from the efuses */ 138 ret = misc_read(dev, CPUID_OFF, &cpuid, sizeof(cpuid)); 139 if (ret) { 140 printf("%s: read cpuid from efuses failed, ret=%d\n", 141 __func__, ret); 142 return ret; 143 } 144 #else 145 /* generate random cpuid */ 146 for (i = 0; i < CPUID_LEN; i++) 147 cpuid[i] = (u8)(rand()); 148 #endif 149 /* Generate the serial number based on CPU ID */ 150 for (i = 0; i < 8; i++) { 151 low[i] = cpuid[1 + (i << 1)]; 152 high[i] = cpuid[i << 1]; 153 } 154 155 serialno = crc32_no_comp(0, low, 8); 156 serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32; 157 snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno); 158 159 env_set("serial#", serialno_str); 160 #ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION 161 } 162 #endif 163 164 return ret; 165 } 166 167 #if defined(CONFIG_USB_FUNCTION_FASTBOOT) 168 int fb_set_reboot_flag(void) 169 { 170 printf("Setting reboot to fastboot flag ...\n"); 171 writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG); 172 173 return 0; 174 } 175 #endif 176 177 #ifdef CONFIG_ROCKCHIP_USB_BOOT 178 static int boot_from_udisk(void) 179 { 180 struct blk_desc *desc; 181 char *devtype; 182 char *devnum; 183 184 devtype = env_get("devtype"); 185 devnum = env_get("devnum"); 186 187 /* Booting priority: mmc1 > udisk */ 188 if (!strcmp(devtype, "mmc") && !strcmp(devnum, "1")) 189 return 0; 190 191 if (!run_command("usb start", -1)) { 192 desc = blk_get_devnum_by_type(IF_TYPE_USB, 0); 193 if (!desc) { 194 printf("No usb device found\n"); 195 return -ENODEV; 196 } 197 198 if (!run_command("rkimgtest usb 0", -1)) { 199 rockchip_set_bootdev(desc); 200 env_set("devtype", "usb"); 201 env_set("devnum", "0"); 202 printf("Boot from usb 0\n"); 203 } else { 204 printf("No usb dev 0 found\n"); 205 return -ENODEV; 206 } 207 } 208 209 return 0; 210 } 211 #endif 212 213 static void env_fixup(void) 214 { 215 struct memblock mem; 216 ulong u_addr_r; 217 phys_size_t end; 218 char *addr_r; 219 220 #ifdef ENV_MEM_LAYOUT_SETTINGS1 221 const char *env_addr0[] = { 222 "scriptaddr", "pxefile_addr_r", 223 "fdt_addr_r", "kernel_addr_r", "ramdisk_addr_r", 224 }; 225 const char *env_addr1[] = { 226 "scriptaddr1", "pxefile_addr1_r", 227 "fdt_addr1_r", "kernel_addr1_r", "ramdisk_addr1_r", 228 }; 229 int i; 230 231 /* 128M is a typical ram size for most platform, so as default here */ 232 if (gd->ram_size <= SZ_128M) { 233 /* Replace orignal xxx_addr_r */ 234 for (i = 0; i < ARRAY_SIZE(env_addr1); i++) { 235 addr_r = env_get(env_addr1[i]); 236 if (addr_r) 237 env_set(env_addr0[i], addr_r); 238 } 239 } 240 #endif 241 /* If bl32 is disabled, maybe kernel can be load to lower address. */ 242 if (!(gd->flags & GD_FLG_BL32_ENABLED)) { 243 addr_r = env_get("kernel_addr_no_bl32_r"); 244 if (addr_r) 245 env_set("kernel_addr_r", addr_r); 246 /* If bl32 is enlarged, we move ramdisk addr right behind it */ 247 } else { 248 mem = param_parse_optee_mem(); 249 end = mem.base + mem.size; 250 u_addr_r = env_get_ulong("ramdisk_addr_r", 16, 0); 251 if (u_addr_r >= mem.base && u_addr_r < end) 252 env_set_hex("ramdisk_addr_r", end); 253 } 254 } 255 256 static void cmdline_handle(void) 257 { 258 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 259 struct tag *t; 260 261 t = atags_get_tag(ATAG_PUB_KEY); 262 if (t) { 263 /* Pass if efuse/otp programmed */ 264 if (t->u.pub_key.flag == PUBKEY_FUSE_PROGRAMMED) 265 env_update("bootargs", "fuse.programmed=1"); 266 else 267 env_update("bootargs", "fuse.programmed=0"); 268 } 269 #endif 270 } 271 272 int board_late_init(void) 273 { 274 rockchip_set_ethaddr(); 275 rockchip_set_serialno(); 276 setup_download_mode(); 277 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 278 setup_boot_mode(); 279 #endif 280 #ifdef CONFIG_ROCKCHIP_USB_BOOT 281 boot_from_udisk(); 282 #endif 283 #ifdef CONFIG_DM_CHARGE_DISPLAY 284 charge_display(); 285 #endif 286 #ifdef CONFIG_DRM_ROCKCHIP 287 rockchip_show_logo(); 288 #endif 289 env_fixup(); 290 soc_clk_dump(); 291 cmdline_handle(); 292 293 return rk_board_late_init(); 294 } 295 296 static void early_download(void) 297 { 298 #if defined(CONFIG_PWRKEY_DNL_TRIGGER_NUM) && \ 299 (CONFIG_PWRKEY_DNL_TRIGGER_NUM > 0) 300 if (pwrkey_download_init()) 301 printf("Pwrkey download init failed\n"); 302 #endif 303 304 #if (CONFIG_ROCKCHIP_BOOT_MODE_REG > 0) 305 if (is_hotkey(HK_BROM_DNL)) { 306 printf("Enter bootrom download..."); 307 flushc(); 308 writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG); 309 do_reset(NULL, 0, 0, NULL); 310 printf("failed!\n"); 311 } 312 #endif 313 } 314 315 static void board_debug_init(void) 316 { 317 if (!gd->serial.using_pre_serial) 318 board_debug_uart_init(); 319 320 if (tstc()) { 321 gd->console_evt = getc(); 322 if (gd->console_evt <= 0x1a) /* 'z' */ 323 printf("Hotkey: ctrl+%c\n", gd->console_evt + 'a' - 1); 324 } 325 326 if (IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI)) 327 printf("CLI: off\n"); 328 } 329 330 int board_init(void) 331 { 332 board_debug_init(); 333 334 #ifdef DEBUG 335 soc_clk_dump(); 336 #endif 337 338 #ifdef CONFIG_USING_KERNEL_DTB 339 init_kernel_dtb(); 340 #endif 341 early_download(); 342 343 /* 344 * pmucru isn't referenced on some platforms, so pmucru driver can't 345 * probe that the "assigned-clocks" is unused. 346 */ 347 clks_probe(); 348 #ifdef CONFIG_DM_REGULATOR 349 if (regulators_enable_boot_on(is_hotkey(HK_REGULATOR))) 350 debug("%s: Can't enable boot on regulator\n", __func__); 351 #endif 352 353 #ifdef CONFIG_ROCKCHIP_IO_DOMAIN 354 io_domain_init(); 355 #endif 356 357 set_armclk_rate(); 358 359 #ifdef CONFIG_DM_DVFS 360 dvfs_init(true); 361 #endif 362 363 return rk_board_init(); 364 } 365 366 int interrupt_debugger_init(void) 367 { 368 #ifdef CONFIG_ROCKCHIP_DEBUGGER 369 return rockchip_debugger_init(); 370 #else 371 return 0; 372 #endif 373 } 374 375 int board_fdt_fixup(void *blob) 376 { 377 /* Common fixup for DRM */ 378 #ifdef CONFIG_DRM_ROCKCHIP 379 rockchip_display_fixup(blob); 380 #endif 381 382 return rk_board_fdt_fixup(blob); 383 } 384 385 #ifdef CONFIG_ARM64_BOOT_AARCH32 386 /* 387 * Fixup MMU region attr for OP-TEE on ARMv8 CPU: 388 * 389 * What ever U-Boot is 64-bit or 32-bit mode, the OP-TEE is always 64-bit mode. 390 * 391 * Command for OP-TEE: 392 * 64-bit mode: dcache is always enabled; 393 * 32-bit mode: dcache is always disabled(Due to some unknown issue); 394 * 395 * Command for U-Boot: 396 * 64-bit mode: MMU table is static defined in rkxxx.c file, all memory 397 * regions are mapped. That's good to match OP-TEE MMU policy. 398 * 399 * 32-bit mode: MMU table is setup according to gd->bd->bi_dram[..] where 400 * the OP-TEE region has been reserved, so it can not be 401 * mapped(i.e. dcache is disabled). That's also good to match 402 * OP-TEE MMU policy. 403 * 404 * For the data coherence when communication between U-Boot and OP-TEE, U-Boot 405 * should follow OP-TEE MMU policy. 406 * 407 * Here is the special: 408 * When CONFIG_ARM64_BOOT_AARCH32 is enabled, U-Boot is 32-bit mode while 409 * OP-TEE is still 64-bit mode. U-Boot would not map MMU table for OP-TEE 410 * region(but OP-TEE requires it cacheable) so we fixup here. 411 */ 412 int board_initr_caches_fixup(void) 413 { 414 struct memblock mem; 415 416 mem = param_parse_optee_mem(); 417 if (mem.size) 418 mmu_set_region_dcache_behaviour(mem.base, mem.size, 419 DCACHE_WRITEBACK); 420 return 0; 421 } 422 #endif 423 424 void arch_preboot_os(uint32_t bootm_state) 425 { 426 if (bootm_state & BOOTM_STATE_OS_PREP) 427 hotkey_run(HK_CLI_OS_PRE); 428 } 429 430 void board_quiesce_devices(void *images) 431 { 432 hotkey_run(HK_CMDLINE); 433 hotkey_run(HK_CLI_OS_GO); 434 435 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 436 /* Destroy atags makes next warm boot safer */ 437 atags_destroy(); 438 #endif 439 440 #ifdef CONFIG_FIT_ROLLBACK_PROTECT 441 /* TODO */ 442 printf("fit: rollback protect not implement\n"); 443 #endif 444 } 445 446 void enable_caches(void) 447 { 448 icache_enable(); 449 dcache_enable(); 450 } 451 452 #ifdef CONFIG_LMB 453 /* 454 * Using last bi_dram[...] to initialize "bootm_low" and "bootm_mapsize". 455 * This makes lmb_alloc_base() always alloc from tail of sdram. 456 * If we don't assign it, bi_dram[0] is used by default and it may cause 457 * lmb_alloc_base() fail when bi_dram[0] range is small. 458 */ 459 void board_lmb_reserve(struct lmb *lmb) 460 { 461 char bootm_mapsize[32]; 462 char bootm_low[32]; 463 u64 start, size; 464 int i; 465 466 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 467 if (!gd->bd->bi_dram[i].size) 468 break; 469 } 470 471 start = gd->bd->bi_dram[i - 1].start; 472 size = gd->bd->bi_dram[i - 1].size; 473 474 /* 475 * 32-bit kernel: ramdisk/fdt shouldn't be loaded to highmem area(768MB+), 476 * otherwise "Unable to handle kernel paging request at virtual address ...". 477 * 478 * So that we hope limit highest address at 768M, but there comes the the 479 * problem: ramdisk is a compressed image and it expands after descompress, 480 * so it accesses 768MB+ and brings the above "Unable to handle kernel ...". 481 * 482 * We make a appointment that the highest memory address is 512MB, it 483 * makes lmb alloc safer. 484 */ 485 #ifndef CONFIG_ARM64 486 if (start >= ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) { 487 start = gd->bd->bi_dram[i - 2].start; 488 size = gd->bd->bi_dram[i - 2].size; 489 } 490 491 if ((start + size) > ((u64)CONFIG_SYS_SDRAM_BASE + SZ_512M)) 492 size = (u64)CONFIG_SYS_SDRAM_BASE + SZ_512M - start; 493 #endif 494 sprintf(bootm_low, "0x%llx", start); 495 sprintf(bootm_mapsize, "0x%llx", size); 496 env_set("bootm_low", bootm_low); 497 env_set("bootm_mapsize", bootm_mapsize); 498 } 499 #endif 500 501 #ifdef CONFIG_BIDRAM 502 int board_bidram_reserve(struct bidram *bidram) 503 { 504 struct memblock mem; 505 int ret; 506 507 /* ATF */ 508 mem = param_parse_atf_mem(); 509 ret = bidram_reserve(MEM_ATF, mem.base, mem.size); 510 if (ret) 511 return ret; 512 513 /* PSTORE/ATAGS/SHM */ 514 mem = param_parse_common_resv_mem(); 515 ret = bidram_reserve(MEM_SHM, mem.base, mem.size); 516 if (ret) 517 return ret; 518 519 /* OP-TEE */ 520 mem = param_parse_optee_mem(); 521 ret = bidram_reserve(MEM_OPTEE, mem.base, mem.size); 522 if (ret) 523 return ret; 524 525 return 0; 526 } 527 528 parse_fn_t board_bidram_parse_fn(void) 529 { 530 return param_parse_ddr_mem; 531 } 532 #endif 533 534 #ifdef CONFIG_ROCKCHIP_AMP 535 void cpu_secondary_init_r(void) 536 { 537 amp_cpus_on(); 538 } 539 #endif 540 541 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) && \ 542 defined(CONFIG_ROCKCHIP_PRELOADER_ATAGS) 543 int board_init_f_init_serial(void) 544 { 545 struct tag *t = atags_get_tag(ATAG_SERIAL); 546 547 if (t) { 548 gd->serial.using_pre_serial = t->u.serial.enable; 549 gd->serial.addr = t->u.serial.addr; 550 gd->serial.baudrate = t->u.serial.baudrate; 551 gd->serial.id = t->u.serial.id; 552 553 debug("%s: enable=%d, addr=0x%lx, baudrate=%d, id=%d\n", 554 __func__, gd->serial.using_pre_serial, 555 gd->serial.addr, gd->serial.baudrate, 556 gd->serial.id); 557 } 558 559 return 0; 560 } 561 #endif 562 563 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) 564 #include <fdt_support.h> 565 #include <usb.h> 566 #include <usb/dwc2_udc.h> 567 568 static struct dwc2_plat_otg_data otg_data = { 569 .rx_fifo_sz = 512, 570 .np_tx_fifo_sz = 16, 571 .tx_fifo_sz = 128, 572 }; 573 574 int board_usb_init(int index, enum usb_init_type init) 575 { 576 const void *blob = gd->fdt_blob; 577 const fdt32_t *reg; 578 fdt_addr_t addr; 579 int node; 580 581 /* find the usb_otg node */ 582 node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2"); 583 584 retry: 585 if (node > 0) { 586 reg = fdt_getprop(blob, node, "reg", NULL); 587 if (!reg) 588 return -EINVAL; 589 590 addr = fdt_translate_address(blob, node, reg); 591 if (addr == OF_BAD_ADDR) { 592 pr_err("Not found usb_otg address\n"); 593 return -EINVAL; 594 } 595 596 #if defined(CONFIG_ROCKCHIP_RK3288) 597 if (addr != 0xff580000) { 598 node = fdt_node_offset_by_compatible(blob, node, 599 "snps,dwc2"); 600 goto retry; 601 } 602 #endif 603 } else { 604 /* 605 * With kernel dtb support, rk3288 dwc2 otg node 606 * use the rockchip legacy dwc2 driver "dwc_otg_310" 607 * with the compatible "rockchip,rk3288_usb20_otg", 608 * and rk3368 also use the "dwc_otg_310" driver with 609 * the compatible "rockchip,rk3368-usb". 610 */ 611 #if defined(CONFIG_ROCKCHIP_RK3288) 612 node = fdt_node_offset_by_compatible(blob, -1, 613 "rockchip,rk3288_usb20_otg"); 614 #elif defined(CONFIG_ROCKCHIP_RK3368) 615 node = fdt_node_offset_by_compatible(blob, -1, 616 "rockchip,rk3368-usb"); 617 #endif 618 if (node > 0) { 619 goto retry; 620 } else { 621 pr_err("Not found usb_otg device\n"); 622 return -ENODEV; 623 } 624 } 625 626 otg_data.regs_otg = (uintptr_t)addr; 627 628 return dwc2_udc_probe(&otg_data); 629 } 630 631 int board_usb_cleanup(int index, enum usb_init_type init) 632 { 633 return 0; 634 } 635 #endif 636 637 static void bootm_no_reloc(void) 638 { 639 char *ramdisk_high; 640 char *fdt_high; 641 642 if (!env_get_yesno("bootm-no-reloc")) 643 return; 644 645 ramdisk_high = env_get("initrd_high"); 646 fdt_high = env_get("fdt_high"); 647 648 if (!fdt_high) { 649 env_set_hex("fdt_high", -1UL); 650 printf("Fdt "); 651 } 652 653 if (!ramdisk_high) { 654 env_set_hex("initrd_high", -1UL); 655 printf("Ramdisk "); 656 } 657 658 if (!fdt_high || !ramdisk_high) 659 printf("skip relocation\n"); 660 } 661 662 int bootm_board_start(void) 663 { 664 /* 665 * print console record data 666 * 667 * On some rockchip platforms, uart debug and sdmmc pin are multiplex. 668 * If boot from sdmmc mode, the console data would be record in buffer, 669 * we switch to uart debug function in order to print it after loading 670 * images. 671 */ 672 #if defined(CONFIG_CONSOLE_RECORD) 673 if (!strcmp("mmc", env_get("devtype")) && 674 !strcmp("1", env_get("devnum"))) { 675 printf("IOMUX: sdmmc => uart debug"); 676 pinctrl_select_state(gd->cur_serial_dev, "default"); 677 console_record_print_purge(); 678 } 679 #endif 680 /* disable bootm relcation to save boot time */ 681 bootm_no_reloc(); 682 683 /* sysmem */ 684 hotkey_run(HK_SYSMEM); 685 sysmem_overflow_check(); 686 687 return 0; 688 } 689 690 /* 691 * Implement it to support CLI command: 692 * - Android: bootm [aosp addr] 693 * - FIT: bootm [fit addr] 694 * - uImage: bootm [uimage addr] 695 * 696 * Purpose: 697 * - The original bootm command args require fdt addr on AOSP, 698 * which is not flexible on rockchip boot/recovery.img. 699 * - Take Android/FIT/uImage image into sysmem management to avoid image 700 * memory overlap. 701 */ 702 #if defined(CONFIG_ANDROID_BOOTLOADER) || \ 703 defined(CONFIG_ROCKCHIP_FIT_IMAGE) || \ 704 defined(CONFIG_ROCKCHIP_UIMAGE) 705 int board_do_bootm(int argc, char * const argv[]) 706 { 707 int format; 708 void *img; 709 710 if (argc != 2) 711 return 0; 712 713 img = (void *)simple_strtoul(argv[1], NULL, 16); 714 format = (genimg_get_format(img)); 715 716 /* Android */ 717 #ifdef CONFIG_ANDROID_BOOT_IMAGE 718 if (format == IMAGE_FORMAT_ANDROID) { 719 struct andr_img_hdr *hdr; 720 ulong load_addr; 721 ulong size; 722 int ret; 723 724 hdr = (struct andr_img_hdr *)img; 725 printf("BOOTM: transferring to board Android\n"); 726 727 #ifdef CONFIG_USING_KERNEL_DTB 728 sysmem_free((phys_addr_t)gd->fdt_blob); 729 /* erase magic */ 730 fdt_set_magic((void *)gd->fdt_blob, ~0); 731 gd->fdt_blob = NULL; 732 #endif 733 load_addr = env_get_ulong("kernel_addr_r", 16, 0); 734 load_addr -= hdr->page_size; 735 size = android_image_get_end(hdr) - (ulong)hdr; 736 737 if (!sysmem_alloc_base(MEM_ANDROID, (ulong)hdr, size)) 738 return -ENOMEM; 739 740 ret = android_image_memcpy_separate(hdr, &load_addr); 741 if (ret) { 742 printf("board do bootm failed, ret=%d\n", ret); 743 return ret; 744 } 745 746 return android_bootloader_boot_kernel(load_addr); 747 } 748 #endif 749 750 /* FIT */ 751 #if IMAGE_ENABLE_FIT 752 if (format == IMAGE_FORMAT_FIT) { 753 char boot_cmd[64]; 754 755 printf("BOOTM: transferring to board FIT\n"); 756 snprintf(boot_cmd, sizeof(boot_cmd), "boot_fit %s", argv[1]); 757 return run_command(boot_cmd, 0); 758 } 759 #endif 760 761 /* uImage */ 762 #if defined(CONFIG_IMAGE_FORMAT_LEGACY) 763 if (format == IMAGE_FORMAT_LEGACY && 764 image_get_type(img) == IH_TYPE_MULTI) { 765 char boot_cmd[64]; 766 767 printf("BOOTM: transferring to board uImage\n"); 768 snprintf(boot_cmd, sizeof(boot_cmd), "boot_uimage %s", argv[1]); 769 return run_command(boot_cmd, 0); 770 } 771 #endif 772 773 return 0; 774 } 775 #endif 776 777 void autoboot_command_fail_handle(void) 778 { 779 #ifdef CONFIG_AVB_VBMETA_PUBLIC_KEY_VALIDATE 780 #ifdef CONFIG_ANDROID_AB 781 run_command("fastboot usb 0;", 0); /* use fastboot to ative slot */ 782 #else 783 run_command("rockusb 0 ${devtype} ${devnum}", 0); 784 run_command("fastboot usb 0;", 0); 785 #endif 786 #endif 787 } 788 789 int fit_board_verify_required_sigs(void) 790 { 791 uint8_t vboot = 0; 792 #ifdef CONFIG_OPTEE_CLIENT 793 int ret; 794 795 ret = trusty_read_vbootkey_enable_flag(&vboot); 796 if (ret) { 797 printf("Can't read verified-boot flag\n"); 798 return 1; 799 } 800 #endif 801 return vboot; 802 } 803