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Searched refs:TOP_CKG_HVD_IDB_240MHZ (Results 1 – 20 of 20) sorted by relevance

/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mustang/hvd_v3/
H A DregHVD_EX.h454 #define TOP_CKG_HVD_IDB_240MHZ BITS(10:8, 1) macro
H A DhalHVD_EX.c3918 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/hvd_v3/
H A DregHVD_EX.h480 #define TOP_CKG_HVD_IDB_240MHZ BITS(10:8, 6) macro
H A DhalHVD_EX.c3951 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/hvd_v3/
H A DregHVD_EX.h481 #define TOP_CKG_HVD_IDB_240MHZ BITS(10:8, 6) macro
H A DhalHVD_EX.c4097 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/hvd_v3/
H A DregHVD_EX.h497 #define TOP_CKG_HVD_IDB_240MHZ BITS(10:8, 6) macro
H A DhalHVD_EX.c4071 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/hvd_v3/
H A DregHVD_EX.h481 #define TOP_CKG_HVD_IDB_240MHZ BITS(10:8, 6) macro
H A DhalHVD_EX.c3992 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/hvd_v3/
H A DregHVD_EX.h482 #define TOP_CKG_HVD_IDB_240MHZ BITS(10:8, 6) macro
H A DhalHVD_EX.c4042 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/hvd_v3/
H A DregHVD_EX.h480 #define TOP_CKG_HVD_IDB_240MHZ BITS(10:8, 6) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/hvd_v3/
H A DregHVD_EX.h497 #define TOP_CKG_HVD_IDB_240MHZ BITS(10:8, 6) macro
H A DhalHVD_EX.c4092 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/hvd_v3/
H A DregHVD_EX.h481 #define TOP_CKG_HVD_IDB_240MHZ BITS(10:8, 6) macro
H A DhalHVD_EX.c4119 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/hvd_v3/
H A DregHVD_EX.h509 #define TOP_CKG_HVD_IDB_240MHZ BITS(10:8, 6) macro
H A DhalHVD_EX.c4045 _HVD_WriteWordMask(REG_TOP_HVD_IDB, TOP_CKG_HVD_IDB_240MHZ, TOP_CKG_HVD_IDB_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/hvd_v3/
H A DregHVD_EX.h734 #define TOP_CKG_HVD_IDB_240MHZ BITS(2:0, 2) // for overclocking macro