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Searched refs:Flt (Results 1 – 25 of 64) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dmx/drv/tsp4/
H A DdrvTSP2.c1459 REG_SecFlt * pSecFlt = &(_REGSec->Flt[u32FltId]); in _TSP_FLT_Init()
1478 HAL_TSP_SecFlt_Free(&(_REGSec->Flt[u32FltId])); in _TSP_FLT_Free()
1530 HAL_TSP_PidFlt_SetFltOut(&(_REGPid->Flt[u32FltId]), TSP_PIDFLT_OUT_NULL); in _TSP_FLT_Disable()
1533 HAL_TSP_SecFlt_PcrReset(&(_REGSec->Flt[u32FltId])); in _TSP_FLT_Disable()
1616 if (HAL_TSP_PidFlt_GetFltOutput(&(_REGPid1->Flt[u32FltId])) & TSP_PIDFLT_OUT_SECFLT) in _TSP_PROC_SecOvf()
1678 bufid = HAL_TSP_SecFlt_GetSecBuf(&(_REGSec->Flt[u32FltId])); in _TSP_PROC_SecRdy()
3785 pSecFlt = &(_REGSec->Flt[i]); in MDrv_TSP_FLT_Alloc_Common()
4090 HAL_TSP_SecFlt_SelSecBuf(&(_REGSec->Flt[u32FltId]), u32BufId); in MDrv_TSP_FLT_SelSEC()
4125 *pu32BufId = (MS_U32)HAL_TSP_SecFlt_GetSecBuf(&(_REGSec->Flt[u32FltId])); in MDrv_TSP_FLT_GetSEC()
4257 *pu32PID = HAL_TSP_PidFlt_GetPid(&(_REGPid0->Flt[u32FltId])); in MDrv_TSP_FLT_GetPID()
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/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DhalTSP.h701 #define PPIDFLT0(_fltid) (&(_REGPid0->Flt[_fltid]))
702 #define PPIDFLT1(_fltid) (&(_REGPid1->Flt[_fltid]))
703 #define PPIDFLT2(_fltid) (&(_REGPid2->Flt[_fltid]))
704 #define PSECFLT(_fltid) (&(((REG_Sec*)(REG_SECFLT_BASE+(_fltid>>5)*0x1000))->Flt[_f…
H A DhalTSP.c713 TSP32_IdrW(&(_REGPid0->Flt[i]), _u32PidFltReg[i]); in HAL_TSP_RestoreFltState()
714 TSP32_IdrW(&(_REGPid1->Flt[i]), _u32PidDstReg[i]); in HAL_TSP_RestoreFltState()
715 TSP32_IdrW(&(_REGPid2->Flt[i]), _u32PidDst2Reg[i]); in HAL_TSP_RestoreFltState()
722 pReg = (TSP32*)&(_REGSec->Flt[i]); in HAL_TSP_RestoreFltState()
4876 _u32PidFltReg[i] = TSP32_IdrR(&(_REGPid0->Flt[i])); in HAL_TSP_SaveFltState()
4877 _u32PidDstReg[i] = TSP32_IdrR(&(_REGPid1->Flt[i])); in HAL_TSP_SaveFltState()
4878 _u32PidDst2Reg[i] = TSP32_IdrR(&(_REGPid2->Flt[i])); in HAL_TSP_SaveFltState()
4884 pReg = (TSP32*)&(_REGSec->Flt[i]); in HAL_TSP_SaveFltState()
H A DregTSP.h417 REG_PidFlt Flt[TSP_PIDFLT_NUM]; // 0x00210000-0x00210007C member
422 REG_SecFlt Flt[TSP_SECFLT_NUM]; member
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DhalTSP.h502 #define PPIDFLT0(_fltid) (&(_REGPid0->Flt[_fltid]))
503 #define PPIDFLT1(_fltid) (&(_REGPid1->Flt[_fltid]))
504 #define PSECFLT(_fltid) (&(((REG_Sec*)(REG_SECFLT_BASE+(_fltid>>5)*0x1000))->Flt[_fl…
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DhalTSP.h530 #define PPIDFLT0(_fltid) (&(_REGPid0->Flt[_fltid]))
531 #define PPIDFLT1(_fltid) (&(_REGPid1->Flt[_fltid]))
532 #define PSECFLT(_fltid) (&(((REG_Sec*)(REG_SECFLT_BASE+(_fltid>>5)*0x1000))->Flt[_fl…
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DhalTSP.h495 #define PPIDFLT0(_fltid) (&(_REGPid0->Flt[_fltid]))
496 #define PPIDFLT1(_fltid) (&(_REGPid1->Flt[_fltid]))
497 #define PSECFLT(_fltid) (&(((REG_Sec*)(REG_SECFLT_BASE+(_fltid>>5)*0x1000))->Flt[_fl…
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DhalTSP.h522 #define PPIDFLT0(_fltid) (&(_REGPid0->Flt[_fltid]))
523 #define PPIDFLT1(_fltid) (&(_REGPid1->Flt[_fltid]))
524 #define PSECFLT(_fltid) (&(((REG_Sec*)(REG_SECFLT_BASE)->Flt[_fltid]))
H A DhalTSP.c595 TSP32_IdrW(&(_REGPid0->Flt[i]), _u32PidFltReg[i]); in HAL_TSP_RestoreFltState()
596 TSP32_IdrW(&(_REGPid1->Flt[i]), _u32PidDstReg[i]); in HAL_TSP_RestoreFltState()
603 pReg = (TSP32*)&(_REGSec->Flt[i]); in HAL_TSP_RestoreFltState()
5400 _u32PidFltReg[i] = TSP32_IdrR(&(_REGPid0->Flt[i])); in HAL_TSP_SaveFltState()
5401 _u32PidDstReg[i] = TSP32_IdrR(&(_REGPid1->Flt[i])); in HAL_TSP_SaveFltState()
5407 pReg = (TSP32*)&(_REGSec->Flt[i]); in HAL_TSP_SaveFltState()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DhalTSP.h509 #define PPIDFLT0(_fltid) (&(_REGPid0->Flt[_fltid]))
510 #define PPIDFLT1(_fltid) (&(_REGPid1->Flt[_fltid]))
511 #define PSECFLT(_fltid) (&(((REG_Sec*)(REG_SECFLT_BASE+(_fltid>>5)*0x1000))->Flt[_fl…
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DhalTSP.h642 #define PPIDFLT0(_fltid) (&(_REGPid0->Flt[_fltid]))
643 #define PPIDFLT1(_fltid) (&(_REGPid1->Flt[_fltid]))
644 #define PSECFLT(_fltid) (&(((REG_Sec*)(REG_SECFLT_BASE+(_fltid>>5)*0x1000))->Flt[_fl…
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DhalTSP.h627 #define PPIDFLT0(_fltid) (&(_REGPid0->Flt[_fltid]))
628 #define PPIDFLT1(_fltid) (&(_REGPid1->Flt[_fltid]))
629 #define PSECFLT(_fltid) (&(((REG_Sec*)(REG_SECFLT_BASE+(_fltid>>5)*0x1000))->Flt[_fl…
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DhalTSP.h627 #define PPIDFLT0(_fltid) (&(_REGPid0->Flt[_fltid]))
628 #define PPIDFLT1(_fltid) (&(_REGPid1->Flt[_fltid]))
629 #define PSECFLT(_fltid) (&(((REG_Sec*)(REG_SECFLT_BASE+(_fltid>>5)*0x1000))->Flt[_fl…
/utopia/UTPA2-700.0.x/modules/dmx/hal/messi/tsp/
H A DhalTSP.c571 REG_PidFlt *pPidFilter = &(_TspPid[u32EngId].Flt[i]); in HAL_TSP_SaveFltState()
577 REG32* pRegStart = (REG32*) &(_TspSec[u32EngId].Flt[i]); in HAL_TSP_SaveFltState()
600 REG_PidFlt *pPidFilter = &(_TspPid[u32EngId].Flt[i]); in HAL_TSP_RestoreFltState()
606 REG32* pRegStart = (REG32*) &(_TspSec[u32EngId].Flt[i]); in HAL_TSP_RestoreFltState()
806 REG_SecFlt* ptempSecFlt = &(_TspSec[0].Flt[31]); in HAL_TSP_SecFlt_SetNMask()
3121 return (&(_TspPid[u32EngId].Flt[u32PidFltId])); in HAL_TSP_GetPidFltReg()
H A DregTSP.h362 REG_PidFlt Flt[TSP_PIDFLT_NUM_ALL]; member
368 REG_SecFlt Flt[TSP_SECFLT_NUM]; member
/utopia/UTPA2-700.0.x/modules/dmx/hal/mooney/tsp/
H A DhalTSP.c575 REG_PidFlt *pPidFilter = &(_TspPid[u32EngId].Flt[i]); in HAL_TSP_SaveFltState()
581 REG32* pRegStart = (REG32*) &(_TspSec[u32EngId].Flt[i]); in HAL_TSP_SaveFltState()
604 REG_PidFlt *pPidFilter = &(_TspPid[u32EngId].Flt[i]); in HAL_TSP_RestoreFltState()
610 REG32* pRegStart = (REG32*) &(_TspSec[u32EngId].Flt[i]); in HAL_TSP_RestoreFltState()
810 REG_SecFlt* ptempSecFlt = &(_TspSec[0].Flt[31]); in HAL_TSP_SecFlt_SetNMask()
3136 return (&(_TspPid[u32EngId].Flt[u32PidFltId])); in HAL_TSP_GetPidFltReg()
H A DregTSP.h355 REG_PidFlt Flt[TSP_PIDFLT_NUM_ALL]; member
361 REG_SecFlt Flt[TSP_SECFLT_NUM]; member
/utopia/UTPA2-700.0.x/modules/dmx/hal/mainz/tsp/
H A DhalTSP.c572 REG_PidFlt *pPidFilter = &(_TspPid[u32EngId].Flt[i]); in HAL_TSP_SaveFltState()
578 REG32* pRegStart = (REG32*) &(_TspSec[u32EngId].Flt[i]); in HAL_TSP_SaveFltState()
601 REG_PidFlt *pPidFilter = &(_TspPid[u32EngId].Flt[i]); in HAL_TSP_RestoreFltState()
607 REG32* pRegStart = (REG32*) &(_TspSec[u32EngId].Flt[i]); in HAL_TSP_RestoreFltState()
807 REG_SecFlt* ptempSecFlt = &(_TspSec[0].Flt[31]); in HAL_TSP_SecFlt_SetNMask()
3125 return (&(_TspPid[u32EngId].Flt[u32PidFltId])); in HAL_TSP_GetPidFltReg()
H A DregTSP.h362 REG_PidFlt Flt[TSP_PIDFLT_NUM_ALL]; member
368 REG_SecFlt Flt[TSP_SECFLT_NUM]; member
/utopia/UTPA2-700.0.x/modules/dmx/api/dmx/
H A DInternal_DMX_debug.c223 …_p_ = &(_TspPid[0].Flt[_id_]); // low half of the pid filter for eiff…
226 _p_ = (REG_SecFlt*)&(_TspSec1[0].Flt[i]);
232 _p_ = (REG_SecFlt*)&(_TspSec[0].Flt[i]);
/utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/
H A DregTSP.h409 REG_PidFlt Flt[TSP_PIDFLT_NUM_ALL]; member
414 REG_SecFlt Flt[TSP_SECFLT_NUM]; member
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/
H A DregTSP.h410 REG_PidFlt Flt[TSP_PIDFLT_NUM]; member
415 REG_SecFlt Flt[TSP_SECFLT_NUM]; member
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/
H A DregTSP.h401 REG_PidFlt Flt[TSP_PIDFLT_NUM]; member
406 REG_SecFlt Flt[TSP_SECFLT_NUM]; member
/utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/
H A DregTSP.h423 REG_PidFlt Flt[TSP_PIDFLT_NUM]; member
428 REG_SecFlt Flt[TSP_SECFLT_NUM]; member
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/
H A DregTSP.h425 REG_PidFlt Flt[TSP_PIDFLT_NUM]; member
430 REG_SecFlt Flt[TSP_SECFLT_NUM]; member

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