Searched refs:old_rate (Results 1 – 13 of 13) sorted by relevance
| /rk3399_rockchip-uboot/drivers/clk/ |
| H A D | clk_sandbox.c | 31 ulong old_rate; in sandbox_clk_set_rate() local
39 old_rate = priv->rate[clk->id]; in sandbox_clk_set_rate()
42 return old_rate; in sandbox_clk_set_rate()
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| /rk3399_rockchip-uboot/drivers/clk/rockchip/ |
| H A D | clk_rk3128.c | 95 ulong old_rate; in rk3128_armclk_set_clk() local
108 old_rate = rockchip_pll_get_rate(&rk3128_pll_clks[APLL], in rk3128_armclk_set_clk()
110 if (old_rate > hz) { in rk3128_armclk_set_clk()
122 } else if (old_rate < hz) { in rk3128_armclk_set_clk()
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| H A D | clk_rk322x.c | 96 ulong old_rate; in rk322x_armclk_set_clk() local
109 old_rate = rockchip_pll_get_rate(&rk322x_pll_clks[APLL], in rk322x_armclk_set_clk()
111 if (old_rate > hz) { in rk322x_armclk_set_clk()
123 } else if (old_rate < hz) { in rk322x_armclk_set_clk()
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| H A D | clk_rk3368.c | 873 ulong old_rate; in rk3368_armclk_set_clk() local
894 old_rate = rkclk_pll_get_rate(priv->cru, APLLB); in rk3368_armclk_set_clk()
898 old_rate = rkclk_pll_get_rate(priv->cru, APLLL); in rk3368_armclk_set_clk()
903 if (old_rate > hz) { in rk3368_armclk_set_clk()
913 } else if (old_rate < hz) { in rk3368_armclk_set_clk()
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| H A D | clk_rk3308.c | 141 ulong old_rate; in rk3308_armclk_set_clk() local
154 old_rate = rockchip_pll_get_rate(&rk3308_pll_clks[APLL], in rk3308_armclk_set_clk()
156 if (old_rate > hz) { in rk3308_armclk_set_clk()
167 } else if (old_rate < hz) { in rk3308_armclk_set_clk()
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| H A D | clk_rk3328.c | 122 ulong old_rate; in rk3328_armclk_set_clk() local
135 old_rate = rockchip_pll_get_rate(&rk3328_pll_clks[NPLL], in rk3328_armclk_set_clk()
137 if (old_rate > hz) { in rk3328_armclk_set_clk()
149 } else if (old_rate < hz) { in rk3328_armclk_set_clk()
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| H A D | clk_rk3506.c | 211 ulong old_rate, prate; in rk3506_armclk_set_rate() local
223 old_rate = rk3506_armclk_get_rate(priv); in rk3506_armclk_set_rate()
224 if (new_rate >= old_rate) { in rk3506_armclk_set_rate()
260 if (new_rate < old_rate) { in rk3506_armclk_set_rate()
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| H A D | clk_rk1808.c | 864 ulong old_rate; in rk1808_armclk_set_clk() local
877 old_rate = rockchip_pll_get_rate(&rk1808_pll_clks[APLL], in rk1808_armclk_set_clk()
879 if (old_rate > hz) { in rk1808_armclk_set_clk()
890 } else if (old_rate < hz) { in rk1808_armclk_set_clk()
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| H A D | clk_rk3562.c | 159 ulong old_rate; in rk3562_armclk_set_rate() local
170 old_rate = rockchip_pll_get_rate(&rk3562_pll_clks[APLL], priv->cru, in rk3562_armclk_set_rate()
172 if (old_rate == new_rate) { in rk3562_armclk_set_rate()
178 } else if (old_rate > new_rate) { in rk3562_armclk_set_rate()
187 } else if (old_rate < new_rate) { in rk3562_armclk_set_rate()
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| H A D | clk_rk3528.c | 199 ulong old_rate; in rk3528_armclk_set_clk() local
210 old_rate = rockchip_pll_get_rate(&rk3528_pll_clks[APLL], priv->cru, APLL); in rk3528_armclk_set_clk()
211 if (old_rate > new_rate) { in rk3528_armclk_set_clk()
221 } else if (old_rate < new_rate) { in rk3528_armclk_set_clk()
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| H A D | clk_px30.c | 1251 ulong old_rate; in px30_armclk_set_clk() local
1264 old_rate = px30_clk_get_pll_rate(priv, APLL); in px30_armclk_set_clk()
1265 if (old_rate > hz) { in px30_armclk_set_clk()
1275 } else if (old_rate < hz) { in px30_armclk_set_clk()
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| H A D | clk_rv1126.c | 562 ulong old_rate; in rv1126_armclk_set_clk() local
573 old_rate = rockchip_pll_get_rate(&rv1126_pll_clks[APLL], in rv1126_armclk_set_clk()
575 if (old_rate > hz) { in rv1126_armclk_set_clk()
583 } else if (old_rate < hz) { in rv1126_armclk_set_clk()
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| H A D | clk_rk3568.c | 557 ulong old_rate; in rk3568_armclk_set_clk() local
581 old_rate = rockchip_pll_get_rate(&rk3568_pll_clks[APLL], in rk3568_armclk_set_clk()
583 if (old_rate > hz) { in rk3568_armclk_set_clk()
599 } else if (old_rate < hz) { in rk3568_armclk_set_clk()
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