| /rk3399_ARM-atf/lib/xlat_tables_v2/aarch32/ |
| H A D | enable_mmu.S | 31 stcopr r1, MAIR0
35 stcopr r2, TTBCR
64 stcopr r1, SCTLR
88 stcopr r1, HMAIR0
92 stcopr r2, HTCR
116 stcopr r1, HSCTLR
|
| /rk3399_ARM-atf/lib/cpus/aarch32/ |
| H A D | cortex_a15.S | 30 stcopr r0, ACTLR
37 stcopr r0, TLBIMVA
46 stcopr r0, ACTLR
84 stcopr r0, CORTEX_A15_ACTLR2
130 stcopr r0, ACTLR
132 stcopr r0, VBAR
133 stcopr r0, MVBAR
|
| H A D | cortex_a17.S | 24 stcopr r0, ACTLR
33 stcopr r0, ACTLR
56 stcopr r0, CORTEX_A17_IMP_DEF_REG1
86 stcopr r0, CORTEX_A17_IMP_DEF_REG1
126 stcopr r0, VBAR
127 stcopr r0, MVBAR
|
| H A D | cortex_a9.S | 24 stcopr r0, ACTLR
33 stcopr r0, ACTLR
63 stcopr r0, VBAR
64 stcopr r0, MVBAR
|
| H A D | cortex_a12.S | 24 stcopr r0, ACTLR
33 stcopr r0, ACTLR
|
| H A D | cortex_a5.S | 24 stcopr r0, ACTLR
33 stcopr r0, ACTLR
|
| H A D | cortex_a7.S | 24 stcopr r0, ACTLR
33 stcopr r0, ACTLR
|
| H A D | cortex_a53.S | 86 stcopr r0, CORTEX_A53_L2ACTLR
|
| H A D | cortex_a72.S | 58 stcopr r0, DBGOSDLR
|
| H A D | cortex_a57.S | 47 stcopr r0, DBGOSDLR
54 stcopr r0, TLBIMVA
|
| /rk3399_ARM-atf/include/arch/aarch32/ |
| H A D | el3_common_macros.S | 36 stcopr r0, SCTLR
47 stcopr r0, SCR
83 stcopr r0, NSACR
100 stcopr r0, CPACR
150 stcopr r0, SDCR
177 stcopr r0, PMCR
272 stcopr r0, SCTLR
319 stcopr r0, VBAR
320 stcopr r0, MVBAR
|
| H A D | smccc_macros.S | 29 stcopr r2, SCR
60 stcopr r4, SCR
112 stcopr r5, PMCR
136 stcopr r1, SCR
162 stcopr r1, PMCR
171 stcopr r2, SCR
201 stcopr r4, SCR
|
| H A D | asm_macros.S | 20 stcopr _reg, _coproc; \
22 stcopr _reg, _coproc
25 stcopr _reg, _coproc
39 .macro stcopr reg, coproc, opc1, CRn, CRm, opc2 macro
|
| /rk3399_ARM-atf/plat/arm/board/juno/aarch32/ |
| H A D | juno_helpers.S | 56 stcopr r0, CNTKCTL
70 stcopr r0, CORTEX_A57_L2CTLR
106 stcopr r0, CORTEX_A57_L2CTLR
141 stcopr r0, CORTEX_A72_L2CTLR
|
| /rk3399_ARM-atf/bl1/aarch32/ |
| H A D | bl1_exceptions.S | 64 stcopr r0, TLBIALL
110 stcopr r0, SCR
132 stcopr r9, SCTLR
154 stcopr r0, TLBIALL
|
| H A D | bl1_entrypoint.S | 85 stcopr r0, TLBIALL
|
| /rk3399_ARM-atf/lib/aarch32/ |
| H A D | cache_helpers.S | 31 stcopr r0, \coproc, \opc1, \CRn, \CRm, \opc2
105 stcopr r1, CSSELR // select current cache level in csselr
147 stcopr r6, CSSELR //select cache level 0 in csselr
153 stcopr r0, DCISW
155 stcopr r0, DCCISW
157 stcopr r0, DCCSW
|
| H A D | misc_helpers.S | 179 stcopr r0, BPIALL
184 stcopr r0, SCTLR
|
| /rk3399_ARM-atf/lib/psci/aarch32/ |
| H A D | psci_helpers.S | 29 stcopr r1, SCTLR
94 stcopr r0, SCTLR
|
| /rk3399_ARM-atf/bl2u/aarch32/ |
| H A D | bl2u_entrypoint.S | 41 stcopr r0, VBAR
51 stcopr r0, SCTLR
|
| /rk3399_ARM-atf/bl2/aarch32/ |
| H A D | bl2_entrypoint.S | 42 stcopr r0, VBAR
52 stcopr r0, SCTLR
|
| H A D | bl2_run_next_image.S | 24 stcopr r0, TLBIALL
|
| /rk3399_ARM-atf/bl32/sp_min/aarch32/ |
| H A D | entrypoint.S | 37 stcopr \reg, SCR
210 stcopr r0, SCR
254 stcopr r0, SCR
|
| /rk3399_ARM-atf/bl32/sp_min/ |
| H A D | wa_cve_2017_5715_icache_inv.S | 27 stcopr r0, ICIALLU
|
| H A D | wa_cve_2017_5715_bpiall.S | 26 stcopr r0, BPIALL
|