1/* 2 * Copyright (c) 2016-2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <asm_macros.S> 8#include <lib/psci/psci.h> 9#include <platform_def.h> 10 11 .globl psci_do_pwrdown_cache_maintenance 12 .globl psci_do_pwrup_cache_maintenance 13 14/* ----------------------------------------------------------------------- 15 * void psci_do_pwrdown_cache_maintenance(void); 16 * 17 * This function turns off data caches and also ensures that stack memory 18 * is correctly flushed out to avoid coherency issues due to a change in 19 * its memory attributes. 20 * ----------------------------------------------------------------------- 21 */ 22func psci_do_pwrdown_cache_maintenance 23 push {r4, lr} 24 bl plat_get_my_stack 25 26 /* Turn off the D-cache */ 27 ldcopr r1, SCTLR 28 bic r1, #SCTLR_C_BIT 29 stcopr r1, SCTLR 30 isb 31 32 /* --------------------------------------------- 33 * Calculate and store the size of the used 34 * stack memory in r1. 35 * --------------------------------------------- 36 */ 37 mov r4, r0 38 mov r1, sp 39 sub r1, r0, r1 40 mov r0, sp 41 bl flush_dcache_range 42 43 /* --------------------------------------------- 44 * Calculate and store the size of the unused 45 * stack memory in r1. Calculate and store the 46 * stack base address in r0. 47 * --------------------------------------------- 48 */ 49 sub r0, r4, #PLATFORM_STACK_SIZE 50 sub r1, sp, r0 51 bl inv_dcache_range 52 53 pop {r4, pc} 54endfunc psci_do_pwrdown_cache_maintenance 55 56 57/* ----------------------------------------------------------------------- 58 * void psci_do_pwrup_cache_maintenance(void); 59 * 60 * This function performs cache maintenance after this cpu is powered up. 61 * Currently, this involves managing the used stack memory before turning 62 * on the data cache. 63 * ----------------------------------------------------------------------- 64 */ 65func psci_do_pwrup_cache_maintenance 66 /* r12 is pushed to meet the 8 byte stack alignment requirement */ 67 push {r12, lr} 68 69 /* --------------------------------------------- 70 * Ensure any inflight stack writes have made it 71 * to main memory. 72 * --------------------------------------------- 73 */ 74 dmb st 75 76 /* --------------------------------------------- 77 * Calculate and store the size of the used 78 * stack memory in r1. Calculate and store the 79 * stack base address in r0. 80 * --------------------------------------------- 81 */ 82 bl plat_get_my_stack 83 mov r1, sp 84 sub r1, r0, r1 85 mov r0, sp 86 bl inv_dcache_range 87 88 /* --------------------------------------------- 89 * Enable the data cache. 90 * --------------------------------------------- 91 */ 92 ldcopr r0, SCTLR 93 orr r0, r0, #SCTLR_C_BIT 94 stcopr r0, SCTLR 95 isb 96 97 pop {r12, pc} 98endfunc psci_do_pwrup_cache_maintenance 99