History log of /rk3399_ARM-atf/lib/cpus/aarch32/cortex_a7.S (Results 1 – 10 of 10)
Revision Date Author Comments
# cc4f3838 27-Aug-2024 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge changes from topic "clean-up-errata-compatibility" into integration

* changes:
refactor(cpus): remove cpu specific errata funcs
refactor(cpus): directly invoke errata reporter


# 3fb52e41 14-May-2024 Ryan Everett <ryan.everett@arm.com>

refactor(cpus): remove cpu specific errata funcs

Errata printing is done directly via generic_errata_report.
This commit removes the unused \_cpu\()_errata_report
functions for all cores, and remove

refactor(cpus): remove cpu specific errata funcs

Errata printing is done directly via generic_errata_report.
This commit removes the unused \_cpu\()_errata_report
functions for all cores, and removes errata_func from cpu_ops.

Change-Id: I04fefbde5f0ff63b1f1cd17c864557a14070d68c
Signed-off-by: Ryan Everett <ryan.everett@arm.com>

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# 87bf01b2 10-Aug-2023 Bipin Ravi <bipin.ravi@arm.com>

Merge "fix(cpus): flush L2 cache for Cortex-A7/12/15/17" into integration


# c5c160cd 19-Mar-2023 Stephan Gerhold <stephan@gerhold.net>

fix(cpus): flush L2 cache for Cortex-A7/12/15/17

Similar to Cortex-A53, the AArch32-only Cortex-A7/12/15/17 have an
(optional) integrated L2 cache that might need to be flushed if the
whole cluster

fix(cpus): flush L2 cache for Cortex-A7/12/15/17

Similar to Cortex-A53, the AArch32-only Cortex-A7/12/15/17 have an
(optional) integrated L2 cache that might need to be flushed if the
whole cluster is powered down. However, unlike Cortex-A53 there is
currently no L2 cache flush in the cluster_pwr_dwn implementation for
some reason. This causes problems if there is unwritten data left in
the L2 cache during a cluster power off.

Fix this by adding the L2 cache flush similar to cortex_a53.S.

Change-Id: Icd087bef9acff11e03edcaa0d26dd8b8e30796b7
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>

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# fc22bcf8 03-Aug-2023 Bipin Ravi <bipin.ravi@arm.com>

Merge changes from topic "gr/errata_refactor" into integration

* changes:
refactor(cpus): convert the Cortex-A55 to use cpu helpers
refactor(cpus): convert the Cortex-A55 to use the errata frame

Merge changes from topic "gr/errata_refactor" into integration

* changes:
refactor(cpus): convert the Cortex-A55 to use cpu helpers
refactor(cpus): convert the Cortex-A55 to use the errata framework
refactor(cpus): convert the Cortex-A76AE to use cpu helpers
refactor(cpus): convert the Cortex-A76AE to use the errata framework
refactor(cpus): convert the Cortex-A78 to use cpu helpers
refactor(cpus): convert the Cortex-A78 to use the errata framework
refactor(cpus): reorder Cortex-A78 errata by ascending order
refactor(cpus): convert the Cortex-A78C to use cpu helpers
refactor(cpus): convert the Cortex-A78C to use the errata framework
refactor(cpus): reorder Cortex-A78C errata by ascending order
refactor(cpus): convert the Cortex-X1 to use cpu helpers
refactor(cpus): convert the Cortex-X1 to use the errata framework
refactor(cpus): reorder Cortex-X1 errata by ascending order
refactor(cpus): use cpu errata wrappers Cortex-A12 aarch32 cpu
refactor(cpus): use cpu errata wrappers Cortex-A7 and A9 aarch32 cpus

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# 3ca54cb4 26-Apr-2023 Govindraj Raja <govindraj.raja@arm.com>

refactor(cpus): use cpu errata wrappers Cortex-A7 and A9 aarch32 cpus

Adapt to use errata frame-work cpu macro helpers for following cpu's:

- Cortex-A7
- Cortex-A9

Testing:
- Manual comparison of

refactor(cpus): use cpu errata wrappers Cortex-A7 and A9 aarch32 cpus

Adapt to use errata frame-work cpu macro helpers for following cpu's:

- Cortex-A7
- Cortex-A9

Testing:
- Manual comparison of disassembly with and without the patch.
- Compile testing.

Change-Id: I88eb90d7fd0e82fc4bfc9d1aee947f0c820e1222
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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# cf0886e2 29-Oct-2018 Soby Mathew <soby.mathew@arm.com>

Merge pull request #1644 from soby-mathew/sm/pie_proto

Position Indepedent Executable (PIE) Support


# 12af5ed4 17-Sep-2018 Soby Mathew <soby.mathew@arm.com>

Make errata reporting mandatory for CPU files

Previously the errata reporting was optional for CPU operation
files and this was achieved by making use of weak reference to
resolve to 0 if the symbol

Make errata reporting mandatory for CPU files

Previously the errata reporting was optional for CPU operation
files and this was achieved by making use of weak reference to
resolve to 0 if the symbol is not defined. This is error prone
when adding new CPU operation files and weak references are
problematic when fixing up dynamic relocations. Hence this patch
removes the weak reference and makes it mandatory for the CPU
operation files to define the errata reporting function.

Change-Id: I8af192e19b85b7cd8c7579e52f8f05a4294e5396
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

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# 71f8a6a9 23-Nov-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #1145 from etienne-lms/rfc-armv7-2

Support ARMv7 architectures


# 6ff43c26 05-Nov-2017 Etienne Carriere <etienne.carriere@linaro.org>

ARMv7: introduce Cortex-A7

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>