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Searched refs:timing_cfg_2 (Results 1 – 25 of 47) sorted by relevance

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/OK3568_Linux_fs/u-boot/board/freescale/corenet_ds/
H A Dp4080ds_ddr.c91 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_800,
123 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_800,
155 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_900,
187 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_900,
219 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_1000,
251 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_1000,
283 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_1200,
315 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_1200,
/OK3568_Linux_fs/u-boot/drivers/ddr/fsl/
H A Dmpc85xx_ddr_gen3.c118 out_be32(&ddr->timing_cfg_2, regs->timing_cfg_2); in fsl_ddr_set_memctl_regs()
204 out_be32(&ddr->timing_cfg_2, regs->timing_cfg_2 & 0xf07fffff); in fsl_ddr_set_memctl_regs()
329 out_be32(&ddr->timing_cfg_2, regs->timing_cfg_2); in fsl_ddr_set_memctl_regs()
460 setbits_be32(&ddr->timing_cfg_2, TIMING_CFG_2_CPO_MASK); in fsl_ddr_set_memctl_regs()
462 in_be32(&ddr->timing_cfg_2)); in fsl_ddr_set_memctl_regs()
H A Dmpc85xx_ddr_gen1.c47 out_be32(&ddr->timing_cfg_2, regs->timing_cfg_2); in fsl_ddr_set_memctl_regs()
H A Dmpc86xx_ddr.c55 out_be32(&ddr->timing_cfg_2, regs->timing_cfg_2); in fsl_ddr_set_memctl_regs()
H A Dmpc85xx_ddr_gen2.c70 out_be32(&ddr->timing_cfg_2, regs->timing_cfg_2); in fsl_ddr_set_memctl_regs()
H A Darm_ddr_gen3.c95 ddr_out32(&ddr->timing_cfg_2, regs->timing_cfg_2); in fsl_ddr_set_memctl_regs()
/OK3568_Linux_fs/u-boot/board/freescale/bsc9132qds/
H A Dspl_minimal.c32 __raw_writel(CONFIG_SYS_DDR_TIMING_2_800, &ddr->timing_cfg_2); in sdram_init()
52 __raw_writel(CONFIG_SYS_DDR_TIMING_2_1333, &ddr->timing_cfg_2); in sdram_init()
H A Dddr.c27 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_800,
54 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_1333,
/OK3568_Linux_fs/u-boot/board/sbc8641d/
H A Dsbc8641d.c113 ddr->timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2; in fixed_sdram()
144 ddr->timing_cfg_2 = CONFIG_SYS_DDR2_TIMING_2; in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/freescale/p1010rdb/
H A Dddr.c28 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_800,
55 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_667,
/OK3568_Linux_fs/u-boot/board/freescale/mpc8349itx/
H A Dmpc8349itx.c61 im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;/* Was "2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT" */ in fixed_sdram()
75 debug("DDR:timing_cfg_2=0x%08x\n", im->ddr.timing_cfg_2); in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/freescale/mpc8349emds/
H A Dmpc8349emds.c106 im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2; in fixed_sdram()
131 im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2; in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/freescale/p1_twr/
H A Dddr.c34 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2, in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/socrates/
H A Dsdram.c40 ddr->timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2; in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/sbc8548/
H A Dddr.c108 out_be32(&ddr->timing_cfg_2, 0x0fa044C7); in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/gdsys/mpc8308/
H A Dsdram.c51 out_be32(&im->ddr.timing_cfg_2, CONFIG_SYS_DDR_TIMING_2); in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/freescale/mpc8308rdb/
H A Dsdram.c50 out_be32(&im->ddr.timing_cfg_2, CONFIG_SYS_DDR_TIMING_2); in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/mpc8308_p1m/
H A Dsdram.c46 out_be32(&im->ddr.timing_cfg_2, CONFIG_SYS_DDR_TIMING_2); in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/freescale/mpc8315erdb/
H A Dsdram.c67 im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2; in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/freescale/bsc9131rdb/
H A Dspl_minimal.c35 __raw_writel(CONFIG_SYS_DDR_TIMING_2_800, &ddr->timing_cfg_2); in sdram_init()
H A Dddr.c28 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_800,
/OK3568_Linux_fs/u-boot/board/freescale/mpc8313erdb/
H A Dsdram.c76 im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2; in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/freescale/mpc832xemds/
H A Dmpc832xemds.c139 im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2; in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/Arcturus/ucp1020/
H A Dddr.c94 .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2, in fixed_sdram()
/OK3568_Linux_fs/u-boot/board/freescale/mpc8641hpcn/
H A Dmpc8641hpcn.c77 ddr->timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2; in fixed_sdram()

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