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Searched refs:phy_cfg (Results 1 – 25 of 67) sorted by relevance

123

/OK3568_Linux_fs/kernel/drivers/phy/broadcom/
H A Dphy-bcm-sr-usb.c124 static int bcm_usb_ss_phy_init(struct bcm_usb_phy_cfg *phy_cfg) in bcm_usb_ss_phy_init() argument
127 void __iomem *regs = phy_cfg->regs; in bcm_usb_ss_phy_init()
131 offset = phy_cfg->offset; in bcm_usb_ss_phy_init()
155 static int bcm_usb_hs_phy_init(struct bcm_usb_phy_cfg *phy_cfg) in bcm_usb_hs_phy_init() argument
158 void __iomem *regs = phy_cfg->regs; in bcm_usb_hs_phy_init()
161 offset = phy_cfg->offset; in bcm_usb_hs_phy_init()
176 struct bcm_usb_phy_cfg *phy_cfg = phy_get_drvdata(phy); in bcm_usb_phy_reset() local
177 void __iomem *regs = phy_cfg->regs; in bcm_usb_phy_reset()
180 offset = phy_cfg->offset; in bcm_usb_phy_reset()
182 if (phy_cfg->type == USB_HS_PHY) { in bcm_usb_phy_reset()
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/OK3568_Linux_fs/u-boot/arch/arm/mach-keystone/
H A Dddr3.c25 void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg) in ddr3_init_ddrphy() argument
33 __raw_writel(phy_cfg->pllcr, base + KS2_DDRPHY_PLLCR_OFFSET); in ddr3_init_ddrphy()
36 tmp &= ~(phy_cfg->pgcr1_mask); in ddr3_init_ddrphy()
37 tmp |= phy_cfg->pgcr1_val; in ddr3_init_ddrphy()
40 __raw_writel(phy_cfg->ptr0, base + KS2_DDRPHY_PTR0_OFFSET); in ddr3_init_ddrphy()
41 __raw_writel(phy_cfg->ptr1, base + KS2_DDRPHY_PTR1_OFFSET); in ddr3_init_ddrphy()
42 __raw_writel(phy_cfg->ptr3, base + KS2_DDRPHY_PTR3_OFFSET); in ddr3_init_ddrphy()
43 __raw_writel(phy_cfg->ptr4, base + KS2_DDRPHY_PTR4_OFFSET); in ddr3_init_ddrphy()
46 tmp &= ~(phy_cfg->dcr_mask); in ddr3_init_ddrphy()
47 tmp |= phy_cfg->dcr_val; in ddr3_init_ddrphy()
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H A Dddr3_spd.c305 spd_cb->phy_cfg.pllcr = (spd->freqsel & 3) << 18 | 0xE << 13; in init_ddr3param()
306 spd_cb->phy_cfg.pgcr1_mask = (IODDRM_MASK | ZCKSEL_MASK); in init_ddr3param()
307 spd_cb->phy_cfg.pgcr1_val = ((1 << 2) | (1 << 7) | (1 << 23)); in init_ddr3param()
308 spd_cb->phy_cfg.ptr0 = ((spd->t_pllpd & 0x7ff) << 21) | in init_ddr3param()
310 spd_cb->phy_cfg.ptr1 = ((spd->t_plllock & 0xffff) << 16) | in init_ddr3param()
312 spd_cb->phy_cfg.ptr2 = 0; in init_ddr3param()
313 spd_cb->phy_cfg.ptr3 = ((spd->t_dinit1 & 0x1ff) << 20) | in init_ddr3param()
315 spd_cb->phy_cfg.ptr4 = ((spd->t_dinit3 & 0x3ff) << 18) | in init_ddr3param()
318 spd_cb->phy_cfg.dcr_mask = PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK; in init_ddr3param()
319 spd_cb->phy_cfg.dcr_val = 1 << 10; in init_ddr3param()
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/OK3568_Linux_fs/u-boot/drivers/usb/phy/
H A Drockchip_usb2_phy.c162 struct rockchip_usb2_phy_cfg *phy_cfg = NULL; in otg_phy_init() local
175 phy_cfg = (struct rockchip_usb2_phy_cfg *)of_id->data; in otg_phy_init()
179 if (!phy_cfg) { in otg_phy_init()
185 pdata->priv = phy_cfg; in otg_phy_init()
188 property_enable(pdata, &phy_cfg->siddq, false); in otg_phy_init()
191 property_enable(pdata, &phy_cfg->soft_con, false); in otg_phy_init()
194 property_enable(pdata, &phy_cfg->port_reset, true); in otg_phy_init()
196 property_enable(pdata, &phy_cfg->port_reset, false); in otg_phy_init()
203 struct rockchip_usb2_phy_cfg *phy_cfg = pdata->priv; in otg_phy_off() local
211 property_enable(pdata, &phy_cfg->soft_con, true); in otg_phy_off()
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/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A Drockchip-inno-hdmi-phy.c172 struct phy_config *phy_cfg; member
203 const struct phy_config *phy_cfg);
448 const struct phy_config *phy_cfg = inno->plat_data->phy_cfg_table; in inno_hdmi_phy_power_on() local
454 if (inno->phy_cfg) in inno_hdmi_phy_power_on()
455 phy_cfg = inno->phy_cfg; in inno_hdmi_phy_power_on()
478 for (; phy_cfg->tmdsclock != ~0UL; phy_cfg++) in inno_hdmi_phy_power_on()
479 if (tmdsclock <= phy_cfg->tmdsclock) in inno_hdmi_phy_power_on()
482 if (cfg->tmdsclock == ~0UL || phy_cfg->tmdsclock == ~0UL) in inno_hdmi_phy_power_on()
487 return inno->plat_data->ops->power_on(inno, cfg, phy_cfg); in inno_hdmi_phy_power_on()
574 const struct phy_config *phy_cfg) in inno_hdmi_phy_rk3228_power_on() argument
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H A Danalogix_dp_reg.c925 union phy_configure_opts phy_cfg; in analogix_dp_set_link_bandwidth() local
931 phy_cfg.dp.lanes = dp->link_train.lane_count; in analogix_dp_set_link_bandwidth()
932 phy_cfg.dp.link_rate = in analogix_dp_set_link_bandwidth()
934 phy_cfg.dp.ssc = analogix_dp_ssc_supported(dp); in analogix_dp_set_link_bandwidth()
935 phy_cfg.dp.set_lanes = false; in analogix_dp_set_link_bandwidth()
936 phy_cfg.dp.set_rate = true; in analogix_dp_set_link_bandwidth()
937 phy_cfg.dp.set_voltages = false; in analogix_dp_set_link_bandwidth()
938 ret = generic_phy_configure(&dp->phy, &phy_cfg); in analogix_dp_set_link_bandwidth()
964 union phy_configure_opts phy_cfg; in analogix_dp_set_lane_count() local
971 phy_cfg.dp.lanes = dp->link_train.lane_count; in analogix_dp_set_lane_count()
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H A Ddw-dp.c585 union phy_configure_opts phy_cfg; in dw_dp_link_train_update_vs_emph() local
594 phy_cfg.dp.voltage[i] = vs[i]; in dw_dp_link_train_update_vs_emph()
595 phy_cfg.dp.pre[i] = pe[i]; in dw_dp_link_train_update_vs_emph()
597 phy_cfg.dp.lanes = lanes; in dw_dp_link_train_update_vs_emph()
598 phy_cfg.dp.link_rate = link->rate / 100; in dw_dp_link_train_update_vs_emph()
599 phy_cfg.dp.set_lanes = false; in dw_dp_link_train_update_vs_emph()
600 phy_cfg.dp.set_rate = false; in dw_dp_link_train_update_vs_emph()
601 phy_cfg.dp.set_voltages = true; in dw_dp_link_train_update_vs_emph()
602 ret = generic_phy_configure(&dp->phy, &phy_cfg); in dw_dp_link_train_update_vs_emph()
619 union phy_configure_opts phy_cfg; in dw_dp_link_configure() local
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/OK3568_Linux_fs/u-boot/drivers/phy/
H A Dphy-rockchip-naneng-usb2.c150 const struct rockchip_usb2phy_cfg *phy_cfg; member
216 port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG]; in rockchip_chg_get_type()
227 property_enable(rphy->grf, &rphy->phy_cfg->chg_det.chg_en, true); in rockchip_chg_get_type()
228 property_enable(rphy->grf, &rphy->phy_cfg->chg_det.chg_rst, false); in rockchip_chg_get_type()
234 &rphy->phy_cfg->chg_det.chg_valid); in rockchip_chg_get_type()
237 &rphy->phy_cfg->chg_det.phy_connect); in rockchip_chg_get_type()
250 property_enable(rphy->grf, &rphy->phy_cfg->chg_det.chg_rst, true); in rockchip_chg_get_type()
251 property_enable(rphy->grf, &rphy->phy_cfg->chg_det.chg_en, false); in rockchip_chg_get_type()
278 port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG]; in rockchip_usb2phy_check_vbus()
296 port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG]; in rockchip_usb2phy_init()
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H A Dphy-rockchip-inno-usb2.c164 const struct rockchip_usb2phy_cfg *phy_cfg; member
218 property_enable(base, &rphy->phy_cfg->chg_det.rdm_pdwn_en, en); in rockchip_chg_enable_dcd()
219 property_enable(base, &rphy->phy_cfg->chg_det.idp_src_en, en); in rockchip_chg_enable_dcd()
227 property_enable(base, &rphy->phy_cfg->chg_det.vdp_src_en, en); in rockchip_chg_enable_primary_det()
228 property_enable(base, &rphy->phy_cfg->chg_det.idm_sink_en, en); in rockchip_chg_enable_primary_det()
236 property_enable(base, &rphy->phy_cfg->chg_det.vdm_src_en, en); in rockchip_chg_enable_secondary_det()
237 property_enable(base, &rphy->phy_cfg->chg_det.idp_sink_en, en); in rockchip_chg_enable_secondary_det()
249 vout = property_enabled(base, &rphy->phy_cfg->chg_det.cp_det); in rockchip_chg_primary_det_retry()
279 port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG]; in rockchip_chg_get_type()
294 property_enable(base, &rphy->phy_cfg->chg_det.opmode, false); in rockchip_chg_get_type()
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/OK3568_Linux_fs/kernel/drivers/phy/rockchip/
H A Dphy-rockchip-inno-hdmi-phy.c175 struct phy_config *phy_cfg; member
218 const struct phy_config *phy_cfg);
476 const struct phy_config *phy_cfg = inno->plat_data->phy_cfg_table; in inno_hdmi_phy_power_on() local
480 if (inno->phy_cfg) in inno_hdmi_phy_power_on()
481 phy_cfg = inno->phy_cfg; in inno_hdmi_phy_power_on()
502 for (; phy_cfg->tmdsclock != ~0UL; phy_cfg++) in inno_hdmi_phy_power_on()
503 if (tmdsclock <= phy_cfg->tmdsclock) in inno_hdmi_phy_power_on()
506 if (cfg->tmdsclock == ~0UL || phy_cfg->tmdsclock == ~0UL) in inno_hdmi_phy_power_on()
513 return inno->plat_data->ops->power_on(inno, cfg, phy_cfg); in inno_hdmi_phy_power_on()
606 if (!inno->phy_cfg) in inno_hdmi_phy_clk_round_rate()
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H A Dphy-rockchip-inno-usb2.c351 const struct rockchip_usb2phy_cfg *phy_cfg; member
465 if (rphy->phy_cfg->clkout_ctl_phy.enable) { in rockchip_usb2phy_clk480m_prepare()
466 if (!phy_property_enabled(rphy->phy_base, &rphy->phy_cfg->clkout_ctl_phy)) { in rockchip_usb2phy_clk480m_prepare()
467 phy_property_enable(rphy->phy_base, &rphy->phy_cfg->clkout_ctl_phy, true); in rockchip_usb2phy_clk480m_prepare()
472 } else if (!property_enabled(base, &rphy->phy_cfg->clkout_ctl)) { in rockchip_usb2phy_clk480m_prepare()
473 ret = property_enable(base, &rphy->phy_cfg->clkout_ctl, true); in rockchip_usb2phy_clk480m_prepare()
491 if (rphy->phy_cfg->clkout_ctl_phy.enable) in rockchip_usb2phy_clk480m_unprepare()
492 phy_property_enable(rphy->phy_base, &rphy->phy_cfg->clkout_ctl_phy, false); in rockchip_usb2phy_clk480m_unprepare()
494 property_enable(base, &rphy->phy_cfg->clkout_ctl, false); in rockchip_usb2phy_clk480m_unprepare()
503 if (rphy->phy_cfg->clkout_ctl_phy.enable) in rockchip_usb2phy_clk480m_prepared()
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H A Dphy-rockchip-naneng-usb2.c251 const struct rockchip_usb2phy_cfg *phy_cfg; member
289 if (!property_enabled(rphy->grf, &rphy->phy_cfg->clkout_ctl)) { in rockchip_usb2phy_clk480m_prepare()
290 ret = property_enable(rphy->grf, &rphy->phy_cfg->clkout_ctl, in rockchip_usb2phy_clk480m_prepare()
308 property_enable(rphy->grf, &rphy->phy_cfg->clkout_ctl, false); in rockchip_usb2phy_clk480m_unprepare()
316 return property_enabled(rphy->grf, &rphy->phy_cfg->clkout_ctl); in rockchip_usb2phy_clk480m_prepared()
808 property_enable(rphy->grf, &rphy->phy_cfg->chg_det.chg_en, true); in rockchip_chg_detect()
809 property_enable(rphy->grf, &rphy->phy_cfg->chg_det.chg_rst, false); in rockchip_chg_detect()
815 &rphy->phy_cfg->chg_det.chg_valid); in rockchip_chg_detect()
818 &rphy->phy_cfg->chg_det.phy_connect); in rockchip_chg_detect()
851 property_enable(rphy->grf, &rphy->phy_cfg->chg_det.chg_rst, true); in rockchip_chg_detect()
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H A Dphy-rockchip-inno-hdmi.c283 const struct phy_config *phy_cfg);
461 const struct phy_config *phy_cfg = inno->plat_data->phy_cfg_table; in inno_hdmi_phy_power_on() local
479 for (; phy_cfg->tmdsclock != 0; phy_cfg++) in inno_hdmi_phy_power_on()
480 if (tmdsclock <= phy_cfg->tmdsclock) in inno_hdmi_phy_power_on()
483 if (cfg->tmdsclock == 0 || phy_cfg->tmdsclock == 0) in inno_hdmi_phy_power_on()
492 ret = inno->plat_data->ops->power_on(inno, cfg, phy_cfg); in inno_hdmi_phy_power_on()
898 const struct phy_config *phy_cfg) in inno_hdmi_phy_rk3228_power_on() argument
930 inno_write(inno, 0xef + v, phy_cfg->regs[v]); in inno_hdmi_phy_rk3228_power_on()
1013 const struct phy_config *phy_cfg) in inno_hdmi_phy_rk3328_power_on() argument
1038 inno_write(inno, 0xb5 + v, phy_cfg->regs[v]); in inno_hdmi_phy_rk3328_power_on()
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H A Dphy-rockchip-naneng-combphy.c158 const struct rockchip_combphy_cfg *phy_cfg = priv->cfg; in rockchip_combphy_usb3_init() local
162 ret = param_write(priv->pipe_grf, &phy_cfg->grfcfg->u3otg0_port_en, in rockchip_combphy_usb3_init()
166 ret = param_write(priv->pipe_grf, &phy_cfg->grfcfg->u3otg1_port_en, in rockchip_combphy_usb3_init()
318 const struct rockchip_combphy_cfg *phy_cfg = priv->cfg; in rockchip_combphy_parse_dt() local
343 param_write(priv->pipe_grf, &phy_cfg->grfcfg->u3otg0_port_en, in rockchip_combphy_parse_dt()
346 param_write(priv->pipe_grf, &phy_cfg->grfcfg->u3otg1_port_en, in rockchip_combphy_parse_dt()
351 param_write(priv->pipe_grf, &phy_cfg->grfcfg->pipe_sgmii_mac_sel, in rockchip_combphy_parse_dt()
387 const struct rockchip_combphy_cfg *phy_cfg; in rockchip_combphy_probe() local
391 phy_cfg = of_device_get_match_data(dev); in rockchip_combphy_probe()
392 if (!phy_cfg) { in rockchip_combphy_probe()
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/OK3568_Linux_fs/kernel/drivers/net/ethernet/sfc/
H A Dmcdi_port_common.c236 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; in efx_get_mcdi_phy_flags() local
242 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_TXDIS_LBN)) in efx_get_mcdi_phy_flags()
244 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_LOWPOWER_LBN)) in efx_get_mcdi_phy_flags()
246 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_POWEROFF_LBN)) in efx_get_mcdi_phy_flags()
378 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; in efx_mcdi_phy_check_fcntl() local
384 if (~phy_cfg->supported_cap & (1 << MC_CMD_PHY_CAP_AN_LBN)) in efx_mcdi_phy_check_fcntl()
542 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; in efx_mcdi_phy_get_link_ksettings() local
548 cmd->base.port = mcdi_to_ethtool_media(phy_cfg->media); in efx_mcdi_phy_get_link_ksettings()
549 cmd->base.phy_address = phy_cfg->port; in efx_mcdi_phy_get_link_ksettings()
554 mcdi_to_ethtool_linkset(phy_cfg->media, phy_cfg->supported_cap, in efx_mcdi_phy_get_link_ksettings()
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/OK3568_Linux_fs/u-boot/board/ti/ks2_evm/
H A Dddr3_k2hk.c46 spd_cb.phy_cfg.zq0cr1 |= 0x10000; in ddr3_init()
47 spd_cb.phy_cfg.zq1cr1 |= 0x10000; in ddr3_init()
48 spd_cb.phy_cfg.zq2cr1 |= 0x10000; in ddr3_init()
50 ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &spd_cb.phy_cfg); in ddr3_init()
56 ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &spd_cb.phy_cfg); in ddr3_init()
H A Dddr3_k2e.c39 spd_cb.phy_cfg.zq0cr1 |= 0x10000; in ddr3_init()
40 spd_cb.phy_cfg.zq1cr1 |= 0x10000; in ddr3_init()
41 spd_cb.phy_cfg.zq2cr1 |= 0x10000; in ddr3_init()
42 ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &spd_cb.phy_cfg); in ddr3_init()
/OK3568_Linux_fs/kernel/drivers/net/usb/
H A Daqc111.c324 aqc111_data->phy_cfg &= ~AQ_ADV_MASK; in aqc111_set_phy_speed()
325 aqc111_data->phy_cfg |= AQ_PAUSE; in aqc111_set_phy_speed()
326 aqc111_data->phy_cfg |= AQ_ASYM_PAUSE; in aqc111_set_phy_speed()
327 aqc111_data->phy_cfg |= AQ_DOWNSHIFT; in aqc111_set_phy_speed()
328 aqc111_data->phy_cfg &= ~AQ_DSH_RETRIES_MASK; in aqc111_set_phy_speed()
329 aqc111_data->phy_cfg |= (3 << AQ_DSH_RETRIES_SHIFT) & in aqc111_set_phy_speed()
335 aqc111_data->phy_cfg |= AQ_ADV_5G; in aqc111_set_phy_speed()
338 aqc111_data->phy_cfg |= AQ_ADV_2G5; in aqc111_set_phy_speed()
341 aqc111_data->phy_cfg |= AQ_ADV_1G; in aqc111_set_phy_speed()
344 aqc111_data->phy_cfg |= AQ_ADV_100M; in aqc111_set_phy_speed()
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/cadence/
H A Dcdns-mhdp8546-core.c859 union phy_configure_opts phy_cfg; in cdns_mhdp_link_training_init() local
880 phy_cfg.dp.link_rate = mhdp->link.rate / 100; in cdns_mhdp_link_training_init()
881 phy_cfg.dp.lanes = mhdp->link.num_lanes; in cdns_mhdp_link_training_init()
883 memset(phy_cfg.dp.voltage, 0, sizeof(phy_cfg.dp.voltage)); in cdns_mhdp_link_training_init()
884 memset(phy_cfg.dp.pre, 0, sizeof(phy_cfg.dp.pre)); in cdns_mhdp_link_training_init()
886 phy_cfg.dp.ssc = cdns_mhdp_get_ssc_supported(mhdp); in cdns_mhdp_link_training_init()
887 phy_cfg.dp.set_lanes = true; in cdns_mhdp_link_training_init()
888 phy_cfg.dp.set_rate = true; in cdns_mhdp_link_training_init()
889 phy_cfg.dp.set_voltages = true; in cdns_mhdp_link_training_init()
890 ret = phy_configure(mhdp->phy, &phy_cfg); in cdns_mhdp_link_training_init()
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/OK3568_Linux_fs/kernel/drivers/phy/samsung/
H A Dphy-exynos5-usbdrd.c169 const struct exynos5_usbdrd_phy_config *phy_cfg; member
206 const struct exynos5_usbdrd_phy_config *phy_cfg; member
416 inst->phy_cfg->phy_init(phy_drd); in exynos5_usbdrd_phy_init()
419 reg = inst->phy_cfg->set_refclk(inst); in exynos5_usbdrd_phy_init()
512 inst->phy_cfg->phy_isol(inst, 0); in exynos5_usbdrd_phy_power_on()
539 inst->phy_cfg->phy_isol(inst, 1); in exynos5_usbdrd_phy_power_off()
702 if (inst->phy_cfg->id == EXYNOS5_DRDPHY_UTMI) in exynos5_usbdrd_phy_calibrate()
783 .phy_cfg = phy_cfg_exynos5,
790 .phy_cfg = phy_cfg_exynos5,
796 .phy_cfg = phy_cfg_exynos5,
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/analogix/
H A Danalogix_dp_reg.c570 union phy_configure_opts phy_cfg = {0}; in analogix_dp_set_link_bandwidth() local
572 phy_cfg.dp.lanes = dp->link_train.lane_count; in analogix_dp_set_link_bandwidth()
573 phy_cfg.dp.link_rate = in analogix_dp_set_link_bandwidth()
575 phy_cfg.dp.ssc = analogix_dp_ssc_supported(dp); in analogix_dp_set_link_bandwidth()
576 phy_cfg.dp.set_lanes = false; in analogix_dp_set_link_bandwidth()
577 phy_cfg.dp.set_rate = true; in analogix_dp_set_link_bandwidth()
578 phy_cfg.dp.set_voltages = false; in analogix_dp_set_link_bandwidth()
579 ret = phy_configure(dp->phy, &phy_cfg); in analogix_dp_set_link_bandwidth()
618 union phy_configure_opts phy_cfg = {0}; in analogix_dp_set_lane_count() local
620 phy_cfg.dp.lanes = dp->link_train.lane_count; in analogix_dp_set_lane_count()
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/OK3568_Linux_fs/kernel/drivers/scsi/mvsas/
H A Dmv_94xx.c166 union reg_phy_cfg phy_cfg, phy_cfg_tmp; in set_phy_rate() local
169 phy_cfg.v = 0; in set_phy_rate()
170 phy_cfg.u.disable_phy = phy_cfg_tmp.u.disable_phy; in set_phy_rate()
171 phy_cfg.u.sas_support = 1; in set_phy_rate()
172 phy_cfg.u.sata_support = 1; in set_phy_rate()
173 phy_cfg.u.sata_host_mode = 1; in set_phy_rate()
178 phy_cfg.u.speed_support = 1; in set_phy_rate()
179 phy_cfg.u.snw_3_support = 0; in set_phy_rate()
180 phy_cfg.u.tx_lnk_parity = 1; in set_phy_rate()
181 phy_cfg.u.tx_spt_phs_lnk_rate = 0x30; in set_phy_rate()
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/OK3568_Linux_fs/u-boot/arch/arm/mach-keystone/include/mach/
H A Dddr3.h67 struct ddr3_phy_config phy_cfg; member
81 void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg);
/OK3568_Linux_fs/kernel/drivers/net/wireless/intel/iwlwifi/fw/api/
H A Dconfig.h148 __le32 phy_cfg; member
160 __le32 phy_cfg; member
/OK3568_Linux_fs/u-boot/drivers/video/
H A Ddw_hdmi.c317 if (!hdmi->mpll_cfg || !hdmi->phy_cfg) in hdmi_phy_configure()
348 for (i = 0; hdmi->phy_cfg[i].mpixelclock != (~0ul); i++) in hdmi_phy_configure()
349 if (mpixelclock <= hdmi->phy_cfg[i].mpixelclock) in hdmi_phy_configure()
357 hdmi_phy_i2c_write(hdmi, hdmi->phy_cfg[i].term, PHY_TXTERM); in hdmi_phy_configure()
358 hdmi_phy_i2c_write(hdmi, hdmi->phy_cfg[i].sym_ctr, PHY_CKSYMTXCTRL); in hdmi_phy_configure()
359 hdmi_phy_i2c_write(hdmi, hdmi->phy_cfg[i].vlev_ctr, PHY_VLEVCTRL); in hdmi_phy_configure()

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