Home
last modified time | relevance | path

Searched refs:clksel_con (Results 1 – 25 of 32) sorted by relevance

12

/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3588.c157 con = readl(&cru->clksel_con[165]); in rk3588_center_get_clk()
170 con = readl(&cru->clksel_con[165]); in rk3588_center_get_clk()
183 con = readl(&cru->clksel_con[165]); in rk3588_center_get_clk()
196 con = readl(&cru->clksel_con[165]); in rk3588_center_get_clk()
231 rk_clrsetreg(&cru->clksel_con[165], in rk3588_center_set_clk()
244 rk_clrsetreg(&cru->clksel_con[165], in rk3588_center_set_clk()
257 rk_clrsetreg(&cru->clksel_con[165], in rk3588_center_set_clk()
270 rk_clrsetreg(&cru->clksel_con[165], in rk3588_center_set_clk()
289 con = readl(&cru->clksel_con[8]); in rk3588_top_get_clk()
300 con = readl(&cru->clksel_con[8]); in rk3588_top_get_clk()
[all …]
H A Dclk_rv1108.c145 uint32_t con = readl(&cru->clksel_con[24]); in rv1108_mac_set_clk()
160 rk_clrsetreg(&cru->clksel_con[24], MAC_CLK_DIV_MASK, in rv1108_mac_set_clk()
170 u32 con = readl(&cru->clksel_con[27]); in rv1108_sfc_set_clk()
181 rk_clrsetreg(&cru->clksel_con[27], SFC_CLK_DIV_MASK, in rv1108_sfc_set_clk()
193 val = readl(&cru->clksel_con[22]); in rv1108_saradc_get_clk()
207 rk_clrsetreg(&cru->clksel_con[22], in rv1108_saradc_set_clk()
218 val = readl(&cru->clksel_con[28]); in rv1108_aclk_vio1_get_clk()
232 rk_clrsetreg(&cru->clksel_con[28], in rv1108_aclk_vio1_set_clk()
244 val = readl(&cru->clksel_con[28]); in rv1108_aclk_vio0_get_clk()
258 rk_clrsetreg(&cru->clksel_con[28], in rv1108_aclk_vio0_set_clk()
[all …]
H A Dclk_rk3328.c141 rk_clrsetreg(&cru->clksel_con[0], in rk3328_armclk_set_clk()
145 rk_clrsetreg(&cru->clksel_con[1], in rk3328_armclk_set_clk()
150 rk_clrsetreg(&cru->clksel_con[1], in rk3328_armclk_set_clk()
154 rk_clrsetreg(&cru->clksel_con[0], in rk3328_armclk_set_clk()
174 con = readl(&cru->clksel_con[34]); in rk3328_i2c_get_clk()
178 con = readl(&cru->clksel_con[34]); in rk3328_i2c_get_clk()
182 con = readl(&cru->clksel_con[35]); in rk3328_i2c_get_clk()
186 con = readl(&cru->clksel_con[35]); in rk3328_i2c_get_clk()
208 rk_clrsetreg(&cru->clksel_con[34], in rk3328_i2c_set_clk()
215 rk_clrsetreg(&cru->clksel_con[34], in rk3328_i2c_set_clk()
[all …]
H A Dclk_rk1808.c106 con = readl(&cru->clksel_con[59]); in rk1808_i2c_get_clk()
110 con = readl(&cru->clksel_con[59]); in rk1808_i2c_get_clk()
114 con = readl(&cru->clksel_con[60]); in rk1808_i2c_get_clk()
118 con = readl(&cru->clksel_con[71]); in rk1808_i2c_get_clk()
122 con = readl(&cru->clksel_con[71]); in rk1808_i2c_get_clk()
150 rk_clrsetreg(&cru->clksel_con[59], in rk1808_i2c_set_clk()
156 rk_clrsetreg(&cru->clksel_con[59], in rk1808_i2c_set_clk()
162 rk_clrsetreg(&cru->clksel_con[60], in rk1808_i2c_set_clk()
168 rk_clrsetreg(&cru->clksel_con[71], in rk1808_i2c_set_clk()
174 rk_clrsetreg(&cru->clksel_con[71], in rk1808_i2c_set_clk()
[all …]
H A Dclk_rk3399.c548 rk_clrsetreg(&cru->clksel_con[con_base], in rk3399_configure_cpu()
555 rk_clrsetreg(&cru->clksel_con[con_base + 1], in rk3399_configure_cpu()
590 con = readl(&cru->clksel_con[61]); in rk3399_i2c_get_clk()
594 con = readl(&cru->clksel_con[62]); in rk3399_i2c_get_clk()
598 con = readl(&cru->clksel_con[63]); in rk3399_i2c_get_clk()
602 con = readl(&cru->clksel_con[61]); in rk3399_i2c_get_clk()
606 con = readl(&cru->clksel_con[62]); in rk3399_i2c_get_clk()
610 con = readl(&cru->clksel_con[63]); in rk3399_i2c_get_clk()
631 rk_clrsetreg(&cru->clksel_con[61], I2C_CLK_REG_MASK(1), in rk3399_i2c_set_clk()
635 rk_clrsetreg(&cru->clksel_con[62], I2C_CLK_REG_MASK(2), in rk3399_i2c_set_clk()
[all …]
H A Dclk_rk3568.c561 rk_clrsetreg(&cru->clksel_con[0], in rk3568_armclk_set_clk()
564 rk_clrsetreg(&cru->clksel_con[2], in rk3568_armclk_set_clk()
583 rk_clrsetreg(&cru->clksel_con[3], in rk3568_armclk_set_clk()
587 rk_clrsetreg(&cru->clksel_con[4], in rk3568_armclk_set_clk()
592 rk_clrsetreg(&cru->clksel_con[5], in rk3568_armclk_set_clk()
596 rk_clrsetreg(&cru->clksel_con[3], in rk3568_armclk_set_clk()
600 rk_clrsetreg(&cru->clksel_con[4], in rk3568_armclk_set_clk()
605 rk_clrsetreg(&cru->clksel_con[5], in rk3568_armclk_set_clk()
667 div = (readl(&cru->clksel_con[con]) & mask) >> shift; in rk3568_cpll_div_get_rate()
724 rk_clrsetreg(&cru->clksel_con[con], in rk3568_cpll_div_set_rate()
[all …]
H A Dclk_rk3308.c160 rk_clrsetreg(&cru->clksel_con[0], in rk3308_armclk_set_clk()
168 rk_clrsetreg(&cru->clksel_con[0], in rk3308_armclk_set_clk()
220 con = readl(&cru->clksel_con[con_id]); in rk3308_i2c_get_clk()
252 rk_clrsetreg(&cru->clksel_con[con_id], in rk3308_i2c_set_clk()
264 u32 con = readl(&cru->clksel_con[43]); in rk3308_mac_set_clk()
284 rk_clrsetreg(&cru->clksel_con[43], MAC_DIV_MASK, in rk3308_mac_set_clk()
300 rk_clrsetreg(&cru->clksel_con[43], MAC_CLK_SPEED_SEL_MASK, in rk3308_mac_set_speed_clk()
326 con = readl(&cru->clksel_con[con_id]); in rk3308_mmc_get_clk()
364 rk_clrsetreg(&cru->clksel_con[con_id], in rk3308_mmc_set_clk()
370 rk_clrsetreg(&cru->clksel_con[con_id], in rk3308_mmc_set_clk()
[all …]
H A Dclk_px30.c304 con = readl(&cru->clksel_con[49]); in px30_i2c_get_clk()
308 con = readl(&cru->clksel_con[49]); in px30_i2c_get_clk()
312 con = readl(&cru->clksel_con[50]); in px30_i2c_get_clk()
316 con = readl(&cru->clksel_con[50]); in px30_i2c_get_clk()
337 rk_clrsetreg(&cru->clksel_con[49], in px30_i2c_set_clk()
344 rk_clrsetreg(&cru->clksel_con[49], in px30_i2c_set_clk()
351 rk_clrsetreg(&cru->clksel_con[50], in px30_i2c_set_clk()
358 rk_clrsetreg(&cru->clksel_con[50], in px30_i2c_set_clk()
435 con = readl(&cru->clksel_con[30]); in px30_i2s_get_clk()
436 fracdiv = readl(&cru->clksel_con[31]); in px30_i2s_get_clk()
[all …]
H A Dclk_rv1126.c579 rk_clrsetreg(&cru->clksel_con[1], in rv1126_armclk_set_clk()
584 rk_clrsetreg(&cru->clksel_con[1], in rv1126_armclk_set_clk()
601 con = readl(&cru->clksel_con[0]); in rv1126_pdcore_get_clk()
614 rk_clrsetreg(&cru->clksel_con[0], CORE_HCLK_DIV_MASK, in rv1126_pdcore_set_clk()
627 con = readl(&cru->clksel_con[2]); in rv1126_pdbus_get_clk()
638 con = readl(&cru->clksel_con[2]); in rv1126_pdbus_get_clk()
650 con = readl(&cru->clksel_con[3]); in rv1126_pdbus_get_clk()
683 rk_clrsetreg(&cru->clksel_con[2], in rv1126_pdbus_set_clk()
691 rk_clrsetreg(&cru->clksel_con[2], in rv1126_pdbus_set_clk()
700 rk_clrsetreg(&cru->clksel_con[3], in rv1126_pdbus_set_clk()
[all …]
H A Dclk_rk3368.c312 con = readl(&cru->clksel_con[con_id]); in rk3368_mmc_get_clk()
409 rk_clrsetreg(&cru->clksel_con[con_id], in rk3368_mmc_set_clk()
456 if (readl(&cru->clksel_con[43]) & GMAC_MUX_SEL_EXTCLK) { in rk3368_gmac_set_clk()
460 u32 con = readl(&cru->clksel_con[43]); in rk3368_gmac_set_clk()
476 rk_clrsetreg(&cru->clksel_con[43], GMAC_DIV_CON_MASK, in rk3368_gmac_set_clk()
529 val = readl(&cru->clksel_con[spiclk->reg]); in rk3368_spi_get_clk()
554 rk_clrsetreg(&cru->clksel_con[spiclk->reg], in rk3368_spi_set_clk()
567 val = readl(&cru->clksel_con[25]); in rk3368_saradc_get_clk()
581 rk_clrsetreg(&cru->clksel_con[25], in rk3368_saradc_set_clk()
594 con = readl(&cru->clksel_con[8]); in rk3368_bus_get_clk()
[all …]
H A Dclk_rk3528.c216 rk_clrsetreg(&cru->clksel_con[40], RK3528_DIV_PCLK_DBG_MASK, in rk3528_armclk_set_clk()
219 rk_clrsetreg(&cru->clksel_con[39], RK3528_DIV_ACLK_M_CORE_MASK, in rk3528_armclk_set_clk()
222 rk_clrsetreg(&cru->clksel_con[40], RK3528_DIV_PCLK_DBG_MASK, in rk3528_armclk_set_clk()
225 rk_clrsetreg(&cru->clksel_con[39], RK3528_DIV_ACLK_M_CORE_MASK, in rk3528_armclk_set_clk()
261 reg = &cru->clksel_con[60]; in rk3528_ppll_matrix_get_rate()
267 reg = &cru->clksel_con[60]; in rk3528_ppll_matrix_get_rate()
318 rk_clrsetreg(&cru->clksel_con[id], mask, (div - 1) << shift); in rk3528_ppll_matrix_set_rate()
413 sel = (readl(&cru->clksel_con[con]) & sel_mask) >> sel_shift; in rk3528_cgpll_matrix_get_rate()
425 div = (readl(&cru->clksel_con[con]) & mask) >> shift; in rk3528_cgpll_matrix_get_rate()
541 rk_clrsetreg(&cru->clksel_con[con], mask, (div - 1) << shift); in rk3528_cgpll_matrix_set_rate()
[all …]
H A Dclk_rk3562.c171 rk_clrsetreg(&cru->clksel_con[11], ACLK_CORE_PRE_DIV_MASK, in rk3562_armclk_set_rate()
173 rk_clrsetreg(&cru->clksel_con[12], PCLK_DBG_PRE_DIV_MASK, in rk3562_armclk_set_rate()
175 rk_clrsetreg(&cru->clksel_con[10], CLK_CORE_PRE_DIV_MASK, 0); in rk3562_armclk_set_rate()
180 rk_clrsetreg(&cru->clksel_con[11], ACLK_CORE_PRE_DIV_MASK, in rk3562_armclk_set_rate()
182 rk_clrsetreg(&cru->clksel_con[12], PCLK_DBG_PRE_DIV_MASK, in rk3562_armclk_set_rate()
184 rk_clrsetreg(&cru->clksel_con[10], CLK_CORE_PRE_DIV_MASK, 0); in rk3562_armclk_set_rate()
186 rk_clrsetreg(&cru->clksel_con[11], ACLK_CORE_PRE_DIV_MASK, in rk3562_armclk_set_rate()
188 rk_clrsetreg(&cru->clksel_con[12], PCLK_DBG_PRE_DIV_MASK, in rk3562_armclk_set_rate()
190 rk_clrsetreg(&cru->clksel_con[10], CLK_CORE_PRE_DIV_MASK, 0); in rk3562_armclk_set_rate()
208 con = readl(&cru->clksel_con[40]); in rk3562_bus_get_rate()
[all …]
H A Dclk_rv1106.c129 con = readl(&cru->clksel_con[24]); in rv1106_peri_get_clk()
227 rk_clrsetreg(&cru->clksel_con[24], in rv1106_peri_set_clk()
533 rk_clrsetreg(&cru->clksel_con[71], CLK_I2C1_SEL_MASK, in rv1106_i2c_set_clk()
833 con = readl(&cru->clksel_con[reg + 2]); in rv1106_uart_get_rate()
835 con = readl(&cru->clksel_con[reg]); in rv1106_uart_get_rate()
847 fracdiv = readl(&cru->clksel_con[reg + 1]); in rv1106_uart_get_rate()
909 rk_clrsetreg(&cru->clksel_con[reg], in rv1106_uart_set_rate()
914 rk_clrsetreg(&cru->clksel_con[reg + 2], in rv1106_uart_set_rate()
919 writel(val, &cru->clksel_con[reg + 1]); in rv1106_uart_set_rate()
945 con = readl(&cru->clksel_con[23]); in rv1106_vop_get_clk()
[all …]
/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/
H A Dsdram_rk3308.c205 rk_clrsetreg(&priv->cru->clksel_con[1], in rkdclk_init()
211 rk_clrsetreg(&priv->cru->clksel_con[5], in rkdclk_init()
216 rk_clrsetreg(&priv->cru->clksel_con[6], in rkdclk_init()
221 rk_clrsetreg(&priv->cru->clksel_con[7], in rkdclk_init()
229 rk_clrsetreg(&priv->cru->clksel_con[36], in rkdclk_init()
234 rk_clrsetreg(&priv->cru->clksel_con[37], in rkdclk_init()
239 rk_clrsetreg(&priv->cru->clksel_con[38], in rkdclk_init()
245 rk_clrsetreg(&priv->cru->clksel_con[39], in rkdclk_init()
251 rk_clrsetreg(&priv->cru->clksel_con[41], in rkdclk_init()
257 rk_clrsetreg(&priv->cru->clksel_con[42], in rkdclk_init()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3308/
H A Drk3308.c296 rk_clrsetreg(&cru->clksel_con[16], in board_debug_uart_init()
324 rk_clrsetreg(&cru->clksel_con[22], in board_debug_uart_init()
335 rk_clrsetreg(&cru->clksel_con[10], in board_debug_uart_init()
346 rk_clrsetreg(&cru->clksel_con[13], in board_debug_uart_init()
357 rk_clrsetreg(&cru->clksel_con[19], in board_debug_uart_init()
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/px30/
H A Dpx30.c277 rk_clrsetreg(&cru->clksel_con[34], in board_debug_uart_init()
280 rk_clrsetreg(&cru->clksel_con[35], in board_debug_uart_init()
290 rk_clrsetreg(&cru->clksel_con[46], in board_debug_uart_init()
293 rk_clrsetreg(&cru->clksel_con[47], in board_debug_uart_init()
312 rk_clrsetreg(&cru->clksel_con[37], in board_debug_uart_init()
315 rk_clrsetreg(&cru->clksel_con[38], in board_debug_uart_init()
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3399.h60 u32 clksel_con[108]; member
H A Dcru_rk3368.h37 unsigned int clksel_con[56]; member
H A Dcru_rv1108.h36 unsigned int clksel_con[46]; member
H A Dcru_rk3328.h42 u32 clksel_con[53]; member
H A Dcru_rv1106.h76 unsigned int clksel_con[34]; member
H A Dcru_rk1808.h77 unsigned int clksel_con[73]; member
H A Dcru_rk3528.h67 uint32_t clksel_con[91]; member
H A Dcru_rv1126.h114 unsigned int clksel_con[78]; member
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3368/
H A Drk3368.c111 rk_clrsetreg(&cru->clksel_con[12], MCU_PLL_SEL_MASK | MCU_CLK_DIV_MASK, in mcu_init()

12