Lines Matching refs:clksel_con

304 		con = readl(&cru->clksel_con[49]);  in px30_i2c_get_clk()
308 con = readl(&cru->clksel_con[49]); in px30_i2c_get_clk()
312 con = readl(&cru->clksel_con[50]); in px30_i2c_get_clk()
316 con = readl(&cru->clksel_con[50]); in px30_i2c_get_clk()
337 rk_clrsetreg(&cru->clksel_con[49], in px30_i2c_set_clk()
344 rk_clrsetreg(&cru->clksel_con[49], in px30_i2c_set_clk()
351 rk_clrsetreg(&cru->clksel_con[50], in px30_i2c_set_clk()
358 rk_clrsetreg(&cru->clksel_con[50], in px30_i2c_set_clk()
435 con = readl(&cru->clksel_con[30]); in px30_i2s_get_clk()
436 fracdiv = readl(&cru->clksel_con[31]); in px30_i2s_get_clk()
466 rk_clrsetreg(&cru->clksel_con[30], in px30_i2s_set_clk()
468 rk_clrsetreg(&cru->clksel_con[30], in px30_i2s_set_clk()
470 rk_clrsetreg(&cru->clksel_con[30], in px30_i2s_set_clk()
473 writel(val, &cru->clksel_con[31]); in px30_i2s_set_clk()
491 con = readl(&cru->clksel_con[30]); in px30_i2s1_mclk_get_clk()
505 rk_clrsetreg(&cru->clksel_con[30], CLK_I2S1_OUT_SEL_MASK, in px30_i2s1_mclk_set_clk()
509 rk_clrsetreg(&cru->clksel_con[30], CLK_I2S1_OUT_SEL_MASK, in px30_i2s1_mclk_set_clk()
524 con = readl(&cru->clksel_con[15]); in px30_nandc_get_clk()
541 rk_clrsetreg(&cru->clksel_con[15], in px30_nandc_set_clk()
570 con = readl(&cru->clksel_con[con_id]); in px30_mmc_get_clk()
608 rk_clrsetreg(&cru->clksel_con[con_id], in px30_mmc_set_clk()
613 rk_clrsetreg(&cru->clksel_con[con_id], in px30_mmc_set_clk()
618 rk_clrsetreg(&cru->clksel_con[con_id +1], EMMC_CLK_SEL_MASK, in px30_mmc_set_clk()
629 con = readl(&cru->clksel_con[22]); in px30_sfc_get_clk()
642 rk_clrsetreg(&cru->clksel_con[22], in px30_sfc_set_clk()
657 con = readl(&cru->clksel_con[52]); in px30_pwm_get_clk()
661 con = readl(&cru->clksel_con[52]); in px30_pwm_get_clk()
682 rk_clrsetreg(&cru->clksel_con[52], in px30_pwm_set_clk()
689 rk_clrsetreg(&cru->clksel_con[52], in px30_pwm_set_clk()
708 con = readl(&cru->clksel_con[55]); in px30_saradc_get_clk()
722 rk_clrsetreg(&cru->clksel_con[55], in px30_saradc_set_clk()
734 con = readl(&cru->clksel_con[54]); in px30_tsadc_get_clk()
748 rk_clrsetreg(&cru->clksel_con[54], in px30_tsadc_set_clk()
762 con = readl(&cru->clksel_con[53]); in px30_spi_get_clk()
766 con = readl(&cru->clksel_con[53]); in px30_spi_get_clk()
787 rk_clrsetreg(&cru->clksel_con[53], in px30_spi_set_clk()
794 rk_clrsetreg(&cru->clksel_con[53], in px30_spi_set_clk()
816 con = readl(&cru->clksel_con[3]); in px30_vop_get_clk()
821 con = readl(&cru->clksel_con[5]); in px30_vop_get_clk()
826 con = readl(&cru->clksel_con[8]); in px30_vop_get_clk()
848 rk_clrsetreg(&cru->clksel_con[3], in px30_vop_set_clk()
863 rk_clrsetreg(&cru->clksel_con[5], in px30_vop_set_clk()
886 rk_clrsetreg(&cru->clksel_con[8], in px30_vop_set_clk()
908 con = readl(&cru->clksel_con[23]); in px30_bus_get_clk()
913 con = readl(&cru->clksel_con[24]); in px30_bus_get_clk()
920 con = readl(&cru->clksel_con[24]); in px30_bus_get_clk()
944 rk_clrsetreg(&cru->clksel_con[23], in px30_bus_set_clk()
952 rk_clrsetreg(&cru->clksel_con[24], in px30_bus_set_clk()
961 rk_clrsetreg(&cru->clksel_con[24], in px30_bus_set_clk()
980 con = readl(&cru->clksel_con[14]); in px30_peri_get_clk()
985 con = readl(&cru->clksel_con[14]); in px30_peri_get_clk()
1011 rk_clrsetreg(&cru->clksel_con[14], in px30_peri_set_clk()
1017 rk_clrsetreg(&cru->clksel_con[14], in px30_peri_set_clk()
1036 con = readl(&cru->clksel_con[56]); in px30_otp_get_clk()
1047 con = readl(&cru->clksel_con[56]); in px30_otp_get_clk()
1052 con = readl(&cru->clksel_con[56]); in px30_otp_get_clk()
1079 rk_clrsetreg(&cru->clksel_con[56], in px30_otp_set_clk()
1089 rk_clrsetreg(&cru->clksel_con[56], in px30_otp_set_clk()
1095 rk_clrsetreg(&cru->clksel_con[56], in px30_otp_set_clk()
1114 con = readl(&cru->clksel_con[25]); in px30_crypto_get_clk()
1119 con = readl(&cru->clksel_con[25]); in px30_crypto_get_clk()
1145 rk_clrsetreg(&cru->clksel_con[25], in px30_crypto_set_clk()
1151 rk_clrsetreg(&cru->clksel_con[25], in px30_crypto_set_clk()
1169 u32 con = readl(&cru->clksel_con[22]); in px30_mac_set_clk()
1186 rk_clrsetreg(&cru->clksel_con[22], CLK_GMAC_DIV_MASK, in px30_mac_set_clk()
1202 rk_clrsetreg(&cru->clksel_con[23], RMII_CLK_SEL_MASK, in px30_mac_set_speed_clk()
1268 rk_clrsetreg(&cru->clksel_con[0], in px30_armclk_set_clk()
1276 rk_clrsetreg(&cru->clksel_con[0], in px30_armclk_set_clk()
1609 rk_clrsetreg(&cru->clksel_con[23], RMII_EXTCLK_SEL_MASK, in px30_gmac_set_parent()
1613 rk_clrsetreg(&cru->clksel_con[23], RMII_EXTCLK_SEL_MASK, in px30_gmac_set_parent()