216 		rk_clrsetreg(&cru->clksel_con[40], RK3528_DIV_PCLK_DBG_MASK,  in rk3528_armclk_set_clk()
219 		rk_clrsetreg(&cru->clksel_con[39], RK3528_DIV_ACLK_M_CORE_MASK,  in rk3528_armclk_set_clk()
222 		rk_clrsetreg(&cru->clksel_con[40], RK3528_DIV_PCLK_DBG_MASK,  in rk3528_armclk_set_clk()
225 		rk_clrsetreg(&cru->clksel_con[39], RK3528_DIV_ACLK_M_CORE_MASK,  in rk3528_armclk_set_clk()
261 		reg = &cru->clksel_con[60];  in rk3528_ppll_matrix_get_rate()
267 		reg = &cru->clksel_con[60];  in rk3528_ppll_matrix_get_rate()
318 		rk_clrsetreg(&cru->clksel_con[id], mask, (div - 1) << shift);  in rk3528_ppll_matrix_set_rate()
413 		sel = (readl(&cru->clksel_con[con]) & sel_mask) >> sel_shift;  in rk3528_cgpll_matrix_get_rate()
425 	div = (readl(&cru->clksel_con[con]) & mask) >> shift;  in rk3528_cgpll_matrix_get_rate()
541 	rk_clrsetreg(&cru->clksel_con[con], mask, (div - 1) << shift);  in rk3528_cgpll_matrix_set_rate()
543 		rk_clrsetreg(&cru->clksel_con[con], sel_mask, sel << sel_shift);  in rk3528_cgpll_matrix_set_rate()
612 		con = readl(&cru->clksel_con[id]);  in rk3528_i2c_get_clk()
698 		rk_clrsetreg(&cru->clksel_con[id], mask, sel << shift);  in rk3528_i2c_set_clk()
725 	con = readl(&cru->clksel_con[id]);  in rk3528_spi_get_clk()
770 	rk_clrsetreg(&cru->clksel_con[id], mask, sel << shift);  in rk3528_spi_set_clk()
798 	con = readl(&cru->clksel_con[id]);  in rk3528_pwm_get_clk()
840 	rk_clrsetreg(&cru->clksel_con[id], mask, sel << shift);  in rk3528_pwm_set_clk()
850 	con = readl(&cru->clksel_con[74]);  in rk3528_adc_get_clk()
901 	rk_clrsetreg(&cru->clksel_con[74], mask, (div - 1) << shift);  in rk3528_adc_set_clk()
912 	con = readl(&cru->clksel_con[85]);  in rk3528_sdmmc_get_clk()
946 	rk_clrsetreg(&cru->clksel_con[85],  in rk3528_sdmmc_set_clk()
960 	con = readl(&cru->clksel_con[61]);  in rk3528_sfc_get_clk()
992 	rk_clrsetreg(&cru->clksel_con[61],  in rk3528_sfc_set_clk()
1006 	con = readl(&cru->clksel_con[62]);  in rk3528_emmc_get_clk()
1039 	rk_clrsetreg(&cru->clksel_con[62],  in rk3528_emmc_set_clk()
1078 	con = readl(&cru->clksel_con[id]);  in rk3528_dclk_vop_get_clk()
1129 	rk_clrsetreg(&cru->clksel_con[id], sel, div);  in rk3528_dclk_vop_set_clk()
1210 	con = readl(&cru->clksel_con[id - 2]);  in rk3528_uart_get_rate()
1213 	con = readl(&cru->clksel_con[id]);  in rk3528_uart_get_rate()
1219 		frac_div = readl(&cru->clksel_con[id - 1]);  in rk3528_uart_get_rate()
1322 	rk_clrsetreg(&cru->clksel_con[id - 2], div_mask, (div - 1) << div_shift);  in rk3528_uart_set_rate()
1323 	rk_clrsetreg(&cru->clksel_con[id], sel_mask, sel << sel_shift);  in rk3528_uart_set_rate()
1326 		writel(val, &cru->clksel_con[id - 1]);  in rk3528_uart_set_rate()
1576 			rk_clrsetreg(&priv->cru->clksel_con[84], 0x1, 1);  in rk3528_clk_set_parent()
1578 			rk_clrsetreg(&priv->cru->clksel_con[84], 0x1, 0);  in rk3528_clk_set_parent()
1854 	writel(0x01200120, &priv->cru->clksel_con[1]);  in rk3528_clk_init()
1855 	writel(0x00030003, &priv->cru->clksel_con[2]);  in rk3528_clk_init()
2044 	con = readl(&cru->clksel_con[id]);  in rk3528_crypto_get_rate()
2090 	rk_clrsetreg(&cru->clksel_con[id], mask, sel << shift);  in rk3528_crypto_set_rate()