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Searched refs:ODT (Results 1 – 25 of 37) sorted by relevance

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/OK3568_Linux_fs/u-boot/board/buffalo/lsxl/
H A Dkwbimage-lschl.cfg116 # bit2: 0, ODT control Rtt[0] (Rtt=2, 150 ohm termination)
118 # bit6: 1, ODT control Rtt[1] (Rtt=2, 150 ohm termination)
138 # DDR2 ODT Read Timing (default values)
143 # bit15-12: 5, 5 cycles from read command to assertion of internal ODT signal
144 # bit19-16: 8, 8 cycles from read command to de-assertion of internal ODT signal
147 # DDR2 ODT Write Timing (default values)
151 # bit15-12: 5, 5 cycles from write command to assertion of internal ODT signal
152 # bit19-16: 8, 8 cycles from write command to de-assertion of internal ODT signal
179 # DDR ODT Control (Low)
188 # DDR ODT Control (High)
[all …]
H A Dkwbimage-lsxhl.cfg116 # bit2: 1, ODT control Rtt[0] (Rtt=1, 75 ohm termination)
118 # bit6: 0, ODT control Rtt[1] (Rtt=1, 75 ohm termination)
138 # DDR2 ODT Read Timing (default values)
143 # bit15-12: 5, 5 cycles from read command to assertion of internal ODT signal
144 # bit19-16: 8, 8 cycles from read command to de-assertion of internal ODT signal
147 # DDR2 ODT Write Timing (default values)
151 # bit15-12: 5, 5 cycles from write command to assertion of internal ODT signal
152 # bit19-16: 8, 8 cycles from write command to de-assertion of internal ODT signal
179 # DDR ODT Control (Low)
188 # DDR ODT Control (High)
[all …]
/OK3568_Linux_fs/u-boot/board/d-link/dns325/
H A Dkwbimage.cfg107 # bit2: 0, ODT control Rtt[0] (Rtt=2, 150 ohm termination)
109 # bit6: 1, ODT control Rtt[1] (Rtt=2, 150 ohm termination)
128 DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing
132 # bit15-12: 5, 5 cycles from read command to assertion of internal ODT signal
133 # bit19-16: 8, 8 cycles from read command to de-assertion of internal ODT signal
136 DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing
139 # bit15-12: 5, 5 cycles from write command to assertion of internal ODT signal
140 # bit19-16: 8, 8 cycles from write command to de-assertion of internal ODT signal
162 DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low)
170 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
[all …]
/OK3568_Linux_fs/u-boot/board/keymile/km_arm/
H A Dkwbimage-memphis.cfg112 # bit2: 1, DDR ODT control lsd disabled
114 # bit6: 0, DDR ODT control msb disabled
137 # bit15-12: 0100, internal ODT assertion 4 cycles after read
138 # bit19-16: 1000, internal ODT de-assertion 8 cycles after read
144 # bit11-8 : 0100, internal ODT assertion x cycles after write
145 # bit15-12: 1000, internal ODT de-assertion x cycles after write
159 DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low)
163 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
164 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
168 DATA 0xFFD0149C 0x0000F801 # CPU ODT Control
[all …]
H A Dkwbimage_128M16_1.cfg173 # bit 2: 1, DDR ODT control lsb, 75 ohm termination [RTT0]
175 # bit 6: 0, DDR ODT control msb, 75 ohm termination [RTT1]
198 # (ODT turn off delay 2,5 clk cycles)
199 # bit 15-12: 4, internal ODT time based on bit 7-4
201 # bit 19-16: 8, internal ODT de-assertion based on bit 11-8
208 # bit 11-8: 4, internal ODT assertion 2 cycles after write start command
210 # bit 15-12: 8, internal ODT de-assertion 5 cycles after write start command
228 DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low)
238 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
239 # bit 1-0: 0, ODT0 controlled by ODT Control (low) register above
[all …]
H A Dkwbimage_256M8_1.cfg175 # bit 2: 1, DDR ODT control lsb, 75ohm termination [RTT0]
177 # bit 6: 0, DDR ODT control msb, 75ohm termination [RTT1]
200 # (ODT turn off delay 2,5 clk cycles)
201 # bit 15-12: 4, internal ODT time based on bit 7-4
203 # bit 19-16: 8, internal ODT de-assertion based on bit 11-8
210 # bit 11-8: 4, internal ODT assertion 2 cycles after write start command
212 # bit 15-12: 8, internal ODT de-assertion 5 cycles after write start command
230 DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low)
240 DATA 0xFFD01498 0x00000004 # DDR ODT Control (High)
241 # bit 1-0: 0, ODT0 controlled by ODT Control (low) register above
[all …]
H A Dkwbimage.cfg109 # bit2: 1, DDR ODT control lsd disabled
111 # bit6: 1, DDR ODT control msb, enabled
144 DATA 0xFFD01494 0x00010001 # DDR ODT Control (Low)
148 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
149 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
153 DATA 0xFFD0149C 0x0000FC11 # CPU ODT Control
154 # bit3-0: F, ODT0Rd, Internal ODT asserted during read from DRAM bank0
155 # bit7-4: 0, ODT0Wr, Internal ODT asserted during write to DRAM bank0
157 # bit11-10:2, DQ_ODTSel. ODT select turned on, 75 ohm
/OK3568_Linux_fs/u-boot/board/Marvell/openrd/
H A Dkwbimage.cfg97 # bit2: 0, DDR ODT control lsd (disabled)
99 # bit6: 1, DDR ODT control msb, (disabled)
118 DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values)
119 DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
135 DATA 0xFFD01494 0x00120012 # DDR ODT Control (Low)
140 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
142 DATA 0xFFD0149C 0x0000E40f # CPU ODT Control
143 # bit3-0: 1111, internal ODT is asserted during read from DRAM bank 0-3
144 # bit11-10: 01, M_DQ, M_DM, and M_DQS I/O buffer ODT Select: 150 ohm
145 # bit13-12: 10, M_STARTBURST_IN I/O buffer ODT Select: 75 ohm
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dsddr3.c72 int CWL, CL, WR, DLL = 0, ODT = 0; in nvkm_sddr3_calc() local
85 ODT = ram->next->bios.timing_10_ODT; in nvkm_sddr3_calc()
92 ODT = (ram->mr[1] & 0x004) >> 2 | in nvkm_sddr3_calc()
112 ram->mr[1] |= (ODT & 0x1) << 2; in nvkm_sddr3_calc()
113 ram->mr[1] |= (ODT & 0x2) << 5; in nvkm_sddr3_calc()
114 ram->mr[1] |= (ODT & 0x4) << 7; in nvkm_sddr3_calc()
H A Dsddr2.c63 int CL, WR, DLL = 0, ODT = 0; in nvkm_sddr2_calc() local
70 ODT = ram->next->bios.timing_10_ODT & 3; in nvkm_sddr2_calc()
82 ODT = (ram->mr[1] & 0x004) >> 2 | in nvkm_sddr2_calc()
96 ram->mr[1] |= (ODT & 0x1) << 2; in nvkm_sddr2_calc()
97 ram->mr[1] |= (ODT & 0x2) << 5; in nvkm_sddr2_calc()
H A Dgddr3.c73 int CL, WR, CWL, DLL = 0, ODT = 0, RON, hi; in nvkm_gddr3_calc() local
81 ODT = ram->next->bios.timing_10_ODT; in nvkm_gddr3_calc()
98 ODT = (ram->mr[1] & 0xc) >> 2; in nvkm_gddr3_calc()
113 ram->mr[1] |= (ODT & 0x03) << 2; in nvkm_gddr3_calc()
/OK3568_Linux_fs/u-boot/board/LaCie/net2big_v2/
H A Dkwbimage.cfg97 # bit2: 1, DDR ODT control lsd enabled
99 # bit6: 1, DDR ODT control msb, enabled
118 DATA 0xFFD01428 0x00096630 # DDR2 ODT Read Timing (default values)
119 DATA 0xFFD0147C 0x00009663 # DDR2 ODT Write Timing (default values)
133 DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low)
137 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
138 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
142 DATA 0xFFD0149C 0x0000E40F # CPU ODT Control
143 # bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
144 # bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0
[all …]
/OK3568_Linux_fs/u-boot/board/LaCie/netspace_v2/
H A Dkwbimage-ns2l.cfg97 # bit2: 1, DDR ODT control lsd enabled
99 # bit6: 1, DDR ODT control msb, enabled
118 DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values)
119 DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
133 DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low)
137 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
138 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
142 DATA 0xFFD0149C 0x0000E40F # CPU ODT Control
143 # bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
144 # bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0
[all …]
H A Dkwbimage-is2.cfg97 # bit2: 1, DDR ODT control lsd enabled
99 # bit6: 1, DDR ODT control msb, enabled
118 DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values)
119 DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
133 DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low)
137 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
138 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
142 DATA 0xFFD0149C 0x0000E40F # CPU ODT Control
143 # bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
144 # bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0
[all …]
H A Dkwbimage.cfg97 # bit2: 1, DDR ODT control lsd enabled
99 # bit6: 1, DDR ODT control msb, enabled
118 DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values)
119 DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
133 DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low)
137 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
138 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
142 DATA 0xFFD0149C 0x0000E40F # CPU ODT Control
143 # bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
144 # bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/devfreq/
H A Drk3399_dmc.txt70 Note: PHY DLL and PHY ODT are independent.
73 the ODT disable frequency in MHz (Mega Hz).
75 the ODT on the DRAM side and controller side are
83 the DRAM side ODT strength in ohms. Default value
96 the PHY side ODT strength. Default value is
100 then ODT disable frequency in MHz (Mega Hz).
102 the ODT on the DRAM side and controller side are
110 the DRAM side ODT strength in ohms. Default value
128 defines the ODT disable frequency in
130 ddr3_odt_dis_freq, the ODT on the DRAM side and
[all …]
/OK3568_Linux_fs/u-boot/board/Marvell/guruplug/
H A Dkwbimage.cfg97 # bit2: 0, DDR ODT control lsd (disabled)
99 # bit6: 1, DDR ODT control msb, (disabled)
118 DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values)
119 DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
135 DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low)
136 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
137 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
141 DATA 0xFFD0149C 0x0000E803 # CPU ODT Control
/OK3568_Linux_fs/u-boot/board/Seagate/dockstar/
H A Dkwbimage.cfg100 # bit2: 0, DDR ODT control lsd (disabled)
102 # bit6: 1, DDR ODT control msb, (disabled)
121 DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values)
122 DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
138 DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low)
139 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
140 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
144 DATA 0xFFD0149C 0x0000E803 # CPU ODT Control
/OK3568_Linux_fs/u-boot/board/Synology/ds109/
H A Dkwbimage.cfg101 # bit2: 0, DDR ODT control lsd (disabled)
103 # bit6: 1, DDR ODT control msb, (disabled)
122 DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values)
123 DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
141 DATA 0xFFD01494 0x003C0000 # DDR ODT Control (Low)
142 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
143 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
147 DATA 0xFFD0149C 0x0000F80F # CPU ODT Control
/OK3568_Linux_fs/u-boot/board/Marvell/dreamplug/
H A Dkwbimage.cfg98 # bit2: 0, DDR ODT control lsd (disabled)
100 # bit6: 1, DDR ODT control msb, (disabled)
119 DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values)
120 DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
136 DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low)
137 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
138 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
142 DATA 0xFFD0149C 0x0000E803 # CPU ODT Control
/OK3568_Linux_fs/u-boot/board/Seagate/goflexhome/
H A Dkwbimage.cfg103 # bit2: 0, DDR ODT control lsd (disabled)
105 # bit6: 1, DDR ODT control msb, (disabled)
124 DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values)
125 DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
141 DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low)
142 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
143 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
147 DATA 0xFFD0149C 0x0000E803 # CPU ODT Control
/OK3568_Linux_fs/u-boot/board/Marvell/sheevaplug/
H A Dkwbimage.cfg97 # bit2: 0, DDR ODT control lsd (disabled)
99 # bit6: 1, DDR ODT control msb, (disabled)
118 DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values)
119 DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
135 DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low)
136 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
137 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
141 DATA 0xFFD0149C 0x0000E803 # CPU ODT Control
/OK3568_Linux_fs/u-boot/board/iomega/iconnect/
H A Dkwbimage.cfg97 # bit2: 0, DDR ODT control lsd (disabled)
99 # bit6: 1, DDR ODT control msb, (disabled)
118 DATA 0xffd01428 0x00085520 # DDR2 ODT Read Timing (default values)
119 DATA 0xffd0147c 0x00008552 # DDR2 ODT Write Timing (default values)
135 DATA 0xffd01494 0x00030000 # DDR ODT Control (Low)
141 DATA 0xffd01498 0x00000000 # DDR ODT Control (High)
142 # bit1-0: 0x0, ODT0 controlled by ODT Control (low) register above
146 DATA 0xffd0149c 0x0000e803 # CPU ODT Control
/OK3568_Linux_fs/u-boot/board/raidsonic/ib62x0/
H A Dkwbimage.cfg98 # bit2: 1, DDR ODT control lsd (disabled)
100 # bit6: 0, DDR ODT control msb, (disabled)
119 DATA 0xffd01428 0x00085520 # DDR2 ODT Read Timing (default values)
120 DATA 0xffd0147c 0x00008552 # DDR2 ODT Write Timing (default values)
136 DATA 0xffd01494 0x00030000 # DDR ODT Control (Low)
142 DATA 0xffd01498 0x00000000 # DDR ODT Control (High)
143 # bit1-0: 0x0, ODT0 controlled by ODT Control (low) register above
147 DATA 0xffd0149c 0x0000e803 # CPU ODT Control
/OK3568_Linux_fs/u-boot/board/cloudengines/pogo_e02/
H A Dkwbimage.cfg101 # bit2: 0, DDR ODT control lsd (disabled)
103 # bit6: 1, DDR ODT control msb, (disabled)
122 DATA 0xffd01428 0x00085520 # DDR2 ODT Read Timing (default values)
123 DATA 0xffd0147c 0x00008552 # DDR2 ODT Write Timing (default values)
139 DATA 0xffd01494 0x00030000 # DDR ODT Control (Low)
145 DATA 0xffd01498 0x00000000 # DDR ODT Control (High)
146 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
150 DATA 0xffd0149c 0x0000e803 # CPU ODT Control

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