Lines Matching refs:ODT
97 # bit2: 1, DDR ODT control lsd enabled
99 # bit6: 1, DDR ODT control msb, enabled
118 DATA 0xFFD01428 0x00096630 # DDR2 ODT Read Timing (default values)
119 DATA 0xFFD0147C 0x00009663 # DDR2 ODT Write Timing (default values)
133 DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low)
137 DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
138 # bit1-0: 00, ODT0 controlled by ODT Control (low) register above
142 DATA 0xFFD0149C 0x0000E40F # CPU ODT Control
143 # bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
144 # bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0
145 # bit11-10:1, DQ_ODTSel. ODT select turned on