| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | integratorap.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 13 compatible = "arm,integrator-ap"; 16 #address-cells = <1>; 17 #size-cells = <0>; 27 /* compatible = "arm,arm926ej-s"; */ 30 * The documentation in ARM DUI 0138E page 3-12 states 32 * but painful trial-and-error has proved to me that it [all …]
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| H A D | ste-href.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright 2012 ST-Ericsson AB 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/leds/common.h> 8 #include "ste-href-family-pinctrl.dtsi" 18 pinctrl-names = "default", "sleep"; 19 pinctrl-0 = <&u0_a_1_default>; 20 pinctrl-1 = <&u0_a_1_sleep>; 26 pinctrl-names = "default", "sleep"; 27 pinctrl-0 = <&u1rxtx_a_1_default>; [all …]
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| H A D | qcom-msm8660.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/qcom,gcc-msm8660.h> 7 #include <dt-bindings/soc/qcom,gsbi.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 interrupt-parent = <&intc>; 17 #address-cells = <1>; [all …]
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| H A D | imx7d.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 7 #include <dt-bindings/reset/imx7-reset.h> 12 clock-frequency = <996000000>; 13 operating-points-v2 = <&cpu0_opp_table>; 14 #cooling-cells = <2>; 15 nvmem-cells = <&fuse_grade>; 16 nvmem-cell-names = "speed_grade"; 20 compatible = "arm,cortex-a7"; 23 clock-frequency = <996000000>; 24 operating-points-v2 = <&cpu0_opp_table>; [all …]
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| H A D | ste-snowball.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright 2011 ST-Ericsson AB 6 /dts-v1/; 7 #include "ste-db9500.dtsi" 8 #include "ste-href-ab8500.dtsi" 9 #include "ste-href-family-pinctrl.dtsi" 13 compatible = "calaosystems,snowball-a9500", "st-ericsson,u9500"; 21 compatible = "regulator-fixed"; 22 regulator-name = "en-3v3-fixed-supply"; 23 regulator-min-microvolt = <3300000>; [all …]
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| H A D | qcom-msm8960.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/clock/qcom,gcc-msm8960.h> 6 #include <dt-bindings/mfd/qcom-rpm.h> 7 #include <dt-bindings/soc/qcom,gsbi.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 interrupt-parent = <&intc>; 17 #address-cells = <1>; [all …]
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| H A D | bcm2711.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/soc/bcm2835-pm.h> 10 #address-cells = <2>; 11 #size-cells = <1>; 13 interrupt-parent = <&gicv2>; 16 compatible = "brcm,bcm2711-vc5"; 20 clk_27MHz: clk-27M { 21 #clock-cells = <0>; 22 compatible = "fixed-clock"; [all …]
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| H A D | ste-ux500-samsung-golden.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /dts-v1/; 4 #include "ste-db8500.dtsi" 5 #include "ste-ab8505.dtsi" 6 #include "ste-dbx5x0-pinctrl.dtsi" 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 13 * You need an intermediate, device-tree compatible bootloader 16 * There is a port of (mainline) U-Boot, see [all …]
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| H A D | ste-ux500-samsung-skomer.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Devicetree for the Samsung XCover 2 GT-S7710 also known as Skomer. 6 /dts-v1/; 7 #include "ste-db8500.dtsi" 8 #include "ste-ab8505.dtsi" 9 #include "ste-dbx5x0-pinctrl.dtsi" 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 15 model = "Samsung XCover 2 (GT-S7710)"; [all …]
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| H A D | qcom-mdm9615.dtsi | 7 * This file is dual-licensed: you can use it either under the terms 46 /dts-v1/; 48 #include <dt-bindings/interrupt-controller/arm-gic.h> 49 #include <dt-bindings/clock/qcom,gcc-mdm9615.h> 50 #include <dt-bindings/reset/qcom,gcc-mdm9615.h> 51 #include <dt-bindings/mfd/qcom-rpm.h> 52 #include <dt-bindings/soc/qcom,gsbi.h> 55 #address-cells = <1>; 56 #size-cells = <1>; 59 interrupt-parent = <&intc>; [all …]
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| H A D | mps2.dtsi | 6 * This file is dual-licensed: you can use it either under the terms 45 #include "armv7-m.dtsi" 48 #address-cells = <1>; 49 #size-cells = <1>; 51 oscclk0: clk-osc0 { 52 compatible = "fixed-clock"; 53 #clock-cells = <0>; 54 clock-frequency = <50000000>; 57 oscclk1: clk-osc1 { 58 compatible = "fixed-clock"; [all …]
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| H A D | stm32f746.dtsi | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 43 #include "armv7-m.dtsi" 44 #include <dt-bindings/clock/stm32fx-clock.h> 45 #include <dt-bindings/mfd/stm32f7-rcc.h> 48 #address-cells = <1>; 49 #size-cells = <1>; 52 clk_hse: clk-hse { 53 #clock-cells = <0>; 54 compatible = "fixed-clock"; [all …]
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| H A D | hisi-x5hd2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2013-2014 Linaro Ltd. 4 * Copyright (c) 2013-2014 Hisilicon Limited. 7 #include <dt-bindings/clock/hix5hd2-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 17 gic: interrupt-controller@f8a01000 { 18 compatible = "arm,cortex-a9-gic"; 19 #interrupt-cells = <3>; 20 #address-cells = <0>; [all …]
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| H A D | qcom-apq8064.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/clock/qcom,gcc-msm8960.h> 5 #include <dt-bindings/reset/qcom,gcc-msm8960.h> 6 #include <dt-bindings/clock/qcom,mmcc-msm8960.h> 7 #include <dt-bindings/clock/qcom,rpmcc.h> 8 #include <dt-bindings/soc/qcom,gsbi.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #address-cells = <1>; [all …]
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| H A D | qcom-ipq8064.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/clock/qcom,gcc-ipq806x.h> 6 #include <dt-bindings/clock/qcom,lcc-ipq806x.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/reset/qcom,gcc-ipq806x.h> 9 #include <dt-bindings/soc/qcom,gsbi.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #address-cells = <1>; [all …]
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| H A D | lpc18xx.dtsi | 9 * Released under the terms of 3-clause BSD License 14 #include "armv7-m.dtsi" 16 #include "dt-bindings/clock/lpc18xx-cgu.h" 17 #include "dt-bindings/clock/lpc18xx-ccu.h" 23 #address-cells = <1>; 24 #size-cells = <1>; 27 #address-cells = <1>; 28 #size-cells = <0>; 31 compatible = "arm,cortex-m3"; 40 compatible = "fixed-clock"; [all …]
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| /OK3568_Linux_fs/kernel/include/linux/amba/ |
| H A D | bus.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 7 * region or that is derived from a PrimeCell. 32 * Class 0xF remains for PrimeCell and legacy components. (AMBA_CID above) 36 * Class 0x2-0x8,0xA and 0xD-0xD are presently reserved. 38 * Remaining CID bits stay as 0xb105-00d 45 * the amba_id->data pointer. 70 unsigned int periphid; member 101 /* This is used to generate pseudo-ID for AMBA device */ 110 #define amba_get_drvdata(d) dev_get_drvdata(&d->dev) 111 #define amba_set_drvdata(d,p) dev_set_drvdata(&d->dev, p) [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/ |
| H A D | primecell.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/arm/primecell.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM Primecell Peripherals 10 - Rob Herring <robh@kernel.org> 13 ARM, Ltd. Primecell peripherals have a standard id register that can be used to 20 const: arm,primecell 22 Should be a specific name for the peripheral followed by "arm,primecell". 26 arm,primecell-periphid: [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | imx7d.dtsi | 5 * This file is dual-licensed: you can use it either under the terms 49 operating-points = < 54 clock-frequency = <996000000>; 58 compatible = "arm,cortex-a7"; 61 clock-frequency = <996000000>; 67 compatible = "arm,coresight-etm3x", "arm,primecell"; 72 * without arm,primecell-periphid because amba bus try to 75 arm,primecell-periphid = <0xbb956>; 78 clock-names = "apb_pclk"; 82 remote-endpoint = <&ca_funnel_in_port1>; [all …]
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| H A D | bcm283x.dtsi | 1 #include <dt-bindings/pinctrl/bcm2835.h> 2 #include <dt-bindings/clock/bcm2835.h> 3 #include <dt-bindings/clock/bcm2835-aux.h> 4 #include <dt-bindings/gpio/gpio.h> 14 interrupt-parent = <&intc>; 15 #address-cells = <1>; 16 #size-cells = <1>; 23 compatible = "simple-bus"; 24 #address-cells = <1>; 25 #size-cells = <1>; [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/dma/ |
| H A D | arm-pl08x.txt | 4 - compatible: "arm,pl080", "arm,primecell"; 5 "arm,pl081", "arm,primecell"; 6 "faraday,ftdmac020", "arm,primecell" 7 - arm,primecell-periphid: on the FTDMAC020 the primecell ID is not hard-coded 9 follows the PrimeCell standard numbering using the JEP106 vendor code 0x38 11 - reg: Address range of the PL08x registers 12 - interrupt: The PL08x interrupt number 13 - clocks: The clock running the IP core clock 14 - clock-names: Must contain "apb_pclk" 15 - lli-bus-interface-ahb1: if AHB master 1 is eligible for fetching LLIs [all …]
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| H A D | lpc1850-dmamux.txt | 4 - compatible: "nxp,lpc1850-dmamux" 5 - reg: Memory map for accessing module 6 - #dma-cells: Should be set to <3>. 8 * 2nd cell contain the mux value (0-3) for the peripheral 11 - dma-requests: Number of DMA requests for the mux 12 - dma-masters: phandle pointing to the DMA controller 15 - dma-requests: Number of DMA requests the controller can handle 20 compatible = "nxp,lpc1850-gpdma", "arm,pl080", "arm,primecell"; 21 arm,primecell-periphid = <0x00041080>; 25 clock-names = "apb_pclk"; [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/ |
| H A D | mmci.txt | 1 * ARM PrimeCell MultiMedia Card Interface (MMCI) PL180/1 3 The ARM PrimeCell MMCI PL180 and PL181 provides an interface for 11 - compatible : contains "arm,pl18x", "arm,primecell". 12 - vmmc-supply : phandle to the regulator device tree node, mentioned 16 - arm,primecell-periphid : contains the PrimeCell Peripheral ID, it overrides 18 - resets : phandle to internal reset line. 20 - vqmmc-supply : phandle to the regulator device tree node, mentioned 23 - st,sig-dir-dat0 : bus signal direction pin used for DAT[0]. 24 - st,sig-dir-dat2 : bus signal direction pin used for DAT[2]. 25 - st,sig-dir-dat31 : bus signal direction pin used for DAT[3] and DAT[1]. [all …]
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| /OK3568_Linux_fs/kernel/drivers/amba/ |
| H A D | bus.c | 1 // SPDX-License-Identifier: GPL-2.0-only 19 #include <linux/clk/clk-conf.h> 27 /* called on periphid match and class 0x9 coresight device. */ 34 uci = table->data; in amba_cs_uci_id_match() 36 /* no table data or zero mask - return match on periphid */ in amba_cs_uci_id_match() 37 if (!uci || (uci->devarch_mask == 0)) in amba_cs_uci_id_match() 41 ret = (dev->uci.devtype == uci->devtype) && in amba_cs_uci_id_match() 42 ((dev->uci.devarch & uci->devarch_mask) == uci->devarch); in amba_cs_uci_id_match() 49 while (table->mask) { in amba_lookup() 50 if (((dev->periphid & table->mask) == table->id) && in amba_lookup() [all …]
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| /OK3568_Linux_fs/kernel/drivers/of/ |
| H A D | platform.c | 1 // SPDX-License-Identifier: GPL-2.0+ 16 #include <linux/dma-mapping.h> 26 { .compatible = "simple-bus", }, 27 { .compatible = "simple-mfd", }, 30 { .compatible = "arm,amba-bus", }, 36 { .compatible = "operating-points-v2", }, 41 * of_find_device_by_node - Find the platform_device associated with a node 68 * of_device_make_bus_id - Use the device node data to assign a unique name 77 struct device_node *node = dev->of_node; in of_device_make_bus_id() 82 while (node->parent) { in of_device_make_bus_id() [all …]
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