1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2015 ARM Limited 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Author: Vladimir Murzin <vladimir.murzin@arm.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 7*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 8*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 9*4882a593Smuzhiyun * whole. 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * a) This file is free software; you can redistribute it and/or 12*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as 13*4882a593Smuzhiyun * published by the Free Software Foundation; either version 2 of the 14*4882a593Smuzhiyun * License, or (at your option) any later version. 15*4882a593Smuzhiyun * 16*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, 17*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 18*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19*4882a593Smuzhiyun * GNU General Public License for more details. 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * Or, alternatively, 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 24*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 25*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 26*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 27*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 28*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 29*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 30*4882a593Smuzhiyun * conditions: 31*4882a593Smuzhiyun * 32*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 33*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 34*4882a593Smuzhiyun * 35*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 36*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 37*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 38*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 39*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 40*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 41*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 42*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 43*4882a593Smuzhiyun */ 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun#include "armv7-m.dtsi" 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun/ { 48*4882a593Smuzhiyun #address-cells = <1>; 49*4882a593Smuzhiyun #size-cells = <1>; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun oscclk0: clk-osc0 { 52*4882a593Smuzhiyun compatible = "fixed-clock"; 53*4882a593Smuzhiyun #clock-cells = <0>; 54*4882a593Smuzhiyun clock-frequency = <50000000>; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun oscclk1: clk-osc1 { 58*4882a593Smuzhiyun compatible = "fixed-clock"; 59*4882a593Smuzhiyun #clock-cells = <0>; 60*4882a593Smuzhiyun clock-frequency = <24576000>; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun oscclk2: clk-osc2 { 64*4882a593Smuzhiyun compatible = "fixed-clock"; 65*4882a593Smuzhiyun #clock-cells = <0>; 66*4882a593Smuzhiyun clock-frequency = <25000000>; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun cfgclk: clk-cfg { 70*4882a593Smuzhiyun compatible = "fixed-clock"; 71*4882a593Smuzhiyun #clock-cells = <0>; 72*4882a593Smuzhiyun clock-frequency = <5000000>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun spicfgclk: clk-spicfg { 76*4882a593Smuzhiyun compatible = "fixed-clock"; 77*4882a593Smuzhiyun #clock-cells = <0>; 78*4882a593Smuzhiyun clock-frequency = <75000000>; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun sysclk: clk-sys { 82*4882a593Smuzhiyun compatible = "fixed-factor-clock"; 83*4882a593Smuzhiyun clocks = <&oscclk0>; 84*4882a593Smuzhiyun #clock-cells = <0>; 85*4882a593Smuzhiyun clock-div = <2>; 86*4882a593Smuzhiyun clock-mult = <1>; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun audmclk: clk-audm { 90*4882a593Smuzhiyun compatible = "fixed-factor-clock"; 91*4882a593Smuzhiyun clocks = <&oscclk1>; 92*4882a593Smuzhiyun #clock-cells = <0>; 93*4882a593Smuzhiyun clock-div = <2>; 94*4882a593Smuzhiyun clock-mult = <1>; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun audsclk: clk-auds { 98*4882a593Smuzhiyun compatible = "fixed-factor-clock"; 99*4882a593Smuzhiyun clocks = <&oscclk1>; 100*4882a593Smuzhiyun #clock-cells = <0>; 101*4882a593Smuzhiyun clock-div = <8>; 102*4882a593Smuzhiyun clock-mult = <1>; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun spiclcd: clk-cpiclcd { 106*4882a593Smuzhiyun compatible = "fixed-factor-clock"; 107*4882a593Smuzhiyun clocks = <&oscclk0>; 108*4882a593Smuzhiyun #clock-cells = <0>; 109*4882a593Smuzhiyun clock-div = <2>; 110*4882a593Smuzhiyun clock-mult = <1>; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun spicon: clk-spicon { 114*4882a593Smuzhiyun compatible = "fixed-factor-clock"; 115*4882a593Smuzhiyun clocks = <&oscclk0>; 116*4882a593Smuzhiyun #clock-cells = <0>; 117*4882a593Smuzhiyun clock-div = <2>; 118*4882a593Smuzhiyun clock-mult = <1>; 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun i2cclcd: clk-i2cclcd { 122*4882a593Smuzhiyun compatible = "fixed-factor-clock"; 123*4882a593Smuzhiyun clocks = <&oscclk0>; 124*4882a593Smuzhiyun #clock-cells = <0>; 125*4882a593Smuzhiyun clock-div = <2>; 126*4882a593Smuzhiyun clock-mult = <1>; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun i2caud: clk-i2caud { 130*4882a593Smuzhiyun compatible = "fixed-factor-clock"; 131*4882a593Smuzhiyun clocks = <&oscclk0>; 132*4882a593Smuzhiyun #clock-cells = <0>; 133*4882a593Smuzhiyun clock-div = <2>; 134*4882a593Smuzhiyun clock-mult = <1>; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun soc { 138*4882a593Smuzhiyun compatible = "simple-bus"; 139*4882a593Smuzhiyun ranges; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun apb@40000000 { 142*4882a593Smuzhiyun compatible = "simple-bus"; 143*4882a593Smuzhiyun #address-cells = <1>; 144*4882a593Smuzhiyun #size-cells = <1>; 145*4882a593Smuzhiyun ranges = <0 0x40000000 0x10000>; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun timer0: mps2-timer0@0 { 148*4882a593Smuzhiyun compatible = "arm,mps2-timer"; 149*4882a593Smuzhiyun reg = <0x0 0x1000>; 150*4882a593Smuzhiyun interrupts = <8>; 151*4882a593Smuzhiyun clocks = <&sysclk>; 152*4882a593Smuzhiyun status = "disabled"; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun timer1: mps2-timer1@1000 { 156*4882a593Smuzhiyun compatible = "arm,mps2-timer"; 157*4882a593Smuzhiyun reg = <0x1000 0x1000>; 158*4882a593Smuzhiyun interrupts = <9>; 159*4882a593Smuzhiyun clocks = <&sysclk>; 160*4882a593Smuzhiyun status = "disabled"; 161*4882a593Smuzhiyun }; 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun timer2: dual-timer@2000 { 164*4882a593Smuzhiyun compatible = "arm,sp804", "arm,primecell"; 165*4882a593Smuzhiyun reg = <0x2000 0x1000>; 166*4882a593Smuzhiyun clocks = <&sysclk>, <&sysclk>, <&sysclk>; 167*4882a593Smuzhiyun clock-names = "timer0clk", "timer1clk", 168*4882a593Smuzhiyun "apb_pclk"; 169*4882a593Smuzhiyun interrupts = <10>; 170*4882a593Smuzhiyun status = "disabled"; 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun uart0: serial@4000 { 174*4882a593Smuzhiyun compatible = "arm,mps2-uart"; 175*4882a593Smuzhiyun reg = <0x4000 0x1000>; 176*4882a593Smuzhiyun interrupts = <0>, <1>, <12>; 177*4882a593Smuzhiyun clocks = <&sysclk>; 178*4882a593Smuzhiyun status = "disabled"; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun uart1: serial@5000 { 182*4882a593Smuzhiyun compatible = "arm,mps2-uart"; 183*4882a593Smuzhiyun reg = <0x5000 0x1000>; 184*4882a593Smuzhiyun interrupts = <2>, <3>, <12>; 185*4882a593Smuzhiyun clocks = <&sysclk>; 186*4882a593Smuzhiyun status = "disabled"; 187*4882a593Smuzhiyun }; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun uart2: serial@6000 { 190*4882a593Smuzhiyun compatible = "arm,mps2-uart"; 191*4882a593Smuzhiyun reg = <0x6000 0x1000>; 192*4882a593Smuzhiyun interrupts = <4>, <5>, <12>; 193*4882a593Smuzhiyun clocks = <&sysclk>; 194*4882a593Smuzhiyun status = "disabled"; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun wdt: watchdog@8000 { 198*4882a593Smuzhiyun compatible = "arm,sp805", "arm,primecell"; 199*4882a593Smuzhiyun arm,primecell-periphid = <0x00141805>; 200*4882a593Smuzhiyun reg = <0x8000 0x1000>; 201*4882a593Smuzhiyun interrupts = <0>; 202*4882a593Smuzhiyun clocks = <&sysclk>, <&sysclk>; 203*4882a593Smuzhiyun clock-names = "wdog_clk", "apb_pclk"; 204*4882a593Smuzhiyun status = "disabled"; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun fpga@40020000 { 210*4882a593Smuzhiyun compatible = "simple-bus"; 211*4882a593Smuzhiyun #address-cells = <1>; 212*4882a593Smuzhiyun #size-cells = <1>; 213*4882a593Smuzhiyun ranges = <0 0x40020000 0x10000>; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun fpgaio@8000 { 216*4882a593Smuzhiyun compatible = "syscon", "simple-mfd"; 217*4882a593Smuzhiyun reg = <0x8000 0x10>; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun led0 { 220*4882a593Smuzhiyun compatible = "register-bit-led"; 221*4882a593Smuzhiyun offset = <0x0>; 222*4882a593Smuzhiyun mask = <0x01>; 223*4882a593Smuzhiyun label = "userled:0"; 224*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 225*4882a593Smuzhiyun default-state = "on"; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun led1 { 229*4882a593Smuzhiyun compatible = "register-bit-led"; 230*4882a593Smuzhiyun offset = <0x0>; 231*4882a593Smuzhiyun mask = <0x02>; 232*4882a593Smuzhiyun label = "userled:1"; 233*4882a593Smuzhiyun linux,default-trigger = "usr"; 234*4882a593Smuzhiyun default-state = "off"; 235*4882a593Smuzhiyun }; 236*4882a593Smuzhiyun }; 237*4882a593Smuzhiyun }; 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun smb { 240*4882a593Smuzhiyun compatible = "simple-bus"; 241*4882a593Smuzhiyun #address-cells = <2>; 242*4882a593Smuzhiyun #size-cells = <1>; 243*4882a593Smuzhiyun ranges = <0 0 0x40200000 0x10000>, 244*4882a593Smuzhiyun <1 0 0xa0000000 0x10000>; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun}; 247