Home
last modified time | relevance | path

Searched refs:u32HVD_CMDQ_DRAM_ST_ADDR (Results 1 – 25 of 30) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/vpu_v3/
H A Dcontroller.h316 unsigned int u32HVD_CMDQ_DRAM_ST_ADDR; //0x0FB4 // for VDEC3 dram command queue usage member
H A DhalVPU_EX.c1642 pTemp2->u32HVD_CMDQ_DRAM_ST_ADDR = VNORMAL_COMMANDQ + u8Offset*0x100000; in HAL_VPU_EX_TaskCreate()
3953 if (CHECK_NULL_PTR((MS_VIRT)cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR)) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
3960 …mdQWdPtr = MsOS_PA2KSEG1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->… in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/vpu_v3/
H A Dcontroller.h346 unsigned int u32HVD_CMDQ_DRAM_ST_ADDR; //0x0FB4 // for VDEC3 dram command queue usage member
H A DhalVPU_EX.c1682 pTemp2->u32HVD_CMDQ_DRAM_ST_ADDR = VNORMAL_COMMANDQ_START + u8Offset*VPU_FW_MEM_OFFSET; in HAL_VPU_EX_TaskCreate()
4086 if (CHECK_NULL_PTR((MS_VIRT)cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR)) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4093 …mdQWdPtr = MsOS_PA2KSEG1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->… in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maldives/vpu_v3/
H A Dcontroller.h438 unsigned int u32HVD_CMDQ_DRAM_ST_ADDR; //0x0FB4 // for VDEC3 dram command queue usage member
H A DhalVPU_EX.c1601 pTemp2->u32HVD_CMDQ_DRAM_ST_ADDR = VNORMAL_COMMANDQ_START + phy_multidecode_offset; in HAL_VPU_EX_TaskCreate()
3812 if (CHECK_NULL_PTR(cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR)) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
3819 …mdQWdPtr = MsOS_PA2KSEG1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->… in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/vpu_v3/
H A Dcontroller.h442 unsigned int u32HVD_CMDQ_DRAM_ST_ADDR; //0x0FB4 // for VDEC3 dram command queue usage member
H A DhalVPU_EX.c1642 pTemp2->u32HVD_CMDQ_DRAM_ST_ADDR = VNORMAL_COMMANDQ_START + u8Offset*VPU_FW_MEM_OFFSET; in HAL_VPU_EX_TaskCreate()
3952 if (CHECK_NULL_PTR((MS_VIRT)cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR)) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
3959 …mdQWdPtr = MsOS_PA2KSEG1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->… in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/vpu_v3/
H A Dcontroller.h438 unsigned int u32HVD_CMDQ_DRAM_ST_ADDR; //0x0FB4 // for VDEC3 dram command queue usage member
H A DhalVPU_EX.c1626 pTemp2->u32HVD_CMDQ_DRAM_ST_ADDR = VNORMAL_COMMANDQ_START + u8Offset*VPU_FW_MEM_OFFSET; in HAL_VPU_EX_TaskCreate()
4014 if (CHECK_NULL_PTR((MS_VIRT)cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR)) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4021 …mdQWdPtr = MsOS_PA2KSEG1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->… in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/vpu_v3/
H A Dcontroller.h442 unsigned int u32HVD_CMDQ_DRAM_ST_ADDR; //0x0FB4 // for VDEC3 dram command queue usage member
H A DhalVPU_EX.c1716 pTemp2->u32HVD_CMDQ_DRAM_ST_ADDR = VNORMAL_COMMANDQ_START + u8Offset*VPU_FW_MEM_OFFSET; in HAL_VPU_EX_TaskCreate()
4398 if (CHECK_NULL_PTR((MS_VIRT)cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR)) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4405 …mdQWdPtr = MsOS_PA2KSEG1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->… in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/vpu_v3/
H A Dcontroller.h438 unsigned int u32HVD_CMDQ_DRAM_ST_ADDR; //0x0FB4 // for VDEC3 dram command queue usage member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/vpu_v3/
H A Dcontroller.h438 unsigned int u32HVD_CMDQ_DRAM_ST_ADDR; //0x0FB4 // for VDEC3 dram command queue usage member
H A DhalVPU_EX.c1685 pTemp2->u32HVD_CMDQ_DRAM_ST_ADDR = VNORMAL_COMMANDQ_START + u8Offset*VPU_FW_MEM_OFFSET; in HAL_VPU_EX_TaskCreate()
4134 if (CHECK_NULL_PTR((MS_VIRT)cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR)) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4141 …mdQWdPtr = MsOS_PA2KSEG1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->… in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/vpu_v3/
H A Dcontroller.h442 unsigned int u32HVD_CMDQ_DRAM_ST_ADDR; //0x0FB4 // for VDEC3 dram command queue usage member
H A DhalVPU_EX.c1734 pTemp2->u32HVD_CMDQ_DRAM_ST_ADDR = VNORMAL_COMMANDQ_START + u8Offset*VPU_FW_MEM_OFFSET; in HAL_VPU_EX_TaskCreate()
4416 if (CHECK_NULL_PTR((MS_VIRT)cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR)) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4423 …mdQWdPtr = MsOS_PA2KSEG1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->… in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mustang/vpu_v3/
H A Dcontroller.h450 unsigned int u32HVD_CMDQ_DRAM_ST_ADDR; //0x0FB4 // for VDEC3 dram command queue usage member
H A DhalVPU_EX.c1667 pTemp2->u32HVD_CMDQ_DRAM_ST_ADDR = VNORMAL_COMMANDQ_START + phy_multidecode_offset; in HAL_VPU_EX_TaskCreate()
4137 if (CHECK_NULL_PTR((MS_VIRT)cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR)) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4144 …mdQWdPtr = MsOS_PA2KSEG1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->… in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/vpu_v3/
H A Dcontroller.h450 unsigned int u32HVD_CMDQ_DRAM_ST_ADDR; //0x0FB4 // for VDEC3 dram command queue usage member
H A DhalVPU_EX.c1875 pTemp2->u32HVD_CMDQ_DRAM_ST_ADDR = VNORMAL_COMMANDQ_START + u8Offset*VPU_FW_MEM_OFFSET; in HAL_VPU_EX_TaskCreate()
4561 if (CHECK_NULL_PTR((MS_VIRT)cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR)) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4568 …mdQWdPtr = MsOS_PA2KSEG1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->… in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/vpu_v3/
H A Dcontroller.h450 unsigned int u32HVD_CMDQ_DRAM_ST_ADDR; //0x0FB4 // for VDEC3 dram command queue usage member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/vpu_v3/
H A Dcontroller.h450 unsigned int u32HVD_CMDQ_DRAM_ST_ADDR; //0x0FB4 // for VDEC3 dram command queue usage member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/vpu_v3/
H A Dcontroller.h450 unsigned int u32HVD_CMDQ_DRAM_ST_ADDR; //0x0FB4 // for VDEC3 dram command queue usage member
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/vpu_lite/
H A Dcontroller.h450 unsigned int u32HVD_CMDQ_DRAM_ST_ADDR; //0x0FB4 // for VDEC3 dram command queue usage member

12