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Searched refs:HVD_CMDQ_DRAM_ST_SIZE (Results 1 – 25 of 30) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/hvd_v3/
H A DfwHVD_if.h149 #define HVD_CMDQ_DRAM_ST_SIZE (0x100) //Command Queue must align (CMD + ARG) length, ex. … macro
154 #define HVD_CMDQ_DRAM_ST_SIZE (0x0) //Command Queue must align (CMD + ARG) length, ex. 8 … macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maldives/vpu_v3/
H A DhalVPU_EX.c3786 if(NewWD >= HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMCMDQueueIsFull()
3787 NewWD -= HVD_CMDQ_DRAM_ST_SIZE; in HAL_VPU_EX_DRAMCMDQueueIsFull()
3832 …32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE) >= HVD_CMDQ_DRAM_ST_SIZE ) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/vpu_v3/
H A DhalVPU_EX.c3926 if(NewWD >= HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMCMDQueueIsFull()
3927 NewWD -= HVD_CMDQ_DRAM_ST_SIZE; in HAL_VPU_EX_DRAMCMDQueueIsFull()
3975 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mustang/vpu_v3/
H A DhalVPU_EX.c4111 if(NewWD >= HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMCMDQueueIsFull()
4112 NewWD -= HVD_CMDQ_DRAM_ST_SIZE; in HAL_VPU_EX_DRAMCMDQueueIsFull()
4158 …32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE) >= HVD_CMDQ_DRAM_ST_SIZE ) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/vpu_v3/
H A DhalVPU_EX.c4108 if(NewWD >= HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMCMDQueueIsFull()
4109 NewWD -= HVD_CMDQ_DRAM_ST_SIZE; in HAL_VPU_EX_DRAMCMDQueueIsFull()
4157 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/vpu_v3/
H A DhalVPU_EX.c4060 if(NewWD >= HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMCMDQueueIsFull()
4061 NewWD -= HVD_CMDQ_DRAM_ST_SIZE; in HAL_VPU_EX_DRAMCMDQueueIsFull()
4109 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/vpu_v3/
H A DhalVPU_EX.c3927 if(NewWD >= HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMCMDQueueIsFull()
3928 NewWD -= HVD_CMDQ_DRAM_ST_SIZE; in HAL_VPU_EX_DRAMCMDQueueIsFull()
3976 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/vpu_v3/
H A DhalVPU_EX.c3988 if(NewWD >= HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMCMDQueueIsFull()
3989 NewWD -= HVD_CMDQ_DRAM_ST_SIZE; in HAL_VPU_EX_DRAMCMDQueueIsFull()
4037 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/vpu_v3/
H A DhalVPU_EX.c4372 if(NewWD >= HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMCMDQueueIsFull()
4373 NewWD -= HVD_CMDQ_DRAM_ST_SIZE; in HAL_VPU_EX_DRAMCMDQueueIsFull()
4421 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/vpu_v3/
H A DhalVPU_EX.c4390 if(NewWD >= HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMCMDQueueIsFull()
4391 NewWD -= HVD_CMDQ_DRAM_ST_SIZE; in HAL_VPU_EX_DRAMCMDQueueIsFull()
4439 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/vpu_v3/
H A DhalVPU_EX.c4535 if(NewWD >= HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMCMDQueueIsFull()
4536 NewWD -= HVD_CMDQ_DRAM_ST_SIZE; in HAL_VPU_EX_DRAMCMDQueueIsFull()
4584 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/vpu_v3/
H A DhalVPU_EX.c4538 if(NewWD >= HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMCMDQueueIsFull()
4539 NewWD -= HVD_CMDQ_DRAM_ST_SIZE; in HAL_VPU_EX_DRAMCMDQueueIsFull()
4587 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/vpu_v3/
H A DhalVPU_EX.c4545 if(NewWD >= HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMCMDQueueIsFull()
4546 NewWD -= HVD_CMDQ_DRAM_ST_SIZE; in HAL_VPU_EX_DRAMCMDQueueIsFull()
4594 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/vpu_v3/
H A DhalVPU_EX.c4531 if(NewWD >= HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMCMDQueueIsFull()
4532 NewWD -= HVD_CMDQ_DRAM_ST_SIZE; in HAL_VPU_EX_DRAMCMDQueueIsFull()
4580 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/vpu_v3/
H A DhalVPU_EX.c4558 if(NewWD >= HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMCMDQueueIsFull()
4559 NewWD -= HVD_CMDQ_DRAM_ST_SIZE; in HAL_VPU_EX_DRAMCMDQueueIsFull()
4607 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/vpu_lite/
H A DhalVPU_EX.c4406 if(NewWD >= HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMCMDQueueIsFull()
4407 NewWD -= HVD_CMDQ_DRAM_ST_SIZE; in HAL_VPU_EX_DRAMCMDQueueIsFull()
4457 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/hvd_v3/
H A DfwHVD_if.h147 #define HVD_CMDQ_DRAM_ST_SIZE (0x100) //Command Queue must align (CMD + ARG) length, ex. … macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/hvd_v3/
H A DfwHVD_if.h147 #define HVD_CMDQ_DRAM_ST_SIZE (0x100) //Command Queue must align (CMD + ARG) length, ex. … macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/hvd_v3/
H A DfwHVD_if.h147 #define HVD_CMDQ_DRAM_ST_SIZE (0x100) //Command Queue must align (CMD + ARG) length, ex. … macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/hvd_v3/
H A DfwHVD_if.h147 #define HVD_CMDQ_DRAM_ST_SIZE (0x100) //Command Queue must align (CMD + ARG) length, ex. … macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mustang/hvd_v3/
H A DfwHVD_if.h147 #define HVD_CMDQ_DRAM_ST_SIZE (0x100) //Command Queue must align (CMD + ARG) length, ex. … macro
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/hvd_lite/
H A DfwHVD_if.h147 #define HVD_CMDQ_DRAM_ST_SIZE (0x100) //Command Queue must align (CMD + ARG) length, ex. … macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/hvd_v3/
H A DfwHVD_if.h147 #define HVD_CMDQ_DRAM_ST_SIZE (0x100) //Command Queue must align (CMD + ARG) length, ex. … macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/hvd_v3/
H A DfwHVD_if.h147 #define HVD_CMDQ_DRAM_ST_SIZE (0x100) //Command Queue must align (CMD + ARG) length, ex. … macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maldives/hvd_v3/
H A DfwHVD_if.h147 #define HVD_CMDQ_DRAM_ST_SIZE (0x100) //Command Queue must align (CMD + ARG) length, ex. … macro

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