| /rk3399_rockchip-uboot/board/freescale/m54418twr/ |
| H A D | sbf_dram_init.S | 13 move.l #0xFC04002D, %a1
14 move.b #46, (%a1) /* DDR */
17 move.l #0xEC094060, %a1
18 move.b #0, (%a1)
21 move.l #0xEC09001A, %a1
22 move.w #0xE01D, (%a1)
25 move.l #0xFC0B8180, %a1
26 move.l #0x00000000, (%a1)
27 move.l #0x40000000, (%a1)
29 move.l #0xFC0B81AC, %a1
[all …]
|
| /rk3399_rockchip-uboot/board/sysam/stmark2/ |
| H A D | sbf_dram_init.S | 26 move.l #PPMCR0, %a1
27 move.b #46, (%a1)
30 move.l #MSCR_SDRAMC, %a1
31 move.b #1, (%a1)
49 move.l #MISCCR2, %a1
50 move.w #0xa01d, (%a1)
53 move.l #DDR_RCR, %a1
54 move.l #0x00000000, (%a1)
55 move.l #0x40000000, (%a1)
61 move.l #DDR_PADCR, %a1
[all …]
|
| /rk3399_rockchip-uboot/arch/m68k/cpu/mcf5445x/ |
| H A D | start.S | 22 move.w #0x2700,%sr; /* disable intrs */ \
125 move.w #0x2700,%sr /* Mask off Interrupt */
129 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
132 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
137 move.l #CONFIG_SYS_INIT_RAM_ADDR, %d0
140 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
144 move.l #0, %d0
145 move.l #(ICACHE_STATUS), %a1 /* icache */
146 move.l #(DCACHE_STATUS), %a2 /* dcache */
147 move.l %d0, (%a1)
[all …]
|
| /rk3399_rockchip-uboot/arch/m68k/cpu/mcf5227x/ |
| H A D | start.S | 17 move.w #0x2700,%sr; /* disable intrs */ \
109 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
112 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
116 move.l #0xFC008000, %a1
117 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
118 move.l #0xFC008008, %a1
119 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
120 move.l #0xFC008004, %a1
121 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
127 move.l #0xFC0A4074, %a1
[all …]
|
| /rk3399_rockchip-uboot/board/freescale/m54455evb/ |
| H A D | sbf_dram_init.S | 17 move.l #0xFC0A4074, %a1
18 move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
22 move.l #0xFC0B8110, %a1
23 move.l #0xFC0B8114, %a2
26 move.l #0x13, %d1
27 move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
41 move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
44 move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
50 move.l #0xFC0B8008, %a1
51 move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
[all …]
|
| /rk3399_rockchip-uboot/board/freescale/m54451evb/ |
| H A D | sbf_dram_init.S | 17 move.l #0xFC0A4074, %a1
18 move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
22 move.l #0xFC0B8110, %a1
23 move.l #0xFC0B8114, %a2
26 move.l #0x13, %d1
27 move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
41 move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
44 move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
50 move.l #0xFC0B8008, %a1
51 move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
[all …]
|
| /rk3399_rockchip-uboot/arch/m68k/cpu/mcf52x2/ |
| H A D | start.S | 18 move.w #0x2700,%sr; /* disable intrs */ \
101 move.w #0x2700,%sr
105 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
111 move.l #(CONFIG_SYS_MBAR + 1), %d0
112 move.c %d0, %MBAR
117 move.l #(CONFIG_SYS_MBAR2 + 1), %d0
121 move.l #(CONFIG_SYS_INIT_RAM_ADDR + 1), %d0
127 move.l #(CONFIG_SYS_MBAR + 1), %d0
128 move.l %d0, 0x40000000
131 move.l #(CONFIG_SYS_INIT_RAM_ADDR + 0x21), %d0
[all …]
|
| /rk3399_rockchip-uboot/arch/m68k/cpu/mcf523x/ |
| H A D | start.S | 17 move.w #0x2700,%sr; /* disable intrs */ \
93 move.w #0x2700,%sr /* Mask off Interrupt */
96 move.l #CONFIG_SYS_FLASH_BASE, %d0
99 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
103 move.l #CF_CACR_CINV, %d0 /* Invalidate cache cmd */
106 move.l #0, %d0
111 move.l #0, %d0
112 move.l #(ICACHE_STATUS), %a1 /* icache */
113 move.l #(DCACHE_STATUS), %a2 /* icache */
114 move.l %d0, (%a1)
[all …]
|
| /rk3399_rockchip-uboot/arch/m68k/cpu/mcf532x/ |
| H A D | start.S | 20 move.w #0x2700,%sr; /* disable intrs */ \
99 move.w #0x2700,%sr /* Mask off Interrupt */
103 move.l #CONFIG_SYS_FLASH_BASE, %d0
107 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
111 move.l #CF_CACR_CINVA, %d0 /* Invalidate cache cmd */
113 move.l #0, %d0
118 move.l #(0xFC0a0010), %a0
119 move.w (%a0), %d0
122 move.w %d0, (%a0)
126 move.l #0, %d0
[all …]
|
| /rk3399_rockchip-uboot/arch/m68k/cpu/mcf547x_8x/ |
| H A D | start.S | 17 move.w #0x2700,%sr; /* disable intrs */ \
93 move.w #0x2700,%sr /* Mask off Interrupt */
96 move.l #CONFIG_SYS_FLASH_BASE, %d0
99 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
102 move.l #(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0
105 move.l #CONFIG_SYS_MBAR, %d0 /* set MBAR address */
106 move.c %d0, %MBAR
109 move.l #0x01040100, %d0 /* Invalidate cache cmd */
111 move.l #0, %d0
118 move.l #0, %d0
[all …]
|
| /rk3399_rockchip-uboot/arch/m68k/cpu/mcf530x/ |
| H A D | start.S | 18 move.w #0x2700,%sr; /* disable intrs */
94 move.w #0x2700,%sr
97 move.l #(CONFIG_SYS_MBAR + 1), %d0
98 move.c %d0, %MBAR
100 move.l #(CONFIG_SYS_INIT_RAM_ADDR + 1), %d0
101 move.c %d0, %RAMBAR
104 move.l #CF_CACR_CINVA, %d0
106 move.l #0, %d0
115 move.l #CONFIG_SYS_FLASH_BASE, %d0
120 move.l #0, %d0
[all …]
|
| /rk3399_rockchip-uboot/arch/nds32/cpu/n1213/ |
| H A D | start.S | 191 move $r0, $sp
193 move $sp, $r0
221 move $r4, $r0 /* save addr_sp */
222 move $r5, $r1 /* save addr of gd */
223 move $r6, $r2 /* save addr of destination */
227 move $sp, $r4
233 move $r2, $r6 /* r2 <- scratch for copy_loop */
280 move $lp, $r0 /* offset of board_init_r() */
283 move $r0, $r5 /* gd_t */
284 move $r1, $r6 /* dest_addr */
[all …]
|
| /rk3399_rockchip-uboot/arch/nds32/cpu/n1213/ae3xx/ |
| H A D | lowlevel_init.S | 85 move $r11, $lp
95 move $lp, $r11
101 move $r10, $lp
110 move $r11, $lp
123 move $lp, $r11
|
| /rk3399_rockchip-uboot/arch/mips/cpu/ |
| H A D | start.S | 48 move k0, t9 # preserve t9 in k0
49 move k1, a0 # preserve a0 in k1
62 move k0, sp # save gd pointer
69 move fp, sp
72 move t0, k0
275 move a0, zero # a0 <-- boot_flags = 0
279 move ra, zero
|
| /rk3399_rockchip-uboot/arch/nds32/cpu/n1213/ag101/ |
| H A D | lowlevel_init.S | 91 move $r11, $lp
164 move $lp, $r11
172 move $r10, $lp
183 move $r11, $lp
187 move $r0, $lp
261 move $lp, $r11
288 move $lp, $r11
|
| /rk3399_rockchip-uboot/board/imgtec/boston/ |
| H A D | lowlevel_init.S | 24 move s0, ra
37 move v0, zero
|
| /rk3399_rockchip-uboot/arch/mips/lib/ |
| H A D | cache_init.S | 60 move \sz, zero
115 move R_RETURN, ra
122 move R_L2_SIZE, zero
123 move R_L2_LINE, zero
124 move R_L2_BYPASSED, zero
125 move R_L2_L2C, zero
252 move v0, R_IC_SIZE
438 move v0, zero
|
| H A D | genex.S | 70 move sp, k1
191 move a0, sp
212 move a0, sp
|
| /rk3399_rockchip-uboot/arch/mips/include/asm/ |
| H A D | asm.h | 187 move rd, rs; \
194 move rd, rs; \
203 move rd, rs; \
210 move rd, rs; \
|
| /rk3399_rockchip-uboot/board/dbau1x00/ |
| H A D | lowlevel_init.S | 139 move t3, ra
152 move ra, t3
212 move t2, ra /* Store return address */
217 move t1, ra
218 move ra, t2 /* Move return addess back */
|
| /rk3399_rockchip-uboot/board/sbc8641d/ |
| H A D | README | 42 c) while on, using static precautions, move JP10 back to the failed image.
|
| /rk3399_rockchip-uboot/doc/ |
| H A D | README.marubun-pcmcia | 62 * Maybe, NE2000 compatible NIC is sure to move.
|
| /rk3399_rockchip-uboot/arch/arm/cpu/armv7/ |
| H A D | cache_v7_asm.S | 30 mov r3, r0, lsr #23 @ move LoC into position
104 mov r3, r0, lsr #23 @ move LoC into position
|
| /rk3399_rockchip-uboot/doc/driver-model/ |
| H A D | serial-howto.txt | 35 This may be a good time to move your board to use device tree also. Mostly
|
| H A D | i2c-howto.txt | 47 This may be a good time to move your board to use device tree also. Mostly
|