xref: /rk3399_rockchip-uboot/board/freescale/m54418twr/sbf_dram_init.S (revision a6dd10c70be9be863488d9d7afede057a4d99823)
1*c74dda8bSAngelo Dureghello/*
2*c74dda8bSAngelo Dureghello * Board-specific sbf ddr/sdram init.
3*c74dda8bSAngelo Dureghello *
4*c74dda8bSAngelo Dureghello * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
5*c74dda8bSAngelo Dureghello *
6*c74dda8bSAngelo Dureghello * SPDX-License-Identifier:	GPL-2.0+
7*c74dda8bSAngelo Dureghello */
8*c74dda8bSAngelo Dureghello
9*c74dda8bSAngelo Dureghello.global sbf_dram_init
10*c74dda8bSAngelo Dureghello.text
11*c74dda8bSAngelo Dureghello
12*c74dda8bSAngelo Dureghellosbf_dram_init:
13*c74dda8bSAngelo Dureghello	move.l	#0xFC04002D, %a1
14*c74dda8bSAngelo Dureghello	move.b	#46, (%a1)		/* DDR */
15*c74dda8bSAngelo Dureghello
16*c74dda8bSAngelo Dureghello	/* slew settings */
17*c74dda8bSAngelo Dureghello	move.l	#0xEC094060, %a1
18*c74dda8bSAngelo Dureghello	move.b	#0, (%a1)
19*c74dda8bSAngelo Dureghello
20*c74dda8bSAngelo Dureghello	/* use vco instead of cpu*2 clock for ddr clock */
21*c74dda8bSAngelo Dureghello	move.l	#0xEC09001A, %a1
22*c74dda8bSAngelo Dureghello	move.w	#0xE01D, (%a1)
23*c74dda8bSAngelo Dureghello
24*c74dda8bSAngelo Dureghello	/* DDR settings */
25*c74dda8bSAngelo Dureghello	move.l	#0xFC0B8180, %a1
26*c74dda8bSAngelo Dureghello	move.l	#0x00000000, (%a1)
27*c74dda8bSAngelo Dureghello	move.l	#0x40000000, (%a1)
28*c74dda8bSAngelo Dureghello
29*c74dda8bSAngelo Dureghello	move.l	#0xFC0B81AC, %a1
30*c74dda8bSAngelo Dureghello	move.l	#0x01030203, (%a1)
31*c74dda8bSAngelo Dureghello
32*c74dda8bSAngelo Dureghello	move.l	#0xFC0B8000, %a1
33*c74dda8bSAngelo Dureghello	move.l	#0x01010101, (%a1)+	/* 0x00 */
34*c74dda8bSAngelo Dureghello	move.l	#0x00000101, (%a1)+	/* 0x04 */
35*c74dda8bSAngelo Dureghello	move.l	#0x01010100, (%a1)+	/* 0x08 */
36*c74dda8bSAngelo Dureghello	move.l	#0x01010000, (%a1)+	/* 0x0C */
37*c74dda8bSAngelo Dureghello	move.l	#0x00010101, (%a1)+	/* 0x10 */
38*c74dda8bSAngelo Dureghello	move.l	#0xFC0B8018, %a1
39*c74dda8bSAngelo Dureghello	move.l	#0x00010100, (%a1)+	/* 0x18 */
40*c74dda8bSAngelo Dureghello	move.l	#0x00000001, (%a1)+	/* 0x1C */
41*c74dda8bSAngelo Dureghello	move.l	#0x01000001, (%a1)+	/* 0x20 */
42*c74dda8bSAngelo Dureghello	move.l	#0x00000100, (%a1)+	/* 0x24 */
43*c74dda8bSAngelo Dureghello	move.l	#0x00010001, (%a1)+	/* 0x28 */
44*c74dda8bSAngelo Dureghello	move.l	#0x00000200, (%a1)+	/* 0x2C */
45*c74dda8bSAngelo Dureghello	move.l	#0x01000002, (%a1)+	/* 0x30 */
46*c74dda8bSAngelo Dureghello	move.l	#0x00000000, (%a1)+	/* 0x34 */
47*c74dda8bSAngelo Dureghello	move.l	#0x00000100, (%a1)+	/* 0x38 */
48*c74dda8bSAngelo Dureghello	move.l	#0x02000100, (%a1)+	/* 0x3C */
49*c74dda8bSAngelo Dureghello	move.l	#0x02000407, (%a1)+	/* 0x40 */
50*c74dda8bSAngelo Dureghello	move.l	#0x02030007, (%a1)+	/* 0x44 */
51*c74dda8bSAngelo Dureghello	move.l	#0x02000100, (%a1)+	/* 0x48 */
52*c74dda8bSAngelo Dureghello	move.l	#0x0A030203, (%a1)+	/* 0x4C */
53*c74dda8bSAngelo Dureghello	move.l	#0x00020708, (%a1)+	/* 0x50 */
54*c74dda8bSAngelo Dureghello	move.l	#0x00050008, (%a1)+	/* 0x54 */
55*c74dda8bSAngelo Dureghello	move.l	#0x04030002, (%a1)+	/* 0x58 */
56*c74dda8bSAngelo Dureghello	move.l	#0x00000004, (%a1)+	/* 0x5C */
57*c74dda8bSAngelo Dureghello	move.l	#0x020A0000, (%a1)+	/* 0x60 */
58*c74dda8bSAngelo Dureghello	move.l	#0x0C00000E, (%a1)+	/* 0x64 */
59*c74dda8bSAngelo Dureghello	move.l	#0x00002004, (%a1)+	/* 0x68 */
60*c74dda8bSAngelo Dureghello	move.l	#0x00000000, (%a1)+	/* 0x6C */
61*c74dda8bSAngelo Dureghello	move.l	#0x00100010, (%a1)+	/* 0x70 */
62*c74dda8bSAngelo Dureghello	move.l	#0x00100010, (%a1)+	/* 0x74 */
63*c74dda8bSAngelo Dureghello	move.l	#0x00000000, (%a1)+	/* 0x78 */
64*c74dda8bSAngelo Dureghello	move.l	#0x07990000, (%a1)+	/* 0x7C */
65*c74dda8bSAngelo Dureghello	move.l	#0xFC0B80A0, %a1
66*c74dda8bSAngelo Dureghello	move.l	#0x00000000, (%a1)+	/* 0xA0 */
67*c74dda8bSAngelo Dureghello	move.l	#0x00C80064, (%a1)+	/* 0xA4 */
68*c74dda8bSAngelo Dureghello	move.l	#0x44520002, (%a1)+	/* 0xA8 */
69*c74dda8bSAngelo Dureghello	move.l	#0x00C80023, (%a1)+	/* 0xAC */
70*c74dda8bSAngelo Dureghello	move.l	#0xFC0B80B4, %a1
71*c74dda8bSAngelo Dureghello	move.l	#0x0000C350, (%a1)	/* 0xB4 */
72*c74dda8bSAngelo Dureghello	move.l	#0xFC0B80E0, %a1
73*c74dda8bSAngelo Dureghello	move.l	#0x04000000, (%a1)+	/* 0xE0 */
74*c74dda8bSAngelo Dureghello	move.l	#0x03000304, (%a1)+	/* 0xE4 */
75*c74dda8bSAngelo Dureghello	move.l	#0x40040000, (%a1)+	/* 0xE8 */
76*c74dda8bSAngelo Dureghello	move.l	#0xC0004004, (%a1)+	/* 0xEC */
77*c74dda8bSAngelo Dureghello	move.l	#0x0642C000, (%a1)+	/* 0xF0 */
78*c74dda8bSAngelo Dureghello	move.l	#0x00000642, (%a1)+	/* 0xF4 */
79*c74dda8bSAngelo Dureghello	move.l	#0xFC0B8024, %a1
80*c74dda8bSAngelo Dureghello	tpf
81*c74dda8bSAngelo Dureghello	move.l	#0x01000100, (%a1)	/* 0x24 */
82*c74dda8bSAngelo Dureghello
83*c74dda8bSAngelo Dureghello	move.l	#0x2000, %d1
84*c74dda8bSAngelo Dureghello	bsr	asm_delay
85*c74dda8bSAngelo Dureghello
86*c74dda8bSAngelo Dureghello	rts
87