1*c74dda8bSAngelo Dureghello/* 2*c74dda8bSAngelo Dureghello * Board-specific sbf ddr/sdram init. 3*c74dda8bSAngelo Dureghello * 4*c74dda8bSAngelo Dureghello * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it> 5*c74dda8bSAngelo Dureghello * 6*c74dda8bSAngelo Dureghello * SPDX-License-Identifier: GPL-2.0+ 7*c74dda8bSAngelo Dureghello */ 8*c74dda8bSAngelo Dureghello 9*c74dda8bSAngelo Dureghello #include <config.h> 10*c74dda8bSAngelo Dureghello 11*c74dda8bSAngelo Dureghello.global sbf_dram_init 12*c74dda8bSAngelo Dureghello.text 13*c74dda8bSAngelo Dureghello 14*c74dda8bSAngelo Dureghellosbf_dram_init: 15*c74dda8bSAngelo Dureghello /* Dram Initialization a1, a2, and d0 */ 16*c74dda8bSAngelo Dureghello /* mscr sdram */ 17*c74dda8bSAngelo Dureghello move.l #0xFC0A4074, %a1 18*c74dda8bSAngelo Dureghello move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1) 19*c74dda8bSAngelo Dureghello nop 20*c74dda8bSAngelo Dureghello 21*c74dda8bSAngelo Dureghello /* SDRAM Chip 0 and 1 */ 22*c74dda8bSAngelo Dureghello move.l #0xFC0B8110, %a1 23*c74dda8bSAngelo Dureghello move.l #0xFC0B8114, %a2 24*c74dda8bSAngelo Dureghello 25*c74dda8bSAngelo Dureghello /* calculate the size */ 26*c74dda8bSAngelo Dureghello move.l #0x13, %d1 27*c74dda8bSAngelo Dureghello move.l #(CONFIG_SYS_SDRAM_SIZE), %d2 28*c74dda8bSAngelo Dureghello#ifdef CONFIG_SYS_SDRAM_BASE1 29*c74dda8bSAngelo Dureghello lsr.l #1, %d2 30*c74dda8bSAngelo Dureghello#endif 31*c74dda8bSAngelo Dureghello 32*c74dda8bSAngelo Dureghellodramsz_loop: 33*c74dda8bSAngelo Dureghello lsr.l #1, %d2 34*c74dda8bSAngelo Dureghello add.l #1, %d1 35*c74dda8bSAngelo Dureghello cmp.l #1, %d2 36*c74dda8bSAngelo Dureghello bne dramsz_loop 37*c74dda8bSAngelo Dureghello#ifdef CONFIG_SYS_NAND_BOOT 38*c74dda8bSAngelo Dureghello beq asm_nand_chk_status 39*c74dda8bSAngelo Dureghello#endif 40*c74dda8bSAngelo Dureghello /* SDRAM Chip 0 and 1 */ 41*c74dda8bSAngelo Dureghello move.l #(CONFIG_SYS_SDRAM_BASE), (%a1) 42*c74dda8bSAngelo Dureghello or.l %d1, (%a1) 43*c74dda8bSAngelo Dureghello#ifdef CONFIG_SYS_SDRAM_BASE1 44*c74dda8bSAngelo Dureghello move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2) 45*c74dda8bSAngelo Dureghello or.l %d1, (%a2) 46*c74dda8bSAngelo Dureghello#endif 47*c74dda8bSAngelo Dureghello nop 48*c74dda8bSAngelo Dureghello 49*c74dda8bSAngelo Dureghello /* dram cfg1 and cfg2 */ 50*c74dda8bSAngelo Dureghello move.l #0xFC0B8008, %a1 51*c74dda8bSAngelo Dureghello move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1) 52*c74dda8bSAngelo Dureghello nop 53*c74dda8bSAngelo Dureghello move.l #0xFC0B800C, %a2 54*c74dda8bSAngelo Dureghello move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2) 55*c74dda8bSAngelo Dureghello nop 56*c74dda8bSAngelo Dureghello 57*c74dda8bSAngelo Dureghello move.l #0xFC0B8000, %a1 /* Mode */ 58*c74dda8bSAngelo Dureghello move.l #0xFC0B8004, %a2 /* Ctrl */ 59*c74dda8bSAngelo Dureghello 60*c74dda8bSAngelo Dureghello /* Issue PALL */ 61*c74dda8bSAngelo Dureghello move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2) 62*c74dda8bSAngelo Dureghello nop 63*c74dda8bSAngelo Dureghello 64*c74dda8bSAngelo Dureghello /* Issue LEMR */ 65*c74dda8bSAngelo Dureghello move.l #(CONFIG_SYS_SDRAM_EMOD + 0x408), (%a1) 66*c74dda8bSAngelo Dureghello nop 67*c74dda8bSAngelo Dureghello move.l #(CONFIG_SYS_SDRAM_MODE + 0x300), (%a1) 68*c74dda8bSAngelo Dureghello nop 69*c74dda8bSAngelo Dureghello 70*c74dda8bSAngelo Dureghello move.l #1000, %d1 71*c74dda8bSAngelo Dureghello bsr asm_delay 72*c74dda8bSAngelo Dureghello 73*c74dda8bSAngelo Dureghello /* Issue PALL */ 74*c74dda8bSAngelo Dureghello move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2) 75*c74dda8bSAngelo Dureghello nop 76*c74dda8bSAngelo Dureghello 77*c74dda8bSAngelo Dureghello /* Perform two refresh cycles */ 78*c74dda8bSAngelo Dureghello move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0 79*c74dda8bSAngelo Dureghello nop 80*c74dda8bSAngelo Dureghello move.l %d0, (%a2) 81*c74dda8bSAngelo Dureghello move.l %d0, (%a2) 82*c74dda8bSAngelo Dureghello nop 83*c74dda8bSAngelo Dureghello 84*c74dda8bSAngelo Dureghello move.l #(CONFIG_SYS_SDRAM_MODE + 0x200), (%a1) 85*c74dda8bSAngelo Dureghello nop 86*c74dda8bSAngelo Dureghello 87*c74dda8bSAngelo Dureghello move.l #500, %d1 88*c74dda8bSAngelo Dureghello bsr asm_delay 89*c74dda8bSAngelo Dureghello 90*c74dda8bSAngelo Dureghello move.l #(CONFIG_SYS_SDRAM_CTRL), %d1 91*c74dda8bSAngelo Dureghello and.l #0x7FFFFFFF, %d1 92*c74dda8bSAngelo Dureghello 93*c74dda8bSAngelo Dureghello or.l #0x10000C00, %d1 94*c74dda8bSAngelo Dureghello 95*c74dda8bSAngelo Dureghello move.l %d1, (%a2) 96*c74dda8bSAngelo Dureghello nop 97*c74dda8bSAngelo Dureghello 98*c74dda8bSAngelo Dureghello move.l #2000, %d1 99*c74dda8bSAngelo Dureghello bsr asm_delay 100*c74dda8bSAngelo Dureghello 101*c74dda8bSAngelo Dureghello rts 102