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/rk3399_ARM-atf/include/plat/marvell/armada/common/aarch64/
H A Dmarvell_macros.S50 mrs x7, id_aa64pfr0_el1
51 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
52 cmp x7, #1
84 add x7, x16, #GICD_ISPENDR
88 sub x4, x7, x16
96 ldr x4, [x7], #8
121 mov_imm x7, (PLAT_MARVELL_CCI_BASE + SLAVE_IFACE_OFFSET( \
123 ldr w8, [x7, #SNOOP_CTRL_REG]
125 mov_imm x7, (PLAT_MARVELL_CCI_BASE + SLAVE_IFACE_OFFSET( \
127 ldr w9, [x7, #SNOOP_CTRL_REG]
H A Dcci_macros.S28 mov_imm x7, (PLAT_MARVELL_CCI_BASE + SLAVE_IFACE_OFFSET( \
30 ldr w8, [x7, #SNOOP_CTRL_REG]
32 mov_imm x7, (PLAT_MARVELL_CCI_BASE + SLAVE_IFACE_OFFSET( \
34 ldr w9, [x7, #SNOOP_CTRL_REG]
/rk3399_ARM-atf/plat/rockchip/common/include/
H A Dplat_macros.S51 mrs x7, id_aa64pfr0_el1
52 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
53 cmp x7, #1
83 add x7, x26, #GICD_ISPENDR
87 sub x4, x7, x26
95 ldr x4, [x7], #8
106 mov_imm x7, (PLAT_RK_CCI_BASE + SLAVE_IFACE_OFFSET( \
108 ldr w8, [x7, #SNOOP_CTRL_REG]
110 mov_imm x7, (PLAT_RK_CCI_BASE + SLAVE_IFACE_OFFSET( \
112 ldr w9, [x7, #SNOOP_CTRL_REG]
/rk3399_ARM-atf/include/plat/arm/common/aarch64/
H A Darm_macros.S49 mrs x7, id_aa64pfr0_el1
50 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
51 cmp x7, #0
81 add x7, x16, #GICD_ISPENDR
85 sub x4, x7, x16
94 sub x4, x7, x16
101 ldr x4, [x7], #8
H A Dcci_macros.S26 mov_imm x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET( \
28 ldr w8, [x7, #SNOOP_CTRL_REG]
30 mov_imm x7, (PLAT_ARM_CCI_BASE + SLAVE_IFACE_OFFSET( \
32 ldr w9, [x7, #SNOOP_CTRL_REG]
/rk3399_ARM-atf/plat/hisilicon/hikey960/include/
H A Dplat_macros.S49 add x7, x16, #GICD_ISPENDR
53 sub x4, x7, x16
59 ldr x4, [x7], #8
67 mov_imm x7, (CCI400_REG_BASE + SLAVE_IFACE_OFFSET( \
69 ldr w8, [x7, #SNOOP_CTRL_REG]
71 mov_imm x7, (CCI400_REG_BASE + SLAVE_IFACE_OFFSET( \
73 ldr w9, [x7, #SNOOP_CTRL_REG]
/rk3399_ARM-atf/plat/hisilicon/hikey/include/
H A Dplat_macros.S49 add x7, x16, #GICD_ISPENDR
53 sub x4, x7, x16
59 ldr x4, [x7], #8
67 mov_imm x7, (CCI400_BASE + SLAVE_IFACE_OFFSET( \
69 ldr w8, [x7, #SNOOP_CTRL_REG]
71 mov_imm x7, (CCI400_BASE + SLAVE_IFACE_OFFSET( \
73 ldr w9, [x7, #SNOOP_CTRL_REG]
/rk3399_ARM-atf/plat/mediatek/mt8183/include/
H A Dplat_macros.S47 add x7, x26, #GICD_ISPENDR
51 sub x4, x7, x26
59 ldr x4, [x7], #8
69 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
71 ldr w8, [x7, #SNOOP_CTRL_REG]
73 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
75 ldr w9, [x7, #SNOOP_CTRL_REG]
/rk3399_ARM-atf/plat/mediatek/mt8173/include/
H A Dplat_macros.S47 add x7, x16, #GICD_ISPENDR
51 sub x4, x7, x16
59 ldr x4, [x7], #8
69 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
71 ldr w8, [x7, #SNOOP_CTRL_REG]
73 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
75 ldr w9, [x7, #SNOOP_CTRL_REG]
/rk3399_ARM-atf/plat/xilinx/versal_net/include/
H A Dplat_macros.S45 mrs x7, id_aa64pfr0_el1
46 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
47 cmp x7, #1
77 add x7, x16, #GICD_ISPENDR
81 sub x4, x7, x16
89 ldr x4, [x7], #8
/rk3399_ARM-atf/plat/amd/versal2/include/
H A Dplat_macros.S45 mrs x7, id_aa64pfr0_el1
46 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
47 cmp x7, #1
77 add x7, x16, #GICD_ISPENDR
81 sub x4, x7, x16
89 ldr x4, [x7], #8
/rk3399_ARM-atf/plat/qti/common/inc/aarch64/
H A Dplat_macros.S52 mrs x7, id_aa64pfr0_el1
53 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
54 cmp x7, #1
84 add x7, x26, #GICD_ISPENDR
88 sub x4, x7, x26
96 ldr x4, [x7], #8
/rk3399_ARM-atf/plat/xilinx/versal/include/
H A Dplat_macros.S44 mrs x7, id_aa64pfr0_el1
45 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
46 cmp x7, #1
76 add x7, x16, #GICD_ISPENDR
80 sub x4, x7, x16
88 ldr x4, [x7], #8
/rk3399_ARM-atf/plat/nxp/soc-ls1043a/aarch64/
H A Dls1043a.S294 mov x7, x0
299 and x6, x6, x7
335 and x6, x6, x7
420 ldr x7, =IPSTPACK_RETRY_CNT
426 sub x7, x7, #1
427 cbnz x7, 3b
432 ldr x7, =IPSTPACK_RETRY_CNT
440 sub x7, x7, #1
441 cbnz x7, 4b
447 ldr x7, =IPSTPACK_RETRY_CNT
[all …]
/rk3399_ARM-atf/plat/renesas/common/include/
H A Dplat_macros_cci.S26 mov_imm x7, (CCI500_BASE + SLAVE_IFACE3_OFFSET)
27 ldr w8, [x7, #SNOOP_CTRL_REG]
29 mov_imm x7, (CCI500_BASE + SLAVE_IFACE4_OFFSET)
30 ldr w9, [x7, #SNOOP_CTRL_REG]
H A Dplat_macros_gic.S44 add x7, x16, #GICD_ISPENDR
48 sub x4, x7, x16
54 ldr x4, [x7], #8
/rk3399_ARM-atf/lib/libc/aarch64/
H A Dsetjmp.S18 mov x7, sp
26 stp x7, xzr, [x0, #JMP_CTX_SP]
37 ldp x7, xzr, [x0, #JMP_CTX_SP]
45 cmp x7, x19
56 mov sp, x7
/rk3399_ARM-atf/plat/nxp/soc-ls1088a/aarch64/
H A Dls1088a.S113 stp x6, x7, [sp, #-16]!
135 ldp x6, x7, [sp], #16
336 mov x7, x0
352 mov x0, x7
357 mov x0, x7
909 stp x6, x7, [sp, #-16]!
945 stp x6, x7, [sp, #-16]!
1016 and x6, x6, x7
1082 ldr x7, =IPSTPACK_RETRY_CNT
1087 sub x7, x7, #1
[all …]
/rk3399_ARM-atf/plat/nxp/common/ocram/aarch64/
H A Docram.S29 stp x6, x7, [sp, #-16]!
42 ldp x6, x7, [x0, #16]
46 stp x6, x7, [x0, #16]
68 ldp x6, x7, [sp], #16
/rk3399_ARM-atf/plat/amlogic/common/include/
H A Dplat_macros.S48 add x7, x16, #GICD_ISPENDR
53 sub x4, x7, x16
61 ldr x4, [x7], #8
/rk3399_ARM-atf/plat/nvidia/tegra/include/
H A Dplat_macros.S45 add x7, x16, #GICD_ISPENDR
49 sub x4, x7, x16
55 ldr w4, [x7], #4
/rk3399_ARM-atf/plat/qti/common/src/
H A Dqti_syscall.c186 u_register_t *x7) in get_indirect_args() argument
210 *x7 = args[2]; in get_indirect_args()
216 *x7 = args[2]; in get_indirect_args()
230 u_register_t x5, u_register_t x6, u_register_t x7) in get_mem_params() argument
250 add_overflow(x6, x7, &e6) != 0) { in get_mem_params()
274 (x7 % sizeof(qti_accesscontrol_perm_t)) != 0U) { in get_mem_params()
295 params->dst_cnt = x7 / sizeof(params->dst[0]); in get_mem_params()
329 u_register_t x5, x6, x7; in qti_sip_mem_assign() local
346 ret = get_indirect_args(smc_cc, &x5, &x6, &x7); in qti_sip_mem_assign()
350 ret = get_mem_params(&params, x2, x3, x4, x5, x6, x7); in qti_sip_mem_assign()
/rk3399_ARM-atf/plat/intel/soc/agilex5/soc/
H A Dagilex5_cache.S50 lsl x7, x6, x5
51 orr x9, x12, x7 /* map way and level to cisw value */
52 lsl x7, x4, x2
53 orr x9, x9, x7 /* map set number to cisw value */
/rk3399_ARM-atf/plat/nxp/common/psci/aarch64/
H A Dpsci_utils.S39 stp x6, x7, [sp, #-16]!
124 ldr x7, =SOC_CORE_RELEASE
125 cbnz x7, 3f
148 ldr x7, =SOC_CORE_RESTART
149 cbnz x7, 2f
194 ldp x6, x7, [sp], #16
221 stp x6, x7, [sp, #-16]!
275 ldp x6, x7, [sp], #16
320 stp x6, x7, [sp, #-16]!
360 ldp x6, x7, [sp], #16
[all …]
/rk3399_ARM-atf/plat/imx/common/
H A Dlpuart_console.S20 mov x7, x30
29 mov x30, x7
33 ret x7

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