1*06f8eb57SMarek Vasut/* 2*06f8eb57SMarek Vasut * Copyright (c) 2015-2025, Renesas Electronics Corporation. All rights reserved. 3*06f8eb57SMarek Vasut * 4*06f8eb57SMarek Vasut * SPDX-License-Identifier: BSD-3-Clause 5*06f8eb57SMarek Vasut */ 6*06f8eb57SMarek Vasut 7*06f8eb57SMarek Vasut#include <drivers/arm/cci.h> 8*06f8eb57SMarek Vasut#include <drivers/arm/gic_common.h> 9*06f8eb57SMarek Vasut#include <drivers/arm/gicv2.h> 10*06f8eb57SMarek Vasut 11*06f8eb57SMarek Vasut#include "rcar_def.h" 12*06f8eb57SMarek Vasut 13*06f8eb57SMarek Vasut.section .rodata.gic_reg_name, "aS" 14*06f8eb57SMarek Vasutgicc_regs: 15*06f8eb57SMarek Vasut .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", "" 16*06f8eb57SMarek Vasutgicd_pend_reg: 17*06f8eb57SMarek Vasut .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n Offset:\t\t\tvalue\n" 18*06f8eb57SMarek Vasutnewline: 19*06f8eb57SMarek Vasut .asciz "\n" 20*06f8eb57SMarek Vasutspacer: 21*06f8eb57SMarek Vasut .asciz ":\t\t0x" 22*06f8eb57SMarek Vasut 23*06f8eb57SMarek Vasut /* --------------------------------------------- 24*06f8eb57SMarek Vasut * The below macro prints out relevant GIC 25*06f8eb57SMarek Vasut * registers whenever an unhandled exception is 26*06f8eb57SMarek Vasut * taken in BL3-1. 27*06f8eb57SMarek Vasut * Clobbers: x0 - x10, x16, x17, sp 28*06f8eb57SMarek Vasut * --------------------------------------------- 29*06f8eb57SMarek Vasut */ 30*06f8eb57SMarek Vasut .macro plat_print_gic_regs 31*06f8eb57SMarek Vasut mov_imm x17, RCAR_GICC_BASE 32*06f8eb57SMarek Vasut mov_imm x16, RCAR_GICD_BASE 33*06f8eb57SMarek Vasutprint_gicc_regs: 34*06f8eb57SMarek Vasut /* gicc base address is now in x17 */ 35*06f8eb57SMarek Vasut adr x6, gicc_regs /* Load the gicc reg list to x6 */ 36*06f8eb57SMarek Vasut /* Load the gicc regs to gp regs used by str_in_crash_buf_print */ 37*06f8eb57SMarek Vasut ldr w8, [x17, #GICC_HPPIR] 38*06f8eb57SMarek Vasut ldr w9, [x17, #GICC_AHPPIR] 39*06f8eb57SMarek Vasut ldr w10, [x17, #GICC_CTLR] 40*06f8eb57SMarek Vasut /* Store to the crash buf and print to console */ 41*06f8eb57SMarek Vasut bl str_in_crash_buf_print 42*06f8eb57SMarek Vasut 43*06f8eb57SMarek Vasut /* Print the GICD_ISPENDR regs */ 44*06f8eb57SMarek Vasut add x7, x16, #GICD_ISPENDR 45*06f8eb57SMarek Vasut adr x4, gicd_pend_reg 46*06f8eb57SMarek Vasut bl asm_print_str 47*06f8eb57SMarek Vasutgicd_ispendr_loop: 48*06f8eb57SMarek Vasut sub x4, x7, x16 49*06f8eb57SMarek Vasut cmp x4, #0x280 50*06f8eb57SMarek Vasut b.eq exit_print_gic_regs 51*06f8eb57SMarek Vasut bl asm_print_hex 52*06f8eb57SMarek Vasut adr x4, spacer 53*06f8eb57SMarek Vasut bl asm_print_str 54*06f8eb57SMarek Vasut ldr x4, [x7], #8 55*06f8eb57SMarek Vasut bl asm_print_hex 56*06f8eb57SMarek Vasut adr x4, newline 57*06f8eb57SMarek Vasut bl asm_print_str 58*06f8eb57SMarek Vasut b gicd_ispendr_loop 59*06f8eb57SMarek Vasutexit_print_gic_regs: 60*06f8eb57SMarek Vasut .endm 61