1*3fa9dec4Skenny liang/* 2*3fa9dec4Skenny liang * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. 3*3fa9dec4Skenny liang * 4*3fa9dec4Skenny liang * SPDX-License-Identifier: BSD-3-Clause 5*3fa9dec4Skenny liang */ 6*3fa9dec4Skenny liang 7*3fa9dec4Skenny liang#include <drivers/arm/cci.h> 8*3fa9dec4Skenny liang#include <drivers/arm/gic_common.h> 9*3fa9dec4Skenny liang#include <drivers/arm/gicv2.h> 10*3fa9dec4Skenny liang#include <platform_def.h> 11*3fa9dec4Skenny liang 12*3fa9dec4Skenny liang.section .rodata.gic_reg_name, "aS" 13*3fa9dec4Skenny lianggicc_regs: 14*3fa9dec4Skenny liang .asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", "" 15*3fa9dec4Skenny lianggicd_pend_reg: 16*3fa9dec4Skenny liang .asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n" \ 17*3fa9dec4Skenny liang " Offset:\t\t\tvalue\n" 18*3fa9dec4Skenny liangnewline: 19*3fa9dec4Skenny liang .asciz "\n" 20*3fa9dec4Skenny liangspacer: 21*3fa9dec4Skenny liang .asciz ":\t\t0x" 22*3fa9dec4Skenny liang 23*3fa9dec4Skenny liang.section .rodata.cci_reg_name, "aS" 24*3fa9dec4Skenny liangcci_iface_regs: 25*3fa9dec4Skenny liang .asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , "" 26*3fa9dec4Skenny liang 27*3fa9dec4Skenny liang /* --------------------------------------------- 28*3fa9dec4Skenny liang * The below macro prints out relevant GIC and 29*3fa9dec4Skenny liang * CCI registers whenever an unhandled exception 30*3fa9dec4Skenny liang * is taken in BL31. 31*3fa9dec4Skenny liang * Clobbers: x0 - x10, x26, x27, sp 32*3fa9dec4Skenny liang * --------------------------------------------- 33*3fa9dec4Skenny liang */ 34*3fa9dec4Skenny liang .macro plat_crash_print_regs 35*3fa9dec4Skenny liang mov_imm x26, BASE_GICD_BASE 36*3fa9dec4Skenny liang mov_imm x27, BASE_GICC_BASE 37*3fa9dec4Skenny liang /* Load the gicc reg list to x6 */ 38*3fa9dec4Skenny liang adr x6, gicc_regs 39*3fa9dec4Skenny liang /* Load the gicc regs to gp regs used by str_in_crash_buf_print */ 40*3fa9dec4Skenny liang ldr w8, [x27, #GICC_HPPIR] 41*3fa9dec4Skenny liang ldr w9, [x27, #GICC_AHPPIR] 42*3fa9dec4Skenny liang ldr w10, [x27, #GICC_CTLR] 43*3fa9dec4Skenny liang /* Store to the crash buf and print to console */ 44*3fa9dec4Skenny liang bl str_in_crash_buf_print 45*3fa9dec4Skenny liang 46*3fa9dec4Skenny liang /* Print the GICD_ISPENDR regs */ 47*3fa9dec4Skenny liang add x7, x26, #GICD_ISPENDR 48*3fa9dec4Skenny liang adr x4, gicd_pend_reg 49*3fa9dec4Skenny liang bl asm_print_str 50*3fa9dec4Skenny lianggicd_ispendr_loop: 51*3fa9dec4Skenny liang sub x4, x7, x26 52*3fa9dec4Skenny liang cmp x4, #0x280 53*3fa9dec4Skenny liang b.eq exit_print_gic_regs 54*3fa9dec4Skenny liang bl asm_print_hex 55*3fa9dec4Skenny liang 56*3fa9dec4Skenny liang adr x4, spacer 57*3fa9dec4Skenny liang bl asm_print_str 58*3fa9dec4Skenny liang 59*3fa9dec4Skenny liang ldr x4, [x7], #8 60*3fa9dec4Skenny liang bl asm_print_hex 61*3fa9dec4Skenny liang 62*3fa9dec4Skenny liang adr x4, newline 63*3fa9dec4Skenny liang bl asm_print_str 64*3fa9dec4Skenny liang b gicd_ispendr_loop 65*3fa9dec4Skenny liangexit_print_gic_regs: 66*3fa9dec4Skenny liang 67*3fa9dec4Skenny liang adr x6, cci_iface_regs 68*3fa9dec4Skenny liang /* Store in x7 the base address of the first interface */ 69*3fa9dec4Skenny liang mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \ 70*3fa9dec4Skenny liang PLAT_MT_CCI_CLUSTER0_SL_IFACE_IX)) 71*3fa9dec4Skenny liang ldr w8, [x7, #SNOOP_CTRL_REG] 72*3fa9dec4Skenny liang /* Store in x7 the base address of the second interface */ 73*3fa9dec4Skenny liang mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \ 74*3fa9dec4Skenny liang PLAT_MT_CCI_CLUSTER1_SL_IFACE_IX)) 75*3fa9dec4Skenny liang ldr w9, [x7, #SNOOP_CTRL_REG] 76*3fa9dec4Skenny liang /* Store to the crash buf and print to console */ 77*3fa9dec4Skenny liang bl str_in_crash_buf_print 78*3fa9dec4Skenny liang .endm 79