Lines Matching refs:x7

294 	mov	x7, x0
299 	and	x6, x6, x7
335 	and	x6, x6, x7
420 	ldr	x7, =IPSTPACK_RETRY_CNT
426 	sub	x7, x7, #1
427 	cbnz	x7, 3b
432 	ldr	x7, =IPSTPACK_RETRY_CNT
440 	sub	x7, x7, #1
441 	cbnz	x7, 4b
447 	ldr	x7, =IPSTPACK_RETRY_CNT
453 	sub	x7, x7, #1
454 	cbnz	x7, 5b
460 	ldr	x7, =IPSTPACK_RETRY_CNT
466 	sub	x7, x7, #1
467 	cbnz	x7, 6b
472 	ldr	x7, =IPSTPACK_RETRY_CNT
480 	sub	x7, x7, #1
481 	cbnz	x7, 7b
484 	ldr	x7, =BC_PSCI_BASE
485 	add	x7, x7, #AUX_01_DATA
544 	mov	x7, #DCSR_RCPM2_BASE
575 	mov	x7, x30
657 	mov	x30, x7
966 	mov	x7, x0
971 	and	x6, x6, x7
1007 	and	x6, x6, x7
1092 	ldr	x7, =IPSTPACK_RETRY_CNT
1098 	sub	x7, x7, #1
1099 	cbnz	x7, 3b
1104 	ldr	x7, =IPSTPACK_RETRY_CNT
1112 	sub	x7, x7, #1
1113 	cbnz	x7, 4b
1119 	ldr	x7, =IPSTPACK_RETRY_CNT
1125 	sub	x7, x7, #1
1126 	cbnz	x7, 5b
1132 	ldr	x7, =IPSTPACK_RETRY_CNT
1138 	sub	x7, x7, #1
1139 	cbnz	x7, 6b
1144 	ldr	x7, =IPSTPACK_RETRY_CNT
1152 	sub	x7, x7, #1
1153 	cbnz	x7, 7b
1156 	ldr	x7, =BC_PSCI_BASE
1157 	add	x7, x7, #AUX_01_DATA
1212 	str	w0, [x7, #CPUACTLR_DATA_OFFSET]
1222 	mov	x7, #DCSR_RCPM2_BASE
1498 	str	w4, [x7, #RCPM2_IPSTPCR4_OFFSET]   /* quiesce ddr clocks - end */
1507 	ldr	w1, [x7, #RCPM2_IPSTPACKR4_OFFSET]
1515 	str	w4, [x7, #RCPM2_IPSTPCR4_OFFSET]   /* re-enable ddr clks interface */
1526 	str	w4, [x7, #RCPM2_IPSTPCR4_OFFSET]   /* re-enable ddr clk in ipstpcr4 */
1531 	ldr	w1, [x7, #RCPM2_IPSTPACKR4_OFFSET] /* poll on ipstpack4 - start */
1561 	str	wzr, [x7, #RCPM2_IPSTPCR4_OFFSET]  /* reset ipstpcr4 */
1562 	str	wzr, [x7, #RCPM2_IPSTPCR3_OFFSET]  /* reset ipstpcr3 */
1563 	str	wzr, [x7, #RCPM2_IPSTPCR2_OFFSET]  /* reset ipstpcr2 */
1564 	str	wzr, [x7, #RCPM2_IPSTPCR1_OFFSET]  /* reset ipstpcr1 */
1565 	str	wzr, [x7, #RCPM2_IPSTPCR0_OFFSET]  /* reset ipstpcr0 */
1610 	str	w4, [x7, #RCPM2_IPSTPCR4_OFFSET]   /* quiesce ddr clocks - end */
1619 	ldr	w1, [x7, #RCPM2_IPSTPACKR4_OFFSET]