| #
1064bc6c |
| 22-Jan-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "idling-during-subsystem-restart" into integration
* changes:
fix(xilinx): add console_flush() before shutdown
fix(xilinx): fix sending sgi to linux
feat(xilinx): add
Merge changes from topic "idling-during-subsystem-restart" into integration
* changes:
fix(xilinx): add console_flush() before shutdown
fix(xilinx): fix sending sgi to linux
feat(xilinx): add new state to identify cpu power down
feat(xilinx): request cpu power down from reset
feat(xilinx): power down all cores on receiving cpu pwrdwn req
feat(xilinx): add handler for power down req sgi irq
feat(xilinx): add wrapper to handle cpu power down req
fix(versal-net): use arm common GIC handlers
fix(xilinx): rename macros to align with ARM
show more ...
|
| #
79953190 |
| 05-Oct-2023 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
fix(xilinx): rename macros to align with ARM
Use generic macro name as per common ARM GIC macro name for Versal
and Versal NET.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id:
fix(xilinx): rename macros to align with ARM
Use generic macro name as per common ARM GIC macro name for Versal
and Versal NET.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I2987ff2f612993fc80979f0179c04d316259ed1d
show more ...
|
| #
d84171b4 |
| 20-Apr-2023 |
Joanna Farley <joanna.farley@arm.com> |
Merge "style(xilinx): replace ARM by Arm in copyrights" into integration
|
| #
619bc13e |
| 14-Apr-2023 |
Michal Simek <michal.simek@amd.com> |
style(xilinx): replace ARM by Arm in copyrights
The commit 6bb49c876c75 ("style(hooks): adds Arm copyright style fix")
is enforcing proper case for ARM. That's why fix it in plat/xilinx to
make sure
style(xilinx): replace ARM by Arm in copyrights
The commit 6bb49c876c75 ("style(hooks): adds Arm copyright style fix")
is enforcing proper case for ARM. That's why fix it in plat/xilinx to
make sure that pre-commit.copyright won't be touching platform specific
files.
Change-Id: I49c66e18d46ed871a6aa128c9b2a403d0cf83416
Signed-off-by: Michal Simek <michal.simek@amd.com>
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|
| #
cfe6a82e |
| 28-Mar-2023 |
Mark Dykes <mark.dykes@arm.com> |
Merge "refactor(xilinx): rename gic macros to make common" into integration
|
| #
31b68489 |
| 28-Feb-2023 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
refactor(xilinx): rename gic macros to make common
Rename macros PLAT_VERSAL_GICD_BASE, PLAT_VERSAL_GICR_BASE,
PLAT_VERSAL_NET_GICD_BASE and PLAT_VERSAL_NET_GICR_BASE to
PLAT_GICD_BASE_VALUE and PLA
refactor(xilinx): rename gic macros to make common
Rename macros PLAT_VERSAL_GICD_BASE, PLAT_VERSAL_GICR_BASE,
PLAT_VERSAL_NET_GICD_BASE and PLAT_VERSAL_NET_GICR_BASE to
PLAT_GICD_BASE_VALUE and PLAT_GICR_BASE_VALUE to make common
for both Versal and Versal NET platforms.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ibcebfb8e741e828ef272b32cbedfb4dcbf8629b6
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|
| #
f47d38ba |
| 21-Sep-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xilinx-versal-net" into integration
* changes:
feat(versal-net): add support for platform management
feat(versal-net): add support for IPI
feat(versal-net): add SMP s
Merge changes from topic "xilinx-versal-net" into integration
* changes:
feat(versal-net): add support for platform management
feat(versal-net): add support for IPI
feat(versal-net): add SMP support for Versal NET
feat(versal-net): add support for Xilinx Versal NET platform
feat(versal-net): add documentation for Versal NET SoC
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|
| #
1d333e69 |
| 31-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
feat(versal-net): add support for Xilinx Versal NET platform
New SoC is a78 based with gicv3 and uart over pl011. Communication
interfaces are similar to Versal platform. System starts with Xilinx P
feat(versal-net): add support for Xilinx Versal NET platform
New SoC is a78 based with gicv3 and uart over pl011. Communication
interfaces are similar to Versal platform. System starts with Xilinx PLM
firmware which loads TF-A(bl31) to DDR, which is already configured, and
jumps to it. PLM also prepare handoff structure for TF-A with information
what components were load and flags which indicate which EL level SW should
be started.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com>
Change-Id: I2a16c242a77be6c91be3d198727dc3b9bbb97410
show more ...
|