ERRATUM (reference) in projects: rk3399_ARM-atf

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Searched refs:ERRATUM (Results 1 – 25 of 48) sorted by relevance

/rk3399_ARM-atf/lib/cpus/aarch64/
H A D	cortex_x2.S	34 workaround_reset_start cortex_x2, ERRATUM(1901946), ERRATA_X2_1901946 36 workaround_reset_end cortex_x2, ERRATUM(1901946) 38 check_erratum_range cortex_x2, ERRATUM(1901946), CPU_REV(1, 0), CPU_REV(1, 0) 40 workaround_reset_start cortex_x2, ERRATUM(1916945), ERRATA_X2_1916945 42 workaround_reset_end cortex_x2, ERRATUM(1916945) 44 check_erratum_ls cortex_x2, ERRATUM(1916945), CPU_REV(1, 0) 46 workaround_reset_start cortex_x2, ERRATUM(1917258), ERRATA_X2_1917258 48 workaround_reset_end cortex_x2, ERRATUM(1917258) 50 check_erratum_ls cortex_x2, ERRATUM(1917258), CPU_REV(1, 0) 52 workaround_reset_start cortex_x2, ERRATUM(1927200), ERRATA_X2_1927200 [all …]
H A D	cortex_a510.S	27 workaround_runtime_start cortex_a510, ERRATUM(2008766), ERRATA_A510_2008766 47 workaround_runtime_end cortex_a510, ERRATUM(2008766), NO_ISB 49 check_erratum_ls cortex_a510, ERRATUM(2008766), CPU_REV(1, 3) 51 workaround_reset_start cortex_a510, ERRATUM(2041909), ERRATA_A510_2041909 67 workaround_reset_end cortex_a510, ERRATUM(2041909) 69 check_erratum_range cortex_a510, ERRATUM(2041909), CPU_REV(0, 2), CPU_REV(0, 2) 71 workaround_reset_start cortex_a510, ERRATUM(2042739), ERRATA_A510_2042739 75 workaround_reset_end cortex_a510, ERRATUM(2042739) 77 check_erratum_ls cortex_a510, ERRATUM(2042739), CPU_REV(0, 2) 79 workaround_reset_start cortex_a510, ERRATUM(2080326), ERRATA_A510_2080326 [all …]
H A D	neoverse_n2.S	32 workaround_reset_start neoverse_n2, ERRATUM(2002655), ERRATA_N2_2002655 50 workaround_reset_end neoverse_n2, ERRATUM(2002655) 52 check_erratum_ls neoverse_n2, ERRATUM(2002655), CPU_REV(0, 0) 54 workaround_runtime_start neoverse_n2, ERRATUM(2009478), ERRATA_N2_2009478 66 workaround_runtime_end neoverse_n2, ERRATUM(2009478), NO_ISB 68 check_erratum_ls neoverse_n2, ERRATUM(2009478), CPU_REV(0, 0) 70 workaround_reset_start neoverse_n2, ERRATUM(2025414), ERRATA_N2_2025414 72 workaround_reset_end neoverse_n2, ERRATUM(2025414) 74 check_erratum_ls neoverse_n2, ERRATUM(2025414), CPU_REV(0, 0) 76 workaround_reset_start neoverse_n2, ERRATUM(2067956), ERRATA_N2_2067956 [all …]
H A D	cortex_x3.S	33 workaround_reset_start cortex_x3, ERRATUM(2266875), ERRATA_X3_2266875 35 workaround_reset_end cortex_x3, ERRATUM(2266875) 37 check_erratum_ls cortex_x3, ERRATUM(2266875), CPU_REV(1, 0) 39 workaround_reset_start cortex_x3, ERRATUM(2302506), ERRATA_X3_2302506 41 workaround_reset_end cortex_x3, ERRATUM(2302506) 43 check_erratum_ls cortex_x3, ERRATUM(2302506), CPU_REV(1, 1) 46 workaround_runtime_start cortex_x3, ERRATUM(2313909), ERRATA_X3_2313909 50 workaround_runtime_end cortex_x3, ERRATUM(2313909), NO_ISB 52 check_erratum_ls cortex_x3, ERRATUM(2313909), CPU_REV(1, 0) 54 workaround_reset_start cortex_x3, ERRATUM(2372204), ERRATA_X3_2372204 [all …]
H A D	cortex_a710.S	34 workaround_reset_start cortex_a710, ERRATUM(1901946), ERRATA_A710_1901946 36 workaround_reset_end cortex_a710, ERRATUM(1901946) 38 check_erratum_range cortex_a710, ERRATUM(1901946), CPU_REV(1, 0), CPU_REV(1, 0) 40 workaround_reset_start cortex_a710, ERRATUM(1916945), ERRATA_A710_1916945 42 workaround_reset_end cortex_a710, ERRATUM(1916945) 44 check_erratum_ls cortex_a710, ERRATUM(1916945), CPU_REV(1, 0) 46 workaround_reset_start cortex_a710, ERRATUM(1917258), ERRATA_A710_1917258 48 workaround_reset_end cortex_a710, ERRATUM(1917258) 50 check_erratum_ls cortex_a710, ERRATUM(1917258), CPU_REV(1, 0) 52 workaround_reset_start cortex_a710, ERRATUM(1927200), ERRATA_A710_1927200 [all …]
H A D	neoverse_n1.S	33 workaround_reset_start neoverse_n1, ERRATUM(936184), ERRATA_DSU_936184 35 workaround_reset_end neoverse_n1, ERRATUM(936184) 37 check_erratum_custom_start neoverse_n1, ERRATUM(936184) 42 check_erratum_custom_end neoverse_n1, ERRATUM(936184) 44 workaround_reset_start neoverse_n1, ERRATUM(1043202), ERRATA_N1_1043202 54 workaround_reset_end neoverse_n1, ERRATUM(1043202) 56 check_erratum_ls neoverse_n1, ERRATUM(1043202), CPU_REV(1, 0) 58 workaround_reset_start neoverse_n1, ERRATUM(1073348), ERRATA_N1_1073348 60 workaround_reset_end neoverse_n1, ERRATUM(1073348) 62 check_erratum_ls neoverse_n1, ERRATUM(1073348), CPU_REV(1, 0) [all …]
H A D	cortex_x4.S	31 add_erratum_entry cortex_x4, ERRATUM(2726228), ERRATA_X4_2726228 33 check_erratum_ls cortex_x4, ERRATUM(2726228), CPU_REV(0, 1) 35 workaround_runtime_start cortex_x4, ERRATUM(2740089), ERRATA_X4_2740089 38 workaround_runtime_end cortex_x4, ERRATUM(2740089) 40 check_erratum_ls cortex_x4, ERRATUM(2740089), CPU_REV(0, 1) 42 workaround_reset_start cortex_x4, ERRATUM(2763018), ERRATA_X4_2763018 44 workaround_reset_end cortex_x4, ERRATUM(2763018) 46 check_erratum_ls cortex_x4, ERRATUM(2763018), CPU_REV(0, 1) 48 workaround_reset_start cortex_x4, ERRATUM(2816013), ERRATA_X4_2816013 54 workaround_reset_end cortex_x4, ERRATUM(2816013) [all …]
H A D	cortex_a720.S	30 workaround_reset_start cortex_a720, ERRATUM(2729604), ERRATA_A720_2729604 32 workaround_reset_end cortex_a720, ERRATUM(2729604) 34 check_erratum_ls cortex_a720, ERRATUM(2729604), CPU_REV(0, 1) 36 workaround_reset_start cortex_a720, ERRATUM(2792132), ERRATA_A720_2792132 38 workaround_reset_end cortex_a720, ERRATUM(2792132) 40 check_erratum_ls cortex_a720, ERRATUM(2792132), CPU_REV(0, 1) 42 workaround_reset_start cortex_a720, ERRATUM(2844092), ERRATA_A720_2844092 44 workaround_reset_end cortex_a720, ERRATUM(2844092) 46 check_erratum_ls cortex_a720, ERRATUM(2844092), CPU_REV(0, 1) 48 workaround_reset_start cortex_a720, ERRATUM(2900952), ERRATA_DSU_2900952 [all …]
H A D	c1_ultra.S	43 workaround_runtime_start c1_ultra, ERRATUM(3324333), ERRATA_C1ULTRA_3324333 45 workaround_runtime_end c1_ultra, ERRATUM(3324333) 47 check_erratum_ls c1_ultra, ERRATUM(3324333), CPU_REV(0, 0) 49 workaround_reset_start c1_ultra, ERRATUM(3502731), ERRATA_C1ULTRA_3502731 51 workaround_reset_end c1_ultra, ERRATUM(3502731) 53 check_erratum_ls c1_ultra, ERRATUM(3502731), CPU_REV(0, 0) 55 workaround_reset_start c1_ultra, ERRATUM(3651221), ERRATA_C1ULTRA_3651221 57 workaround_reset_end c1_ultra, ERRATUM(3651221) 59 check_erratum_ls c1_ultra, ERRATUM(3651221), CPU_REV(0, 0) 62 add_erratum_entry c1_ultra, ERRATUM(3658374), ERRATA_C1ULTRA_3658374 [all …]
H A D	c1_premium.S	43 workaround_runtime_start c1_premium, ERRATUM(3324333), ERRATA_C1PREMIUM_3324333 45 workaround_runtime_end c1_premium, ERRATUM(3324333) 47 check_erratum_ls c1_premium, ERRATUM(3324333), CPU_REV(0, 0) 49 workaround_reset_start c1_premium, ERRATUM(3502731), ERRATA_C1PREMIUM_3502731 51 workaround_reset_end c1_premium, ERRATUM(3502731) 53 check_erratum_ls c1_premium, ERRATUM(3502731), CPU_REV(0, 0) 55 workaround_reset_start c1_premium, ERRATUM(3651221), ERRATA_C1PREMIUM_3651221 57 workaround_reset_end c1_premium, ERRATUM(3651221) 59 check_erratum_ls c1_premium, ERRATUM(3651221), CPU_REV(0, 0) 61 workaround_reset_start c1_premium, ERRATUM(3684152), ERRATA_C1PREMIUM_3684152 [all …]
H A D	neoverse_v2.S	29 workaround_reset_start neoverse_v2, ERRATUM(2618597), ERRATA_V2_2618597 37 workaround_reset_end neoverse_v2, ERRATUM(2618597) 40 add_erratum_entry neoverse_v2, ERRATUM(ARCH_WORKAROUND_3), WORKAROUND_CVE_2022_23960 42 check_erratum_ls neoverse_v2, ERRATUM(ARCH_WORKAROUND_3), CPU_REV(0, 0) 44 check_erratum_ls neoverse_v2, ERRATUM(2618597), CPU_REV(0, 1) 46 workaround_reset_start neoverse_v2, ERRATUM(2662553), ERRATA_V2_2662553 49 workaround_reset_end neoverse_v2, ERRATUM(2662553) 51 check_erratum_ls neoverse_v2, ERRATUM(2662553), CPU_REV(0, 1) 53 workaround_reset_start neoverse_v2, ERRATUM(2719105), ERRATA_V2_2719105 55 workaround_reset_end neoverse_v2, ERRATUM(2719105) [all …]
H A D	cortex_a57.S	52 apply_erratum cortex_a57, ERRATUM(817169), ERRATA_A57_817169 59 add_erratum_entry cortex_a57, ERRATUM(ARCH_WORKAROUND_3), WORKAROUND_CVE_2022_23960 61 check_erratum_chosen cortex_a57, ERRATUM(ARCH_WORKAROUND_3), WORKAROUND_CVE_2022_23960 67 workaround_reset_start cortex_a57, ERRATUM(99999), A57_DISABLE_NON_TEMPORAL_HINT 69 workaround_reset_end cortex_a57, ERRATUM(99999) 71 check_erratum_ls cortex_a57, ERRATUM(99999), CPU_REV(1, 2) 73 workaround_reset_start cortex_a57, ERRATUM(806969), ERRATA_A57_806969 75 workaround_reset_end cortex_a57, ERRATUM(806969) 77 check_erratum_ls cortex_a57, ERRATUM(806969), CPU_REV(0, 0) 80 check_erratum_ls cortex_a57, ERRATUM(813419), CPU_REV(0, 0) [all …]
H A D	cortex_a78c.S	26 workaround_reset_start cortex_a78c, ERRATUM(1827430), ERRATA_A78C_1827430 29 workaround_reset_end cortex_a78c, ERRATUM(1827430) 31 check_erratum_ls cortex_a78c, ERRATUM(1827430), CPU_REV(0, 0) 33 workaround_reset_start cortex_a78c, ERRATUM(1827440), ERRATA_A78C_1827440 36 workaround_reset_end cortex_a78c, ERRATUM(1827440) 38 check_erratum_ls cortex_a78c, ERRATUM(1827440), CPU_REV(0, 0) 40 workaround_reset_start cortex_a78c, ERRATUM(2242638), ERRATA_A78C_2242638 49 workaround_reset_end cortex_a78c, ERRATUM(2242638) 51 check_erratum_range cortex_a78c, ERRATUM(2242638), CPU_REV(0, 1), CPU_REV(0, 2) 53 workaround_reset_start cortex_a78c, ERRATUM(2376749), ERRATA_A78C_2376749 [all …]
H A D	cortex_a55.S	25 workaround_reset_start cortex_a55, ERRATUM(768277), ERRATA_A55_768277 27 workaround_reset_end cortex_a55, ERRATUM(768277) 29 check_erratum_ls cortex_a55, ERRATUM(768277), CPU_REV(0, 0) 31 workaround_reset_start cortex_a55, ERRATUM(778703), ERRATA_A55_778703 34 workaround_reset_end cortex_a55, ERRATUM(778703) 36 check_erratum_custom_start cortex_a55, ERRATUM(778703) 48 check_erratum_custom_end cortex_a55, ERRATUM(778703) 50 workaround_reset_start cortex_a55, ERRATUM(798797), ERRATA_A55_798797 52 workaround_reset_end cortex_a55, ERRATUM(798797) 54 check_erratum_ls cortex_a55, ERRATUM(798797), CPU_REV(0, 0) [all …]
H A D	cortex_a715.S	33 workaround_reset_start cortex_a715, ERRATUM(2331818), ERRATA_A715_2331818 35 workaround_reset_end cortex_a715, ERRATUM(2331818) 37 check_erratum_ls cortex_a715, ERRATUM(2331818), CPU_REV(1, 0) 39 workaround_reset_start cortex_a715, ERRATUM(2344187), ERRATA_A715_2344187 63 workaround_reset_end cortex_a715, ERRATUM(2344187) 65 check_erratum_ls cortex_a715, ERRATUM(2344187), CPU_REV(1, 0) 67 workaround_reset_start cortex_a715, ERRATUM(2376701), ERRATA_A715_2376701 69 workaround_reset_end cortex_a715, ERRATUM(2376701) 71 check_erratum_ls cortex_a715, ERRATUM(2376701), CPU_REV(1, 0) 73 workaround_reset_start cortex_a715, ERRATUM(2409570), ERRATA_A715_2409570 [all …]
H A D	neoverse_v1.S	31 workaround_reset_start neoverse_v1, ERRATUM(1618635), ERRATA_V1_1618635 82 workaround_reset_end neoverse_v1, ERRATUM(1618635) 84 check_erratum_ls neoverse_v1, ERRATUM(1618635), CPU_REV(0, 0) 86 workaround_reset_start neoverse_v1, ERRATUM(1774420), ERRATA_V1_1774420 89 workaround_reset_end neoverse_v1, ERRATUM(1774420) 91 check_erratum_ls neoverse_v1, ERRATUM(1774420), CPU_REV(1, 0) 93 workaround_reset_start neoverse_v1, ERRATUM(1791573), ERRATA_V1_1791573 96 workaround_reset_end neoverse_v1, ERRATUM(1791573) 98 check_erratum_ls neoverse_v1, ERRATUM(1791573), CPU_REV(1, 0) 100 workaround_reset_start neoverse_v1, ERRATUM(1852267), ERRATA_V1_1852267 [all …]
H A D	c1_pro.S	44 workaround_runtime_start c1_pro, ERRATUM(3338470), ERRATA_C1PRO_3338470 46 workaround_runtime_end c1_pro, ERRATUM(3338470) 48 check_erratum_ls c1_pro, ERRATUM(3338470), CPU_REV(0, 0) 50 workaround_reset_start c1_pro, ERRATUM(3362007), ERRATA_C1PRO_3362007 52 workaround_reset_end c1_pro, ERRATUM(3362007) 54 check_erratum_ls c1_pro, ERRATUM(3362007), CPU_REV(0, 0) 56 workaround_reset_start c1_pro, ERRATUM(3619847), ERRATA_C1PRO_3619847 58 workaround_reset_end c1_pro, ERRATUM(3619847) 60 check_erratum_ls c1_pro, ERRATUM(3619847), CPU_REV(0, 0) 62 workaround_reset_start c1_pro, ERRATUM(3684268), ERRATA_C1PRO_3684268 [all …]
H A D	cortex_a725.S	30 workaround_reset_start cortex_a725, ERRATUM(2874943), ERRATA_A725_2874943 33 workaround_reset_end cortex_a725, ERRATUM(2874943) 35 check_erratum_ls cortex_a725, ERRATUM(2874943), CPU_REV(0, 0) 38 workaround_reset_start cortex_a725, ERRATUM(2900952), ERRATA_DSU_2900952 40 workaround_reset_end cortex_a725, ERRATUM(2900952) 42 check_erratum_custom_start cortex_a725, ERRATUM(2900952) 45 check_erratum_custom_end cortex_a725, ERRATUM(2900952) 47 workaround_reset_start cortex_a725, ERRATUM(2936490), ERRATA_A725_2936490 49 workaround_reset_end cortex_a725, ERRATUM(2936490) 51 check_erratum_ls cortex_a725, ERRATUM(2936490), CPU_REV(0, 0) [all …]
H A D	cortex_a78.S	29 workaround_reset_start cortex_a78, ERRATUM(1688305), ERRATA_A78_1688305 31 workaround_reset_end cortex_a78, ERRATUM(1688305) 33 check_erratum_ls cortex_a78, ERRATUM(1688305), CPU_REV(1, 0) 35 workaround_reset_start cortex_a78, ERRATUM(1821534), ERRATA_A78_1821534 37 workaround_reset_end cortex_a78, ERRATUM(1821534) 39 check_erratum_ls cortex_a78, ERRATUM(1821534), CPU_REV(1, 0) 41 workaround_reset_start cortex_a78, ERRATUM(1941498), ERRATA_A78_1941498 43 workaround_reset_end cortex_a78, ERRATUM(1941498) 45 check_erratum_ls cortex_a78, ERRATUM(1941498), CPU_REV(1, 1) 47 workaround_reset_start cortex_a78, ERRATUM(1951500), ERRATA_A78_1951500 [all …]
H A D	cortex_a53.S	29 check_erratum_ls cortex_a53, ERRATUM(819472), CPU_REV(0, 1) 31 add_erratum_entry cortex_a53, ERRATUM(819472), ERRATUM_ALWAYS_CHOSEN 34 check_erratum_ls cortex_a53, ERRATUM(824069), CPU_REV(0, 2) 36 add_erratum_entry cortex_a53, ERRATUM(824069), ERRATUM_ALWAYS_CHOSEN 38 workaround_reset_start cortex_a53, ERRATUM(826319), ERRATA_A53_826319 43 workaround_reset_end cortex_a53, ERRATUM(826319) 45 check_erratum_ls cortex_a53, ERRATUM(826319), CPU_REV(0, 2) 48 check_erratum_ls cortex_a53, ERRATUM(827319), CPU_REV(0, 2) 50 add_erratum_entry cortex_a53, ERRATUM(827319), ERRATUM_ALWAYS_CHOSEN 52 check_erratum_custom_start cortex_a53, ERRATUM(835769) [all …]
H A D	cortex_a76.S	305 add_erratum_entry cortex_a76, ERRATUM(ARCH_WORKAROUND_2), WORKAROUND_CVE_2018_3639 307 check_erratum_chosen cortex_a76, ERRATUM(ARCH_WORKAROUND_2), WORKAROUND_CVE_2018_3639 309 workaround_reset_start cortex_a76, ERRATUM(798953), ERRATA_DSU_798953 311 workaround_reset_end cortex_a76, ERRATUM(798953) 313 check_erratum_custom_start cortex_a76, ERRATUM(798953) 316 check_erratum_custom_end cortex_a76, ERRATUM(798953) 318 workaround_reset_start cortex_a76, ERRATUM(936184), ERRATA_DSU_936184 320 workaround_reset_end cortex_a76, ERRATUM(936184) 322 check_erratum_custom_start cortex_a76, ERRATUM(936184) 325 check_erratum_custom_end cortex_a76, ERRATUM(936184) [all …]
H A D	cortex_a520.S	29 workaround_reset_start cortex_a520, ERRATUM(2630792), ERRATA_A520_2630792 31 workaround_reset_end cortex_a520, ERRATUM(2630792) 33 check_erratum_ls cortex_a520, ERRATUM(2630792), CPU_REV(0, 1) 35 workaround_reset_start cortex_a520, ERRATUM(2858100), ERRATA_A520_2858100 37 workaround_reset_end cortex_a520, ERRATUM(2858100) 39 check_erratum_ls cortex_a520, ERRATUM(2858100), CPU_REV(0, 1) 41 workaround_reset_start cortex_a520, ERRATUM(2900952), ERRATA_DSU_2900952 43 workaround_reset_end cortex_a520, ERRATUM(2900952) 45 check_erratum_custom_start cortex_a520, ERRATUM(2900952) 48 check_erratum_custom_end cortex_a520, ERRATUM(2900952) [all …]
H A D	cortex_a65.S	28 workaround_reset_start cortex_a65, ERRATUM(936184), ERRATA_DSU_936184 30 workaround_reset_end cortex_a65, ERRATUM(936184) 32 check_erratum_custom_start cortex_a65, ERRATUM(936184) 35 check_erratum_custom_end cortex_a65, ERRATUM(936184) 37 workaround_reset_start cortex_a65, ERRATUM(1179935), ERRATA_A65_1179935 39 workaround_reset_end cortex_a65, ERRATUM(1179935) 41 check_erratum_ls cortex_a65, ERRATUM(1179935), CPU_REV(0, 0) 43 workaround_reset_start cortex_a65, ERRATUM(1227419), ERRATA_A65_1227419 45 workaround_reset_end cortex_a65, ERRATUM(1227419) 47 check_erratum_ls cortex_a65, ERRATUM(1227419), CPU_REV(1, 0) [all …]
H A D	cortex_a77.S	31 workaround_reset_start cortex_a77, ERRATUM(1508412), ERRATA_A77_1508412 66 workaround_reset_end cortex_a77, ERRATUM(1508412) 68 check_erratum_ls cortex_a77, ERRATUM(1508412), CPU_REV(1, 0) 70 workaround_reset_start cortex_a77, ERRATUM(1791578), ERRATA_A77_1791578 72 workaround_reset_end cortex_a77, ERRATUM(1791578) 74 check_erratum_ls cortex_a77, ERRATUM(1791578), CPU_REV(1, 1) 76 workaround_reset_start cortex_a77, ERRATUM(1800714), ERRATA_A77_1800714 79 workaround_reset_end cortex_a77, ERRATUM(1800714) 81 check_erratum_ls cortex_a77, ERRATUM(1800714), CPU_REV(1, 1) 83 workaround_reset_start cortex_a77, ERRATUM(1925769), ERRATA_A77_1925769 [all …]
H A D	cortex_a75.S	24 add_erratum_entry cortex_a75, ERRATUM(ARCH_WORKAROUND_3), WORKAROUND_CVE_2022_23960 26 check_erratum_chosen cortex_a75, ERRATUM(ARCH_WORKAROUND_3), WORKAROUND_CVE_2022_23960 28 workaround_reset_start cortex_a75, ERRATUM(764081), ERRATA_A75_764081 30 workaround_reset_end cortex_a75, ERRATUM(764081) 32 check_erratum_ls cortex_a75, ERRATUM(764081), CPU_REV(0, 0) 34 workaround_reset_start cortex_a75, ERRATUM(790748), ERRATA_A75_790748 36 workaround_reset_end cortex_a75, ERRATUM(790748) 38 check_erratum_ls cortex_a75, ERRATUM(790748), CPU_REV(0, 0) 40 workaround_reset_start cortex_a75, ERRATUM(798953), ERRATA_DSU_798953 42 workaround_reset_end cortex_a75, ERRATUM(798953) [all …]