1/* 2 * Copyright (c) 2023-2025, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <arch.h> 8#include <asm_macros.S> 9#include <c1_pro.h> 10#include <common/bl_common.h> 11#include <cpu_macros.S> 12 13#include <plat_macros.S> 14 15/* Hardware handled coherency */ 16#if HW_ASSISTED_COHERENCY == 0 17#error "Arm C1-Pro must be compiled with HW_ASSISTED_COHERENCY enabled" 18#endif 19 20/* 64-bit only core */ 21#if CTX_INCLUDE_AARCH32_REGS == 1 22#error "Arm C1-Pro supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0" 23#endif 24 25#if ERRATA_SME_POWER_DOWN == 0 26#error "Arm C1-Pro needs ERRATA_SME_POWER_DOWN=1 to powerdown correctly" 27#endif 28 29cpu_reset_prologue c1_pro 30 31cpu_reset_func_start c1_pro 32 /* ---------------------------------------------------- 33 * Disable speculative loads 34 * ---------------------------------------------------- 35 */ 36 msr SSBS, xzr 37 /* model bug: not cleared on reset */ 38 sysreg_bit_clear C1_PRO_IMP_CPUPWRCTLR_EL1, \ 39 C1_PRO_IMP_CPUPWRCTLR_EL1_CORE_PWRDN_BIT 40 enable_mpmm 41cpu_reset_func_end c1_pro 42 43 /* ---------------------------------------------------- 44 * HW will do the cache maintenance while powering down 45 * ---------------------------------------------------- 46 */ 47func c1_pro_core_pwr_dwn 48 /* --------------------------------------------------- 49 * Flip CPU power down bit in power control register. 50 * It will be set on powerdown and cleared on wakeup 51 * --------------------------------------------------- 52 */ 53 sysreg_bit_set C1_PRO_IMP_CPUPWRCTLR_EL1, \ 54 C1_PRO_IMP_CPUPWRCTLR_EL1_CORE_PWRDN_BIT 55 isb 56 signal_pabandon_handled 57 ret 58endfunc c1_pro_core_pwr_dwn 59 60 /* --------------------------------------------- 61 * This function provides Arm C1-Pro specific 62 * register information for crash reporting. 63 * It needs to return with x6 pointing to 64 * a list of register names in ascii and 65 * x8 - x15 having values of registers to be 66 * reported. 67 * --------------------------------------------- 68 */ 69.section .rodata.c1_pro_regs, "aS" 70c1_pro_regs: /* The ASCII list of register names to be reported */ 71 .asciz "imp_cpuectlr_el1", "" 72 73func c1_pro_cpu_reg_dump 74 adr x6, c1_pro_regs 75 mrs x8, C1_PRO_IMP_CPUECTLR_EL1 76 ret 77endfunc c1_pro_cpu_reg_dump 78 79declare_cpu_ops c1_pro, C1_PRO_MIDR, \ 80 c1_pro_reset_func, \ 81 c1_pro_core_pwr_dwn 82