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Searched refs:cpu (Results 1 – 25 of 59) sorted by relevance

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/optee_os/core/drivers/pm/imx/
H A Dsrc.c32 uint32_t imx_get_src_gpr_arg(unsigned int cpu) in imx_get_src_gpr_arg() argument
36 return io_read32(va + SRC_GPR1 + ARG_OFFSET(cpu)); in imx_get_src_gpr_arg()
39 void imx_set_src_gpr_arg(unsigned int cpu, uint32_t val) in imx_set_src_gpr_arg() argument
43 io_write32(va + SRC_GPR1 + ARG_OFFSET(cpu), val); in imx_set_src_gpr_arg()
46 uint32_t imx_get_src_gpr_entry(unsigned int cpu) in imx_get_src_gpr_entry() argument
50 return io_read32(va + SRC_GPR1 + ENTRY_OFFSET(cpu)); in imx_get_src_gpr_entry()
53 void imx_set_src_gpr_entry(unsigned int cpu, uint32_t val) in imx_set_src_gpr_entry() argument
57 io_write32(va + SRC_GPR1 + ENTRY_OFFSET(cpu), val); in imx_set_src_gpr_entry()
60 void imx_src_release_secondary_core(unsigned int cpu) in imx_src_release_secondary_core() argument
66 SRC_A7RCR1_A7_CORE1_ENABLE_BIT(cpu)); in imx_src_release_secondary_core()
[all …]
H A Dlocal.h12 uint32_t imx_get_src_gpr_arg(unsigned int cpu);
19 void imx_set_src_gpr_arg(unsigned int cpu, uint32_t val);
25 uint32_t imx_get_src_gpr_entry(unsigned int cpu);
32 void imx_set_src_gpr_entry(unsigned int cpu, uint32_t val);
38 void imx_src_release_secondary_core(unsigned int cpu);
44 void imx_src_shutdown_core(unsigned int cpu);
H A Dpsci.c95 uint32_t cpu = affinity; in psci_affinity_info() local
100 ARM_WFI_STAT_MASK(cpu); in psci_affinity_info()
102 if (imx_get_src_gpr_arg(cpu) == 0 || !wfi) in psci_affinity_info()
105 DMSG("cpu: %" PRIu32 "GPR: %" PRIx32, cpu, imx_get_src_gpr_arg(cpu)); in psci_affinity_info()
107 while (imx_get_src_gpr_arg(cpu) != UINT_MAX) in psci_affinity_info()
110 imx_src_shutdown_core(cpu); in psci_affinity_info()
111 imx_set_src_gpr_arg(cpu, 0); in psci_affinity_info()
/optee_os/core/arch/arm/plat-ls/
H A Dconf.mk17 include core/arch/arm/cpu/cortex-armv8-0.mk
26 include core/arch/arm/cpu/cortex-armv8-0.mk
34 include core/arch/arm/cpu/cortex-armv8-0.mk
42 include core/arch/arm/cpu/cortex-armv8-0.mk
51 include core/arch/arm/cpu/cortex-armv8-0.mk
60 include core/arch/arm/cpu/cortex-armv8-0.mk
78 include core/arch/arm/cpu/cortex-armv8-0.mk
96 include core/arch/arm/cpu/cortex-armv8-0.mk
/optee_os/core/arch/arm/plat-marvell/
H A Dconf.mk4 include core/arch/arm/cpu/cortex-armv8-0.mk
18 include core/arch/arm/cpu/cortex-armv8-0.mk
33 include core/arch/arm/cpu/cortex-armv8-0.mk
52 include core/arch/arm/cpu/cortex-armv8-0.mk
71 include core/arch/arm/cpu/cortex-armv8-0.mk
90 include core/arch/arm/cpu/cortex-armv8-0.mk
107 include core/arch/arm/cpu/cortex-armv8-0.mk
124 include core/arch/arm/cpu/cortex-armv8-0.mk
141 include core/arch/arm/cpu/cortex-armv8-0.mk
158 include core/arch/arm/cpu/cortex-armv8-0.mk
[all …]
/optee_os/core/arch/arm/plat-sunxi/
H A Dpsci.c48 #define REG_CPUCFG_CPU_RST(cpu) (0x0040 + (cpu) * (0x0040)) argument
53 #define REG_PRCM_CPU_PWR_CLAMP(cpu) (0x0140 + (cpu) * (0x0004)) argument
H A Dconf.mk7 include core/arch/arm/cpu/cortex-a7.mk
30 include core/arch/arm/cpu/cortex-armv8-0.mk
/optee_os/core/arch/arm/dts/
H A Dfsl-lx2160a.dtsi27 cpu0: cpu@0 {
28 device_type = "cpu";
40 cpu-idle-states = <&cpu_pw15>;
44 cpu1: cpu@1 {
45 device_type = "cpu";
57 cpu-idle-states = <&cpu_pw15>;
61 cpu100: cpu@100 {
62 device_type = "cpu";
74 cpu-idle-states = <&cpu_pw15>;
78 cpu101: cpu@101 {
[all …]
H A Dstm32mp253.dtsi10 cpu1: cpu@1 {
12 device_type = "cpu";
H A Dstm32mp233.dtsi11 cpu1: cpu@1 {
13 device_type = "cpu";
H A Dstm32mp153.dtsi11 cpu1: cpu@1 {
14 device_type = "cpu";
/optee_os/core/arch/arm/plat-rockchip/
H A Dconf.mk12 include ./core/arch/arm/cpu/cortex-a7.mk
30 include core/arch/arm/cpu/cortex-armv8-0.mk
48 include core/arch/arm/cpu/cortex-armv8-0.mk
60 include core/arch/arm/cpu/cortex-armv8-0.mk
/optee_os/core/arch/arm/plat-ti/
H A Dconf.mk7 include core/arch/arm/cpu/cortex-a15.mk
14 include core/arch/arm/cpu/cortex-a15.mk
21 include core/arch/arm/cpu/cortex-a9.mk
/optee_os/core/arch/arm/plat-vexpress/
H A Dconf.mk4 include core/arch/arm/cpu/cortex-a15.mk
7 include core/arch/arm/cpu/cortex-armv8-0.mk
11 include core/arch/arm/cpu/cortex-armv8-0.mk
24 include core/arch/arm/cpu/cortex-armv8-0.mk
29 include core/arch/arm/cpu/cortex-armv8-0.mk
/optee_os/core/arch/arm/plat-automotive_rd/
H A Dconf.mk7 include core/arch/arm/cpu/neoverse-v2.mk
17 include core/arch/arm/cpu/cortex-armv9.mk
/optee_os/core/arch/arm/plat-aspeed/
H A Dconf.mk4 include core/arch/arm/cpu/cortex-a7.mk
24 include core/arch/arm/cpu/cortex-armv8-0.mk
/optee_os/core/arch/arm/cpu/
H A Dneoverse-v2.mk4 include core/arch/arm/cpu/cortex-armv9.mk
H A Dcortex-a35.mk2 include core/arch/arm/cpu/cortex-armv8-0.mk
/optee_os/core/arch/arm/plat-sprd/
H A Dconf.mk3 include core/arch/arm/cpu/cortex-armv8-0.mk
/optee_os/core/arch/arm/plat-amlogic/
H A Dconf.mk3 include core/arch/arm/cpu/cortex-armv8-0.mk
/optee_os/core/arch/arm/plat-poplar/
H A Dconf.mk1 include core/arch/arm/cpu/cortex-armv8-0.mk
/optee_os/core/arch/arm/plat-rpi5/
H A Dconf.mk1 include core/arch/arm/cpu/cortex-armv8-0.mk
/optee_os/core/arch/arm/plat-synquacer/
H A Dconf.mk7 include core/arch/arm/cpu/cortex-armv8-0.mk
/optee_os/core/arch/arm/plat-zynq7k/
H A Dconf.mk3 include core/arch/arm/cpu/cortex-a9.mk
/optee_os/core/arch/arm/plat-d02/
H A Dconf.mk1 include core/arch/arm/cpu/cortex-armv8-0.mk

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