Lines Matching refs:cpu
32 uint32_t imx_get_src_gpr_arg(unsigned int cpu) in imx_get_src_gpr_arg() argument
36 return io_read32(va + SRC_GPR1 + ARG_OFFSET(cpu)); in imx_get_src_gpr_arg()
39 void imx_set_src_gpr_arg(unsigned int cpu, uint32_t val) in imx_set_src_gpr_arg() argument
43 io_write32(va + SRC_GPR1 + ARG_OFFSET(cpu), val); in imx_set_src_gpr_arg()
46 uint32_t imx_get_src_gpr_entry(unsigned int cpu) in imx_get_src_gpr_entry() argument
50 return io_read32(va + SRC_GPR1 + ENTRY_OFFSET(cpu)); in imx_get_src_gpr_entry()
53 void imx_set_src_gpr_entry(unsigned int cpu, uint32_t val) in imx_set_src_gpr_entry() argument
57 io_write32(va + SRC_GPR1 + ENTRY_OFFSET(cpu), val); in imx_set_src_gpr_entry()
60 void imx_src_release_secondary_core(unsigned int cpu) in imx_src_release_secondary_core() argument
66 SRC_A7RCR1_A7_CORE1_ENABLE_BIT(cpu)); in imx_src_release_secondary_core()
68 io_setbits32(va + SRC_SCR, SRC_SCR_CORE1_ENABLE_BIT(cpu) | in imx_src_release_secondary_core()
69 SRC_SCR_CORE1_RST_BIT(cpu)); in imx_src_release_secondary_core()
72 void imx_src_shutdown_core(unsigned int cpu) in imx_src_shutdown_core() argument
78 SRC_A7RCR1_A7_CORE1_ENABLE_BIT(cpu)); in imx_src_shutdown_core()
82 mask &= ~SRC_SCR_CORE1_ENABLE_BIT(cpu); in imx_src_shutdown_core()
83 mask |= SRC_SCR_CORE1_RST_BIT(cpu); in imx_src_shutdown_core()