1*c16aaf42SClement Faure /* SPDX-License-Identifier: BSD-2-Clause */ 2*c16aaf42SClement Faure /* 3*c16aaf42SClement Faure * Copyright 2023 NXP 4*c16aaf42SClement Faure */ 5*c16aaf42SClement Faure 6*c16aaf42SClement Faure #include <stdint.h> 7*c16aaf42SClement Faure 8*c16aaf42SClement Faure /* 9*c16aaf42SClement Faure * Read the SRC GPR ARG register for the given core number 10*c16aaf42SClement Faure * @cpu Core number 11*c16aaf42SClement Faure */ 12*c16aaf42SClement Faure uint32_t imx_get_src_gpr_arg(unsigned int cpu); 13*c16aaf42SClement Faure 14*c16aaf42SClement Faure /* 15*c16aaf42SClement Faure * Set the SRC GPR ARG register for the given core number 16*c16aaf42SClement Faure * @cpu Core number 17*c16aaf42SClement Faure * @val Register value to set 18*c16aaf42SClement Faure */ 19*c16aaf42SClement Faure void imx_set_src_gpr_arg(unsigned int cpu, uint32_t val); 20*c16aaf42SClement Faure 21*c16aaf42SClement Faure /* 22*c16aaf42SClement Faure * Read the SRC GPR ENTRY register for the given core number 23*c16aaf42SClement Faure * @cpu Core number 24*c16aaf42SClement Faure */ 25*c16aaf42SClement Faure uint32_t imx_get_src_gpr_entry(unsigned int cpu); 26*c16aaf42SClement Faure 27*c16aaf42SClement Faure /* 28*c16aaf42SClement Faure * Set the SRC GPR ENTRY register for the given core number 29*c16aaf42SClement Faure * @cpu Core number 30*c16aaf42SClement Faure * @val Register value to set 31*c16aaf42SClement Faure */ 32*c16aaf42SClement Faure void imx_set_src_gpr_entry(unsigned int cpu, uint32_t val); 33*c16aaf42SClement Faure 34*c16aaf42SClement Faure /* 35*c16aaf42SClement Faure * Release the given core 36*c16aaf42SClement Faure * @cpu Core number 37*c16aaf42SClement Faure */ 38*c16aaf42SClement Faure void imx_src_release_secondary_core(unsigned int cpu); 39*c16aaf42SClement Faure 40*c16aaf42SClement Faure /* 41*c16aaf42SClement Faure * Shutdown the given core 42*c16aaf42SClement Faure * @cpu Core number 43*c16aaf42SClement Faure */ 44*c16aaf42SClement Faure void imx_src_shutdown_core(unsigned int cpu); 45*c16aaf42SClement Faure 46*c16aaf42SClement Faure /* 47*c16aaf42SClement Faure * GPC Core 1 power down 48*c16aaf42SClement Faure */ 49*c16aaf42SClement Faure void imx_gpcv2_set_core1_pup_by_software(void); 50