plat-zynq7k: Configure platform needing NMFI workaround

Unfortunately Xilinx Zynq-7000's ARM Cortext-A9 core has been configured
with NMFI support. This causes problems for OP-TEE's atomic context
p

plat-zynq7k: Configure platform needing NMFI workaround

Unfortunately Xilinx Zynq-7000's ARM Cortext-A9 core has been configured
with NMFI support. This causes problems for OP-TEE's atomic context
protections rendering FIQ interrupt un-usable in the system designs.

Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: remove the unused PM stubs

Removes the PM stubs and all references to CFG_PM_STUBS.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.o

core: remove the unused PM stubs

Removes the PM stubs and all references to CFG_PM_STUBS.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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Move CFG_WITH_STACK_CANARIES to global config file

All platforms but one (bcm-ns3) set CFG_WITH_STACK_CANARIES ?= y in
their configuration files. Move this flag to the global mk/config.mk
instead. N

Move CFG_WITH_STACK_CANARIES to global config file

All platforms but one (bcm-ns3) set CFG_WITH_STACK_CANARIES ?= y in
their configuration files. Move this flag to the global mk/config.mk
instead. Not sure it matters much, but in order to avoid any functional
change, CFG_WITH_STACK_CANARIES ?= n is added to plat-bcm/conf.mk.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: make generic boot mandatory

The OP-TEE booting has since quite some time been unified in the sense
that all platforms use CFG_GENERIC_BOOT=y. Make this configuration option
mandatory and remov

core: make generic boot mandatory

The OP-TEE booting has since quite some time been unified in the sense
that all platforms use CFG_GENERIC_BOOT=y. Make this configuration option
mandatory and remove the CFG_GENERIC_BOOT flag.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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Factor out ta-targets from platform config

Platforms use the same basic pattern again and again:

ta-targets = ta_arm32
ifeq ($(CFG_ARM64_core),y)
ta-targets += ta_arm64
endif

Let's move this p

Factor out ta-targets from platform config

Platforms use the same basic pattern again and again:

ta-targets = ta_arm32
ifeq ($(CFG_ARM64_core),y)
ta-targets += ta_arm64
endif

Let's move this pattern to core/arch/arm/arm.mk, make it the default, and
cleanup the platform configuration files.

Suggested-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-*/conf.mk: use $(call force, ...) to set CFG_TEE_CORE_NB_CORE

Except for very special cases (such as virtualization), the number of CPU
cores that can enter OP-TEE is a fixed number that depend

plat-*/conf.mk: use $(call force, ...) to set CFG_TEE_CORE_NB_CORE

Except for very special cases (such as virtualization), the number of CPU
cores that can enter OP-TEE is a fixed number that depends on the hardware
configuration and should not be configurable at build time.
Therefore, use $(call force,CFG_TEE_CORE_NB_CORE,<value>) to set the
value.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-zynq7k: move some CFG_'s from platform_config.h to conf.mk

Legacy zyn7k does not allow reconfiguring the memory layout, hence
internal labels used are local: discard CFG_DDR_TEETZ_RESERVED_STAR

plat-zynq7k: move some CFG_'s from platform_config.h to conf.mk

Legacy zyn7k does not allow reconfiguring the memory layout, hence
internal labels used are local: discard CFG_DDR_TEETZ_RESERVED_START
CFG_DDR_TEETZ_RESERVED_SIZE, CFG_CORE_TZSRAM_EMUL_START in favor
of hardcoded addresses.

Discard local CFG_PUB_RAM_SIZE in favor to TEE_SHMEM_START/SIZE.

Remove useless DRAM0_BASE/_SIZE, DDR_PHYS_START, DDR_SIZE and
CFG_DDR_START/_SIZE.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Yan Yan <yan.yan@windriver.com>

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core: arm32: enable NEON with .fpu directive rather than compile flag

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (QEMU CF

core: arm32: enable NEON with .fpu directive rather than compile flag

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (QEMU CFG_WITH_VFP=y)
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey960 AArch32 {,pager})
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: default enable CFG_ENABLE_SCTLR_RR for some ARMv7 cores

Some platforms could benefit from CFG_ENABLE_SCTLR_RR according to
their current implementation.

Updated platforms are stm-(cannes2|b22

core: default enable CFG_ENABLE_SCTLR_RR for some ARMv7 cores

Some platforms could benefit from CFG_ENABLE_SCTLR_RR according to
their current implementation.

Updated platforms are stm-(cannes2|b2260), several mx6-*sabre*
mx6-(qsabrelite|qsabresd|dlsabresd) (CFG_MX6Q/_MX6D/_MX6DL/_MX6S)
and zynq-zc702.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: factorize cpu support

Create core/arch/arm/cpu/<cpu-name>.mk to store CPU generic configurations
settings. Update supported platforms to rely on the generic CPU support.

Platform shall still

core: factorize cpu support

Create core/arch/arm/cpu/<cpu-name>.mk to store CPU generic configurations
settings. Update supported platforms to rely on the generic CPU support.

Platform shall still specify whether they support or not the NEON
extension.

Cortex-A53 and Cortex-A57 are all ARMv8.0 compliant. For ARMv8 core,
we will use ARMv8-A architecture minor version configuration files.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: arm: support Xilinx ZYNQ7000 ZC702 (plat-zynq7k)

Signed-off-by: Yan Yan <yan.yan@windriver.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wi

core: arm: support Xilinx ZYNQ7000 ZC702 (plat-zynq7k)

Signed-off-by: Yan Yan <yan.yan@windriver.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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