| /optee_os/core/arch/arm/plat-marvell/ |
| H A D | platform_config.h | 70 #define GICD_OFFSET 0x0 macro
72 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
101 #define GICD_OFFSET (0x0) macro
103 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
120 #define GICD_OFFSET (0x0) macro
122 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
142 #define GICD_OFFSET 0x0 macro
144 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
159 #define GICD_OFFSET 0x0 macro
161 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
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| /optee_os/core/arch/arm/plat-ls/ |
| H A D | platform_config.h | 46 #define GICD_OFFSET 0x1000 macro
69 #define GICD_OFFSET 0x10000 macro
79 #define GICD_OFFSET 0x0 macro
89 #define GICD_OFFSET 0x0 macro
99 #define GICD_OFFSET 0x0 macro
109 #define GICD_OFFSET 0x0 macro
119 #define GICD_OFFSET 0x0 macro
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| /optee_os/core/arch/arm/plat-mediatek/ |
| H A D | platform_config.h | 24 #define GICD_OFFSET 0x1000 macro
42 #define GICD_OFFSET 0x0 macro
56 #define GICD_OFFSET 0x00000 macro
70 #define GICD_OFFSET 0x0 macro
84 #define GICD_OFFSET 0x0 macro
98 #define GICD_OFFSET 0x0 macro
112 #define GICD_OFFSET 0x000000 macro
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| H A D | main.c | 25 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GIC_BASE + GICD_OFFSET,
32 gic_init(GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET); in boot_primary_init_intc()
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| /optee_os/core/arch/arm/plat-vexpress/ |
| H A D | platform_config.h | 110 #define GICD_OFFSET 0x3000000 macro
128 #define GICD_OFFSET 0 macro
138 #define GICD_OFFSET 0 macro
143 #define GICD_OFFSET 0 macro
151 #define GICD_OFFSET 0 macro
159 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
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| /optee_os/core/arch/arm/plat-corstone1000/ |
| H A D | platform_config.h | 30 #define GICD_OFFSET 0x00000 macro
33 #define GICD_OFFSET 0x10000 macro
42 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
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| /optee_os/core/arch/arm/plat-ti/ |
| H A D | platform_config.h | 42 #define GICD_OFFSET 0x1000 macro
45 #define GICD_BASE (SCU_BASE + GICD_OFFSET)
74 #define GICD_OFFSET 0x1000 macro
80 #define GICD_BASE (SCU_BASE + GICD_OFFSET)
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| /optee_os/core/arch/arm/plat-rzn1/ |
| H A D | platform_config.h | 18 #define GICD_OFFSET 0x1000 macro
20 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
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| /optee_os/core/arch/arm/plat-nuvoton/ |
| H A D | platform_config.h | 20 #define GICD_OFFSET 0x1000 macro
22 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
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| /optee_os/core/arch/arm/plat-sprd/ |
| H A D | main.c | 45 ROUNDDOWN(GIC_BASE + GICD_OFFSET, CORE_MMU_PGDIR_SIZE),
50 gic_init(GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET); in boot_primary_init_intc()
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| H A D | platform_config.h | 61 #define GICD_OFFSET 0x1000 macro
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| /optee_os/core/arch/arm/plat-totalcompute/ |
| H A D | platform_config.h | 19 #define GICD_OFFSET 0x0 macro
42 #define GICD_BASE (GIC_BASE + GICD_OFFSET)
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| /optee_os/core/arch/arm/plat-k3/ |
| H A D | platform_config.h | 28 #define GICD_OFFSET 0x0 macro
33 #define GICD_OFFSET 0x0 macro
73 #define GICD_BASE (SCU_BASE + GICD_OFFSET)
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| /optee_os/core/arch/arm/plat-uniphier/ |
| H A D | main.c | 26 ROUNDDOWN(GIC_BASE + GICD_OFFSET, CORE_MMU_PGDIR_SIZE),
40 gic_init(GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET); in boot_primary_init_intc()
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| H A D | platform_config.h | 17 #define GICD_OFFSET 0 macro
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| /optee_os/core/arch/arm/plat-zynqmp/ |
| H A D | main.c | 60 ROUNDDOWN(GIC_BASE + GICD_OFFSET, CORE_MMU_PGDIR_SIZE),
80 gic_init(GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET); in boot_primary_init_intc()
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| /optee_os/core/arch/arm/plat-zynq7k/ |
| H A D | platform_config.h | 40 #define GICD_OFFSET 0x1000 macro
42 #define GIC_DIST_BASE (GIC_BASE + GICD_OFFSET)
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| /optee_os/core/arch/arm/plat-versal/ |
| H A D | main.c | 38 GIC_BASE + GICD_OFFSET, CORE_MMU_PGDIR_SIZE);
51 gic_init(GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET); in boot_primary_init_intc()
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| H A D | platform_config.h | 44 #define GICD_OFFSET 0 macro
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| /optee_os/core/arch/arm/plat-imx/registers/ |
| H A D | imx6.h | 86 #define GICD_OFFSET 0x1000 macro
101 #define GIC_DIST_BASE (GIC_BASE + GICD_OFFSET)
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| /optee_os/core/arch/arm/plat-aspeed/ |
| H A D | platform_ast2600.c | 47 register_phys_mem(MEM_AREA_IO_SEC, GIC_BASE + GICD_OFFSET, GIC_DIST_REG_SIZE);
65 gic_init(GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET); in boot_primary_init_intc()
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| H A D | platform_config.h | 17 #define GICD_OFFSET 0x1000 macro
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| /optee_os/core/arch/arm/plat-amlogic/ |
| H A D | platform_config.h | 16 #define GICD_OFFSET 0x1000 macro
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| /optee_os/core/arch/arm/plat-synquacer/ |
| H A D | platform_config.h | 14 #define GICD_OFFSET 0x0 macro
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| /optee_os/core/arch/arm/plat-sunxi/ |
| H A D | platform_config.h | 48 #define GICD_OFFSET 0x1000 macro
|