| #
a9690ae3 |
| 01-Aug-2025 |
T Pratham <t-pratham@ti.com> |
plat-k3: drivers: Add TRNG driver support in AM62L
AM62L contains the EIP76D TRNG IP which was also present in the previous K3 devices inside the SA2UL accelerator, so the same driver is being re-us
plat-k3: drivers: Add TRNG driver support in AM62L
AM62L contains the EIP76D TRNG IP which was also present in the previous K3 devices inside the SA2UL accelerator, so the same driver is being re-used here. But the AM62L does not have SA2UL. The SoC specific configurations are being set here for AM62L for enabling TRNG.
Signed-off-by: T Pratham <t-pratham@ti.com> Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
405395c4 |
| 01-Aug-2025 |
T Pratham <t-pratham@ti.com> |
plat-k3: drivers: Move RNG platform error from SA2UL to RNG defines
The error define for RNG base address being not defined for a platform when software PRNG is disabled, is currently handled as a c
plat-k3: drivers: Move RNG platform error from SA2UL to RNG defines
The error define for RNG base address being not defined for a platform when software PRNG is disabled, is currently handled as a case with SA2UL platform config definitions. This is not appropriate as RNG is not needed to be tied up to SA2UL. Moving it to be placed with RNG platform configs where it is more apt.
Signed-off-by: T Pratham <t-pratham@ti.com> Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| #
58ad77ff |
| 23-Apr-2025 |
Bryan Brattlof <bb@ti.com> |
plat-k3: drivers: add platform flavors for 62A and 62P devices
Even though the SA2UL integration on the AM62Ax and AM62Px platforms are functionally identical to the AM62x platforms many, when build
plat-k3: drivers: add platform flavors for 62A and 62P devices
Even though the SA2UL integration on the AM62Ax and AM62Px platforms are functionally identical to the AM62x platforms many, when building OP-TEE manually, are using the platform name they are building for and not 'am62x' which leaves SA2UL_BASE undefined and to failed builds:
In file included from core/include/mm/core_memprot.h:9, from core/include/kernel/interrupt.h:10, from core/arch/arm/plat-k3/drivers/sa2ul_rng.c:12: core/arch/arm/plat-k3/./platform_config.h:91:34: error: ‘SA2UL_BASE’ undeclared here (not in a function); did you mean ‘SCU_BASE’? 91 | #define RNG_BASE (SA2UL_BASE + 0x10000) | ^~~~~~~~~~
For now let's just define the AM62Ax and AM62Px platform flavors identical to how AM62x is defined and include an #else statement to catch when a undefined platform flavor tries to build the SA2UL driver
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Andrew Davis <afd@ti.com> Signed-off-by: Bryan Brattlof <bb@ti.com>
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| #
fd9d3986 |
| 02-Jan-2023 |
Manorit Chawdhry <m-chawdhry@ti.com> |
plat-k3: Increase size of high DDR memory region
With the addition of j784s4 in K3 devices, DRAM size is increased to 32GB.
Update the size of higher memory addresses to handle this.
Signed-off-by
plat-k3: Increase size of high DDR memory region
With the addition of j784s4 in K3 devices, DRAM size is increased to 32GB.
Update the size of higher memory addresses to handle this.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Acked-by: Andrew Davis <afd@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
d6c5d003 |
| 20-Oct-2022 |
Kamlesh Gurudasani <kamlesh@ti.com> |
plat-k3: am62x: add SA2UL and TRNG support
Add SA2UL and TRNG support for TI SoC AM62X through OP-TEE.
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com> Acked-by: Jerome Forissier <jerome.forissie
plat-k3: am62x: add SA2UL and TRNG support
Add SA2UL and TRNG support for TI SoC AM62X through OP-TEE.
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
e48bcda2 |
| 06-Oct-2022 |
Jayesh Choudhary <j-choudhary@ti.com> |
plat-k3: Add support for j784s4 platform
Add SA2UL and TRNG support for TI SoC J784S4 through OP-TEE.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Acked-by: Andrew Davis <afd@ti.com> Acked-
plat-k3: Add support for j784s4 platform
Add SA2UL and TRNG support for TI SoC J784S4 through OP-TEE.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Acked-by: Andrew Davis <afd@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> [jf: wrap line >80 characters] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
0a4589e6 |
| 18-Aug-2022 |
Andrew Davis <afd@ti.com> |
plat-k3: Add high DDR memory region
K3 devices support more than 2GB of DRAM, the extra is placed at a highmem address of 0x880000000. If memory from this area is passed to OP-TEE one will get the f
plat-k3: Add high DDR memory region
K3 devices support more than 2GB of DRAM, the extra is placed at a highmem address of 0x880000000. If memory from this area is passed to OP-TEE one will get the following error:
E/TC:1 0 std_entry_with_parg:235 Bad arg address 0x881585000
Add the highmem area to fix this.
Fixes: dfd994436ac3 ("plat-k3: Add DDR setup in k3 platform") Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
69e8ed5e |
| 28-Jun-2022 |
Andrew Davis <afd@ti.com> |
plat-k3: drivers: Disable SA2UL RNG driver on unsupported flavors
Only enable the SA2UL TRNG on platform flavors that are currently supported. This can be relaxed for platforms as support is verifie
plat-k3: drivers: Disable SA2UL RNG driver on unsupported flavors
Only enable the SA2UL TRNG on platform flavors that are currently supported. This can be relaxed for platforms as support is verified.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
bf9dfcc2 |
| 03-May-2022 |
Andrew Davis <afd@ti.com> |
plat-k3: drivers: Add SA2UL RNG driver
TI K3 family devices contain a set of crypto accelerators under the umbrella device SA2UL. Add support for setting up the power and firewalls for this device.
plat-k3: drivers: Add SA2UL RNG driver
TI K3 family devices contain a set of crypto accelerators under the umbrella device SA2UL. Add support for setting up the power and firewalls for this device. Then add support for the TRNG sub-device.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
dfd99443 |
| 12-May-2022 |
Ivan Mikhaylov <ivan.mikhaylov@siemens.com> |
plat-k3: Add DDR setup in k3 platform
This patch introduces DDR setup for possible use of CFG_CORE_DYN_SHM/dynamic shared memory on k3 platform.
Acked-by: Jerome Forissier <jerome.forissier@linaro.
plat-k3: Add DDR setup in k3 platform
This patch introduces DDR setup for possible use of CFG_CORE_DYN_SHM/dynamic shared memory on k3 platform.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Manorit Chawdhry <m-chawdhry@ti.com> Signed-off-by: Ivan Mikhaylov <ivan.mikhaylov@siemens.com>
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| #
cf20f0a4 |
| 03-Mar-2022 |
Manorit Chawdhry <m-chawdhry@ti.com> |
plat-k3: drivers: Add secure proxy driver for communication with System Controller
Secure Proxy is a communication scheme in Texas Instrument's devices intended to provide an unique communication pa
plat-k3: drivers: Add secure proxy driver for communication with System Controller
Secure Proxy is a communication scheme in Texas Instrument's devices intended to provide an unique communication path from various processors in the System on Chip(SoC) to a central System Controller.
Secure Proxy instance exposes "threads" or "proxies" which is primary representation of "a" communication channel. Each thread is preconfigured by System controller configuration based on SoC usage requirements. Secure proxy by itself represents a single "queue" of communication but allows the proxies to be independently operated.
For communication with TISCI, Secure Proxy driver is required in OP-TEE.
NOTE: Secure proxy configuration is only done by System Controller, hence these are assumed to be pre-configured instances.
Provide the driver support for Secure Proxy and thread instances.
Tested on AM65x.
See AM65x Technical Reference Manual (SPRUID7E, April 2018) for further details: https://www.ti.com/lit/ug/spruid7e/spruid7e.pdf
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Acked-by: Andrew Davis <afd@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
05beeff0 |
| 20-May-2020 |
Jan Kiszka <jan.kiszka@siemens.com> |
plat-k3: Make UART number configurable via CFG_CONSOLE_UART
This is analogous to plat-hikey and allows to select a different console UART for the k3 platform as well during build. This is needed to
plat-k3: Make UART number configurable via CFG_CONSOLE_UART
This is analogous to plat-hikey and allows to select a different console UART for the k3 platform as well during build. This is needed to enable support for the IOT2050 device which uses the second UART.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Jerome Forissier <jerome@forissier.org> Acked-by: Andrew F. Davis <afd@ti.com>
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| #
87613cf9 |
| 04-Jun-2019 |
Andrew F. Davis <afd@ti.com> |
plat-k3: Add J721E device support
The only difference from AM65x that OP-TEE cares about currently is the GICC offset and size. Update the same.
Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by
plat-k3: Add J721E device support
The only difference from AM65x that OP-TEE cares about currently is the GICC offset and size. Update the same.
Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
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| #
940a2437 |
| 14-Nov-2016 |
Andrew F. Davis <afd@ti.com> |
Add new platform for the TI K3 class of SoCs
Add platform 'k3' for the TI K3 family. These are ARMv8 devices and are quite different from our line of existing ARMv7 OMAP style SoCs, hence the new pl
Add new platform for the TI K3 class of SoCs
Add platform 'k3' for the TI K3 family. These are ARMv8 devices and are quite different from our line of existing ARMv7 OMAP style SoCs, hence the new platform.
Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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