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Searched refs:phy_read (Results 1 – 25 of 138) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/net/ethernet/ibm/emac/
H A Dphy.c32 #define phy_read _phy_read macro
60 val = phy_read(phy, MII_BMCR); in emac_mii_reset_phy()
68 val = phy_read(phy, MII_BMCR); in emac_mii_reset_phy()
120 ctl = phy_read(phy, MII_BMCR); in genmii_setup_aneg()
129 adv = phy_read(phy, MII_ADVERTISE); in genmii_setup_aneg()
150 adv = phy_read(phy, MII_CTRL1000); in genmii_setup_aneg()
162 ctl = phy_read(phy, MII_BMCR); in genmii_setup_aneg()
178 ctl = phy_read(phy, MII_BMCR); in genmii_setup_forced()
211 phy_read(phy, MII_BMSR); in genmii_poll_link()
212 status = phy_read(phy, MII_BMSR); in genmii_poll_link()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/phy/
H A Dlxt.c63 err = phy_read(phydev, MII_BMSR); in lxt970_ack_interrupt()
68 err = phy_read(phydev, MII_LXT970_ISR); in lxt970_ack_interrupt()
92 int err = phy_read(phydev, MII_LXT971_ISR); in lxt971_ack_interrupt()
120 status = phy_read(phydev, MII_BMSR); in lxt973a2_update_link()
125 control = phy_read(phydev, MII_BMCR); in lxt973a2_update_link()
131 status = phy_read(phydev, MII_BMSR); in lxt973a2_update_link()
159 adv = phy_read(phydev, MII_ADVERTISE); in lxt973a2_read_status()
165 lpa = phy_read(phydev, MII_LPA); in lxt973a2_read_status()
208 int val = phy_read(phydev, MII_LXT973_PCR); in lxt973_probe()
215 val = phy_read(phydev, MII_BMCR); in lxt973_probe()
H A Dat803x.c173 return phy_read(phydev, AT803X_DEBUG_DATA); in at803x_debug_reg_read()
221 context->bmcr = phy_read(phydev, MII_BMCR); in at803x_context_save()
222 context->advertise = phy_read(phydev, MII_ADVERTISE); in at803x_context_save()
223 context->control1000 = phy_read(phydev, MII_CTRL1000); in at803x_context_save()
224 context->int_enable = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_context_save()
225 context->smart_speed = phy_read(phydev, AT803X_SMART_SPEED); in at803x_context_save()
226 context->led_control = phy_read(phydev, AT803X_LED_CONTROL); in at803x_context_save()
267 value = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_set_wol()
272 value = phy_read(phydev, AT803X_INTR_STATUS); in at803x_set_wol()
274 value = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_set_wol()
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H A Ddp83tc811.c82 err = phy_read(phydev, MII_DP83811_INT_STAT1); in dp83811_ack_interrupt()
86 err = phy_read(phydev, MII_DP83811_INT_STAT2); in dp83811_ack_interrupt()
90 err = phy_read(phydev, MII_DP83811_INT_STAT3); in dp83811_ack_interrupt()
143 phy_read(phydev, MII_DP83811_INT_STAT1); in dp83811_set_wol()
200 misr_status = phy_read(phydev, MII_DP83811_INT_STAT1); in dp83811_config_intr()
217 misr_status = phy_read(phydev, MII_DP83811_INT_STAT2); in dp83811_config_intr()
232 misr_status = phy_read(phydev, MII_DP83811_INT_STAT3); in dp83811_config_intr()
262 value = phy_read(phydev, MII_DP83811_SGMII_CTRL); in dp83811_config_aneg()
283 value = phy_read(phydev, MII_DP83811_SGMII_CTRL); in dp83811_config_init()
H A Dbcm87xx.c61 val = phy_read(phydev, regnum); in bcm87xx_of_reg_init()
107 rx_signal_detect = phy_read(phydev, BCM87XX_PMD_RX_SIGNAL_DETECT); in bcm87xx_read_status()
114 pcs_status = phy_read(phydev, BCM87XX_10GBASER_PCS_STATUS); in bcm87xx_read_status()
121 xgxs_lane_status = phy_read(phydev, BCM87XX_XGXS_LANE_STATUS); in bcm87xx_read_status()
142 reg = phy_read(phydev, BCM87XX_LASI_CONTROL); in bcm87xx_config_intr()
160 reg = phy_read(phydev, BCM87XX_LASI_STATUS); in bcm87xx_did_interrupt()
H A Dsmsc.c70 int rc = phy_read (phydev, MII_LAN83C185_ISF); in smsc_phy_ack_interrupt()
83 rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS); in smsc_phy_config_init()
99 int rc = phy_read(phydev, MII_LAN83C185_SPECIAL_MODES); in smsc_phy_reset()
141 rc = phy_read(phydev, SPECIAL_CTRL_STS); in lan87xx_config_aneg()
163 rc = phy_read(phydev, PHY_EDPD_CONFIG); in lan95xx_config_aneg_ext()
189 int rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS); in lan87xx_read_status()
201 read_poll_timeout(phy_read, rc, in lan87xx_read_status()
209 rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS); in lan87xx_read_status()
243 val = phy_read(phydev, stat.reg); in smsc_get_stat()
H A Dicplus.c124 bmcr = phy_read(phydev, MII_BMCR); in ip1xx_reset()
133 bmcr = phy_read(phydev, MII_BMCR); in ip1xx_reset()
150 c = phy_read(phydev, IP1001_SPEC_CTRL_STATUS_2); in ip1001_config_init()
160 c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS); in ip1001_config_init()
269 c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS); in ip101a_g_config_init()
290 int val = phy_read(phydev, IP101A_G_IRQ_CONF_STATUS); in ip101a_g_did_interrupt()
302 int err = phy_read(phydev, IP101A_G_IRQ_CONF_STATUS); in ip101a_g_ack_interrupt()
H A Dmotorcomm.c226 val = phy_read(phydev, MII_BMCR); in ytphy_soft_reset()
273 val = phy_read(phydev, MII_BMCR); in yt8512_clk_init()
355 val = phy_read(phydev, REG_PHY_SPEC_STATUS); in yt8512_read_status()
527 link_fiber = !!(phy_read(phydev, REG_PHY_SPEC_STATUS) & (BIT(YT8521_LINK_STATUS_BIT))); in yt8521_aneg_done()
532 link_utp = !!(phy_read(phydev, REG_PHY_SPEC_STATUS) & (BIT(YT8521_LINK_STATUS_BIT))); in yt8521_aneg_done()
553 val = phy_read(phydev, REG_PHY_SPEC_STATUS); in yt8521_read_status()
572 val = phy_read(phydev, REG_PHY_SPEC_STATUS); in yt8521_read_status()
582 yt8521_fiber_latch_val = phy_read(phydev, MII_BMSR); in yt8521_read_status()
583 yt8521_fiber_curr_val = phy_read(phydev, MII_BMSR); in yt8521_read_status()
631 value = phy_read(phydev, MII_BMCR); in yt8521_suspend()
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H A Dste10Xp.c35 value = phy_read(phydev, MII_BMCR); in ste10Xp_config_init()
45 value = phy_read(phydev, MII_BMCR); in ste10Xp_config_init()
60 value = phy_read(phydev, MII_XCIIS); in ste10Xp_config_intr()
72 int err = phy_read(phydev, MII_XCIIS); in ste10Xp_ack_interrupt()
H A Dnxp-tja11xx.c132 ret = phy_read(phydev, MII_ECTRL); in tja11xx_wakeup()
295 ret = phy_read(phydev, MII_INTSRC); in tja11xx_config_init()
313 ret = phy_read(phydev, MII_CFG1); in tja11xx_read_status()
323 ret = phy_read(phydev, MII_COMMSTAT); in tja11xx_read_status()
338 ret = phy_read(phydev, MII_COMMSTAT); in tja11xx_get_sqi()
371 ret = phy_read(phydev, tja11xx_hw_stats[i].reg); in tja11xx_get_stats()
389 ret = phy_read(phydev, MII_INTSRC); in tja11xx_hwmon_read()
398 ret = phy_read(phydev, MII_INTSRC); in tja11xx_hwmon_read()
565 ret = phy_read(phydev, MII_PHYSID2); in tja1102_match_phy_device()
592 ret = phy_read(phydev, MII_INTSRC); in tja11xx_ack_interrupt()
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H A Ddp83822.c126 err = phy_read(phydev, MII_DP83822_MISR1); in dp83822_ack_interrupt()
130 err = phy_read(phydev, MII_DP83822_MISR2); in dp83822_ack_interrupt()
183 phy_read(phydev, MII_DP83822_MISR2); in dp83822_set_wol()
242 misr_status = phy_read(phydev, MII_DP83822_MISR1); in dp83822_config_intr()
260 misr_status = phy_read(phydev, MII_DP83822_MISR2); in dp83822_config_intr()
278 physcr_status = phy_read(phydev, MII_DP83822_PHYSCR); in dp83822_config_intr()
293 physcr_status = phy_read(phydev, MII_DP83822_PHYSCR); in dp83822_config_intr()
313 int status = phy_read(phydev, MII_DP83822_PHYSTS); in dp83822_read_status()
322 ctrl2 = phy_read(phydev, MII_DP83822_CTRL_2); in dp83822_read_status()
413 bmcr = phy_read(phydev, MII_BMCR); in dp83822_config_init()
H A Drk630phy.c125 value = phy_read(phydev, REG_GLOBAL_CONFIGURATION); in rk630_phy_wol_enable()
131 value = phy_read(phydev, REG_INTERRUPT_MASK); in rk630_phy_wol_enable()
142 value = phy_read(phydev, REG_GLOBAL_CONFIGURATION); in rk630_phy_wol_disable()
153 value = phy_read(phydev, REG_PAGE1_EEE_CONFIGURE); in rk630_phy_ieee_set()
169 value = phy_read(phydev, REG_PAGE1_APS_CTRL); in rk630_phy_set_aps()
185 value = phy_read(phydev, REG_PAGE1_UAPS_CONFIGURE); in rk630_phy_set_uaps()
197 phy_write(phydev, 0, phy_read(phydev, 0) & ~BIT(13)); in rk630_phy_s40_config_init()
315 val = phy_read(phydev, REG_PAGE6_AFE_TX_CTRL); in rk630_link_change_notify()
H A Dqsemi.c78 err = phy_read(phydev, MII_QS6612_ISR); in qs6612_ack_interrupt()
83 err = phy_read(phydev, MII_BMSR); in qs6612_ack_interrupt()
88 err = phy_read(phydev, MII_EXPANSION); in qs6612_ack_interrupt()
H A Det1011c.c50 ctl = phy_read(phydev, MII_BMCR); in et1011c_config_aneg()
70 val = phy_read(phydev, ET1011C_STATUS_REG); in et1011c_read_status()
73 val = phy_read(phydev, ET1011C_CONFIG_REG); in et1011c_read_status()
H A DuPD60620.c40 phy_state = phy_read(phydev, MII_BMSR); in upd60620_read_status()
50 phy_state = phy_read(phydev, PHY_PHYSCR); in upd60620_read_status()
64 phy_state = phy_read(phydev, MII_LPA); in upd60620_read_status()
/OK3568_Linux_fs/u-boot/drivers/net/phy/
H A Dvitesse.c89 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_CIS82xx_AUX_CONSTAT); in vitesse_parse_status()
149 ret = phy_read(phydev, MDIO_DEVAD_NONE, MII_VSC8601_EPHY_CTL); in vsc8601_add_skew()
177 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL19); in vsc8574_config()
194 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL18); in vsc8574_config()
197 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL18); in vsc8574_config()
202 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_MAC_SERDES_CON); in vsc8574_config()
222 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL19); in vsc8514_config()
237 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL18); in vsc8514_config()
240 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL18); in vsc8514_config()
250 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_GENERAL23); in vsc8514_config()
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H A Dmarvell.c134 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1xxx_PHY_STATUS); in m88e1xxx_parse_status()
152 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, in m88e1xxx_parse_status()
203 reg = phy_read(phydev, in m88e1111s_config()
219 reg = phy_read(phydev, in m88e1111s_config()
234 reg = phy_read(phydev, in m88e1111s_config()
246 reg = phy_read(phydev, in m88e1111s_config()
252 reg = phy_read(phydev, MDIO_DEVAD_NONE, in m88e1111s_config()
263 reg = phy_read(phydev, MDIO_DEVAD_NONE, in m88e1111s_config()
295 reg = phy_read(phydev, MDIO_DEVAD_NONE, reg_num); in m88e1518_phy_writebits()
344 reg = phy_read(phydev, MDIO_DEVAD_NONE, in m88e1518_config()
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H A Dmscc.c149 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_17); in mscc_vsc8531_vsc8541_init_scripts()
163 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_18); in mscc_vsc8531_vsc8541_init_scripts()
177 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_18); in mscc_vsc8531_vsc8541_init_scripts()
183 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MSCC_PHY_REG_TR_DATA_17); in mscc_vsc8531_vsc8541_init_scripts()
204 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_AUX_CNTRL_STAT_REG); in mscc_parse_status()
253 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in mscc_phy_soft_reset()
256 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in mscc_phy_soft_reset()
259 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in mscc_phy_soft_reset()
314 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, in vsc8531_vsc8541_mac_config()
326 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, in vsc8531_vsc8541_mac_config()
[all …]
H A Dphy.c49 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); in genphy_config_advert()
82 bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in genphy_config_advert()
94 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000); in genphy_config_advert()
157 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in genphy_restart_aneg()
196 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in genphy_config_aneg()
229 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in genphy_update_link()
264 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in genphy_update_link()
270 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in genphy_update_link()
292 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); in genphy_parse_link()
306 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000); in genphy_parse_link()
[all …]
H A Dgeneric_10g.c43 phy_read(phydev, devad, MDIO_STAT1); in gen10g_startup()
44 reg = phy_read(phydev, devad, MDIO_STAT1); in gen10g_startup()
60 stat2 = phy_read(phydev, mmd, MDIO_STAT2); in gen10g_discover_mmds()
66 devs1 = phy_read(phydev, mmd, MDIO_DEVS1); in gen10g_discover_mmds()
67 devs2 = phy_read(phydev, mmd, MDIO_DEVS2); in gen10g_discover_mmds()
H A Daquantia.c24 u32 val = phy_read(phydev, MDIO_MMD_PMAPMD, MII_BMCR); in aquantia_config()
69 phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1); in aquantia_startup()
70 reg = phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1); in aquantia_startup()
76 reg = phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1); in aquantia_startup()
88 phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1); in aquantia_startup()
89 reg = phy_read(phydev, MDIO_MMD_AN, MDIO_STAT1); in aquantia_startup()
95 speed = phy_read(phydev, MDIO_MMD_PMAPMD, MII_BMCR); in aquantia_startup()
H A Drealtek.c77 reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000); in rtl8211x_config()
85 phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER); in rtl8211x_config()
100 reg = phy_read(phydev, MDIO_DEVAD_NONE, 0x11); in rtl8211f_config()
131 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_STATUS); in rtl8211x_parse_status()
150 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, in rtl8211x_parse_status()
190 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PHY_STATUS); in rtl8211f_parse_status()
203 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, in rtl8211f_parse_status()
H A Dbroadcom.c46 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL); in bcm_phy_write_misc()
70 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXSTATUS); in bcm54xx_parse_status()
130 return (phy_read(phydev, MDIO_DEVAD_NONE, reg) & 0x8FFF) | 0x8010; in bcm5482_read_wirespeed()
138 reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in bcm5482_config()
237 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA); in bcm5482_is_serdes()
273 val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA); in bcm5482_parse_serdes_sr()
H A Det1011c.c31 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); in et1011c_config()
47 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, ET1011C_STATUS_REG); in et1011c_parse_status()
58 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, ET1011C_CONFIG_REG); in et1011c_parse_status()
/OK3568_Linux_fs/kernel/arch/powerpc/platforms/85xx/
H A Dmpc85xx_mds.c70 scr = phy_read(phydev, MV88E1111_SCR); in mpc8568_fixup_125_clock()
85 scr = phy_read(phydev, MV88E1111_SCR); in mpc8568_fixup_125_clock()
106 temp = phy_read(phydev, 30); in mpc8568_mds_phy_fixups()
122 temp = phy_read(phydev, 30); in mpc8568_mds_phy_fixups()
127 temp = phy_read(phydev, 30); in mpc8568_mds_phy_fixups()
140 temp = phy_read(phydev, 16); in mpc8568_mds_phy_fixups()

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