1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * drivers/net/phy/et1011c.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Driver for LSI ET1011C PHYs
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Chaithrika U S
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Copyright (c) 2008 Texas Instruments
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/string.h>
13*4882a593Smuzhiyun #include <linux/errno.h>
14*4882a593Smuzhiyun #include <linux/unistd.h>
15*4882a593Smuzhiyun #include <linux/interrupt.h>
16*4882a593Smuzhiyun #include <linux/init.h>
17*4882a593Smuzhiyun #include <linux/delay.h>
18*4882a593Smuzhiyun #include <linux/netdevice.h>
19*4882a593Smuzhiyun #include <linux/etherdevice.h>
20*4882a593Smuzhiyun #include <linux/skbuff.h>
21*4882a593Smuzhiyun #include <linux/spinlock.h>
22*4882a593Smuzhiyun #include <linux/mm.h>
23*4882a593Smuzhiyun #include <linux/module.h>
24*4882a593Smuzhiyun #include <linux/mii.h>
25*4882a593Smuzhiyun #include <linux/ethtool.h>
26*4882a593Smuzhiyun #include <linux/phy.h>
27*4882a593Smuzhiyun #include <linux/io.h>
28*4882a593Smuzhiyun #include <linux/uaccess.h>
29*4882a593Smuzhiyun #include <asm/irq.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #define ET1011C_STATUS_REG (0x1A)
32*4882a593Smuzhiyun #define ET1011C_CONFIG_REG (0x16)
33*4882a593Smuzhiyun #define ET1011C_SPEED_MASK (0x0300)
34*4882a593Smuzhiyun #define ET1011C_GIGABIT_SPEED (0x0200)
35*4882a593Smuzhiyun #define ET1011C_TX_FIFO_MASK (0x3000)
36*4882a593Smuzhiyun #define ET1011C_TX_FIFO_DEPTH_8 (0x0000)
37*4882a593Smuzhiyun #define ET1011C_TX_FIFO_DEPTH_16 (0x1000)
38*4882a593Smuzhiyun #define ET1011C_INTERFACE_MASK (0x0007)
39*4882a593Smuzhiyun #define ET1011C_GMII_INTERFACE (0x0002)
40*4882a593Smuzhiyun #define ET1011C_SYS_CLK_EN (0x01 << 4)
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun MODULE_DESCRIPTION("LSI ET1011C PHY driver");
44*4882a593Smuzhiyun MODULE_AUTHOR("Chaithrika U S");
45*4882a593Smuzhiyun MODULE_LICENSE("GPL");
46*4882a593Smuzhiyun
et1011c_config_aneg(struct phy_device * phydev)47*4882a593Smuzhiyun static int et1011c_config_aneg(struct phy_device *phydev)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun int ctl = 0;
50*4882a593Smuzhiyun ctl = phy_read(phydev, MII_BMCR);
51*4882a593Smuzhiyun if (ctl < 0)
52*4882a593Smuzhiyun return ctl;
53*4882a593Smuzhiyun ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 |
54*4882a593Smuzhiyun BMCR_ANENABLE);
55*4882a593Smuzhiyun /* First clear the PHY */
56*4882a593Smuzhiyun phy_write(phydev, MII_BMCR, ctl | BMCR_RESET);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun return genphy_config_aneg(phydev);
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
et1011c_read_status(struct phy_device * phydev)61*4882a593Smuzhiyun static int et1011c_read_status(struct phy_device *phydev)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun int ret;
64*4882a593Smuzhiyun u32 val;
65*4882a593Smuzhiyun static int speed;
66*4882a593Smuzhiyun ret = genphy_read_status(phydev);
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun if (speed != phydev->speed) {
69*4882a593Smuzhiyun speed = phydev->speed;
70*4882a593Smuzhiyun val = phy_read(phydev, ET1011C_STATUS_REG);
71*4882a593Smuzhiyun if ((val & ET1011C_SPEED_MASK) ==
72*4882a593Smuzhiyun ET1011C_GIGABIT_SPEED) {
73*4882a593Smuzhiyun val = phy_read(phydev, ET1011C_CONFIG_REG);
74*4882a593Smuzhiyun val &= ~ET1011C_TX_FIFO_MASK;
75*4882a593Smuzhiyun phy_write(phydev, ET1011C_CONFIG_REG, val\
76*4882a593Smuzhiyun | ET1011C_GMII_INTERFACE\
77*4882a593Smuzhiyun | ET1011C_SYS_CLK_EN\
78*4882a593Smuzhiyun | ET1011C_TX_FIFO_DEPTH_16);
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun return ret;
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun static struct phy_driver et1011c_driver[] = { {
86*4882a593Smuzhiyun .phy_id = 0x0282f014,
87*4882a593Smuzhiyun .name = "ET1011C",
88*4882a593Smuzhiyun .phy_id_mask = 0xfffffff0,
89*4882a593Smuzhiyun /* PHY_GBIT_FEATURES */
90*4882a593Smuzhiyun .config_aneg = et1011c_config_aneg,
91*4882a593Smuzhiyun .read_status = et1011c_read_status,
92*4882a593Smuzhiyun } };
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun module_phy_driver(et1011c_driver);
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun static struct mdio_device_id __maybe_unused et1011c_tbl[] = {
97*4882a593Smuzhiyun { 0x0282f014, 0xfffffff0 },
98*4882a593Smuzhiyun { }
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun MODULE_DEVICE_TABLE(mdio, et1011c_tbl);
102