xref: /OK3568_Linux_fs/kernel/drivers/net/phy/smsc.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * drivers/net/phy/smsc.c
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Driver for SMSC PHYs
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author: Herbert Valerio Riedel
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * Copyright (c) 2006 Herbert Valerio Riedel <hvr@gnu.org>
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * Support added for SMSC LAN8187 and LAN8700 by steve.glendinning@shawell.net
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  */
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include <linux/clk.h>
16*4882a593Smuzhiyun #include <linux/kernel.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/mii.h>
19*4882a593Smuzhiyun #include <linux/ethtool.h>
20*4882a593Smuzhiyun #include <linux/of.h>
21*4882a593Smuzhiyun #include <linux/phy.h>
22*4882a593Smuzhiyun #include <linux/netdevice.h>
23*4882a593Smuzhiyun #include <linux/smscphy.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun /* Vendor-specific PHY Definitions */
26*4882a593Smuzhiyun /* EDPD NLP / crossover time configuration */
27*4882a593Smuzhiyun #define PHY_EDPD_CONFIG			16
28*4882a593Smuzhiyun #define PHY_EDPD_CONFIG_EXT_CROSSOVER_	0x0001
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun /* Control/Status Indication Register */
31*4882a593Smuzhiyun #define SPECIAL_CTRL_STS		27
32*4882a593Smuzhiyun #define SPECIAL_CTRL_STS_OVRRD_AMDIX_	0x8000
33*4882a593Smuzhiyun #define SPECIAL_CTRL_STS_AMDIX_ENABLE_	0x4000
34*4882a593Smuzhiyun #define SPECIAL_CTRL_STS_AMDIX_STATE_	0x2000
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun struct smsc_hw_stat {
37*4882a593Smuzhiyun 	const char *string;
38*4882a593Smuzhiyun 	u8 reg;
39*4882a593Smuzhiyun 	u8 bits;
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun static struct smsc_hw_stat smsc_hw_stats[] = {
43*4882a593Smuzhiyun 	{ "phy_symbol_errors", 26, 16},
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun struct smsc_phy_priv {
47*4882a593Smuzhiyun 	bool energy_enable;
48*4882a593Smuzhiyun 	struct clk *refclk;
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun 
smsc_phy_config_intr(struct phy_device * phydev)51*4882a593Smuzhiyun static int smsc_phy_config_intr(struct phy_device *phydev)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	struct smsc_phy_priv *priv = phydev->priv;
54*4882a593Smuzhiyun 	u16 intmask = 0;
55*4882a593Smuzhiyun 	int rc;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
58*4882a593Smuzhiyun 		intmask = MII_LAN83C185_ISF_INT4 | MII_LAN83C185_ISF_INT6;
59*4882a593Smuzhiyun 		if (priv->energy_enable)
60*4882a593Smuzhiyun 			intmask |= MII_LAN83C185_ISF_INT7;
61*4882a593Smuzhiyun 	}
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	rc = phy_write(phydev, MII_LAN83C185_IM, intmask);
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	return rc < 0 ? rc : 0;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun 
smsc_phy_ack_interrupt(struct phy_device * phydev)68*4882a593Smuzhiyun static int smsc_phy_ack_interrupt(struct phy_device *phydev)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	int rc = phy_read (phydev, MII_LAN83C185_ISF);
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	return rc < 0 ? rc : 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun 
smsc_phy_config_init(struct phy_device * phydev)75*4882a593Smuzhiyun static int smsc_phy_config_init(struct phy_device *phydev)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun 	struct smsc_phy_priv *priv = phydev->priv;
78*4882a593Smuzhiyun 	int rc;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	if (!priv->energy_enable)
81*4882a593Smuzhiyun 		return 0;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS);
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	if (rc < 0)
86*4882a593Smuzhiyun 		return rc;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	/* Enable energy detect mode for this SMSC Transceivers */
89*4882a593Smuzhiyun 	rc = phy_write(phydev, MII_LAN83C185_CTRL_STATUS,
90*4882a593Smuzhiyun 		       rc | MII_LAN83C185_EDPWRDOWN);
91*4882a593Smuzhiyun 	if (rc < 0)
92*4882a593Smuzhiyun 		return rc;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	return smsc_phy_ack_interrupt(phydev);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun 
smsc_phy_reset(struct phy_device * phydev)97*4882a593Smuzhiyun static int smsc_phy_reset(struct phy_device *phydev)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun 	int rc = phy_read(phydev, MII_LAN83C185_SPECIAL_MODES);
100*4882a593Smuzhiyun 	if (rc < 0)
101*4882a593Smuzhiyun 		return rc;
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	/* If the SMSC PHY is in power down mode, then set it
104*4882a593Smuzhiyun 	 * in all capable mode before using it.
105*4882a593Smuzhiyun 	 */
106*4882a593Smuzhiyun 	if ((rc & MII_LAN83C185_MODE_MASK) == MII_LAN83C185_MODE_POWERDOWN) {
107*4882a593Smuzhiyun 		/* set "all capable" mode */
108*4882a593Smuzhiyun 		rc |= MII_LAN83C185_MODE_ALL;
109*4882a593Smuzhiyun 		phy_write(phydev, MII_LAN83C185_SPECIAL_MODES, rc);
110*4882a593Smuzhiyun 	}
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	/* reset the phy */
113*4882a593Smuzhiyun 	return genphy_soft_reset(phydev);
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun 
lan911x_config_init(struct phy_device * phydev)116*4882a593Smuzhiyun static int lan911x_config_init(struct phy_device *phydev)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun 	return smsc_phy_ack_interrupt(phydev);
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun 
lan87xx_config_aneg(struct phy_device * phydev)121*4882a593Smuzhiyun static int lan87xx_config_aneg(struct phy_device *phydev)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun 	int rc;
124*4882a593Smuzhiyun 	int val;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	switch (phydev->mdix_ctrl) {
127*4882a593Smuzhiyun 	case ETH_TP_MDI:
128*4882a593Smuzhiyun 		val = SPECIAL_CTRL_STS_OVRRD_AMDIX_;
129*4882a593Smuzhiyun 		break;
130*4882a593Smuzhiyun 	case ETH_TP_MDI_X:
131*4882a593Smuzhiyun 		val = SPECIAL_CTRL_STS_OVRRD_AMDIX_ |
132*4882a593Smuzhiyun 			SPECIAL_CTRL_STS_AMDIX_STATE_;
133*4882a593Smuzhiyun 		break;
134*4882a593Smuzhiyun 	case ETH_TP_MDI_AUTO:
135*4882a593Smuzhiyun 		val = SPECIAL_CTRL_STS_AMDIX_ENABLE_;
136*4882a593Smuzhiyun 		break;
137*4882a593Smuzhiyun 	default:
138*4882a593Smuzhiyun 		return genphy_config_aneg(phydev);
139*4882a593Smuzhiyun 	}
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	rc = phy_read(phydev, SPECIAL_CTRL_STS);
142*4882a593Smuzhiyun 	if (rc < 0)
143*4882a593Smuzhiyun 		return rc;
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	rc &= ~(SPECIAL_CTRL_STS_OVRRD_AMDIX_ |
146*4882a593Smuzhiyun 		SPECIAL_CTRL_STS_AMDIX_ENABLE_ |
147*4882a593Smuzhiyun 		SPECIAL_CTRL_STS_AMDIX_STATE_);
148*4882a593Smuzhiyun 	rc |= val;
149*4882a593Smuzhiyun 	phy_write(phydev, SPECIAL_CTRL_STS, rc);
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	phydev->mdix = phydev->mdix_ctrl;
152*4882a593Smuzhiyun 	return genphy_config_aneg(phydev);
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun 
lan95xx_config_aneg_ext(struct phy_device * phydev)155*4882a593Smuzhiyun static int lan95xx_config_aneg_ext(struct phy_device *phydev)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun 	int rc;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	if (phydev->phy_id != 0x0007c0f0) /* not (LAN9500A or LAN9505A) */
160*4882a593Smuzhiyun 		return lan87xx_config_aneg(phydev);
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	/* Extend Manual AutoMDIX timer */
163*4882a593Smuzhiyun 	rc = phy_read(phydev, PHY_EDPD_CONFIG);
164*4882a593Smuzhiyun 	if (rc < 0)
165*4882a593Smuzhiyun 		return rc;
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	rc |= PHY_EDPD_CONFIG_EXT_CROSSOVER_;
168*4882a593Smuzhiyun 	phy_write(phydev, PHY_EDPD_CONFIG, rc);
169*4882a593Smuzhiyun 	return lan87xx_config_aneg(phydev);
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun /*
173*4882a593Smuzhiyun  * The LAN87xx suffers from rare absence of the ENERGYON-bit when Ethernet cable
174*4882a593Smuzhiyun  * plugs in while LAN87xx is in Energy Detect Power-Down mode. This leads to
175*4882a593Smuzhiyun  * unstable detection of plugging in Ethernet cable.
176*4882a593Smuzhiyun  * This workaround disables Energy Detect Power-Down mode and waiting for
177*4882a593Smuzhiyun  * response on link pulses to detect presence of plugged Ethernet cable.
178*4882a593Smuzhiyun  * The Energy Detect Power-Down mode is enabled again in the end of procedure to
179*4882a593Smuzhiyun  * save approximately 220 mW of power if cable is unplugged.
180*4882a593Smuzhiyun  */
lan87xx_read_status(struct phy_device * phydev)181*4882a593Smuzhiyun static int lan87xx_read_status(struct phy_device *phydev)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun 	struct smsc_phy_priv *priv = phydev->priv;
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	int err = genphy_read_status(phydev);
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	if (!phydev->link && priv->energy_enable) {
188*4882a593Smuzhiyun 		/* Disable EDPD to wake up PHY */
189*4882a593Smuzhiyun 		int rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS);
190*4882a593Smuzhiyun 		if (rc < 0)
191*4882a593Smuzhiyun 			return rc;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 		rc = phy_write(phydev, MII_LAN83C185_CTRL_STATUS,
194*4882a593Smuzhiyun 			       rc & ~MII_LAN83C185_EDPWRDOWN);
195*4882a593Smuzhiyun 		if (rc < 0)
196*4882a593Smuzhiyun 			return rc;
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 		/* Wait max 640 ms to detect energy and the timeout is not
199*4882a593Smuzhiyun 		 * an actual error.
200*4882a593Smuzhiyun 		 */
201*4882a593Smuzhiyun 		read_poll_timeout(phy_read, rc,
202*4882a593Smuzhiyun 				  rc & MII_LAN83C185_ENERGYON || rc < 0,
203*4882a593Smuzhiyun 				  10000, 640000, true, phydev,
204*4882a593Smuzhiyun 				  MII_LAN83C185_CTRL_STATUS);
205*4882a593Smuzhiyun 		if (rc < 0)
206*4882a593Smuzhiyun 			return rc;
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun 		/* Re-enable EDPD */
209*4882a593Smuzhiyun 		rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS);
210*4882a593Smuzhiyun 		if (rc < 0)
211*4882a593Smuzhiyun 			return rc;
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 		rc = phy_write(phydev, MII_LAN83C185_CTRL_STATUS,
214*4882a593Smuzhiyun 			       rc | MII_LAN83C185_EDPWRDOWN);
215*4882a593Smuzhiyun 		if (rc < 0)
216*4882a593Smuzhiyun 			return rc;
217*4882a593Smuzhiyun 	}
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	return err;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun 
smsc_get_sset_count(struct phy_device * phydev)222*4882a593Smuzhiyun static int smsc_get_sset_count(struct phy_device *phydev)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun 	return ARRAY_SIZE(smsc_hw_stats);
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun 
smsc_get_strings(struct phy_device * phydev,u8 * data)227*4882a593Smuzhiyun static void smsc_get_strings(struct phy_device *phydev, u8 *data)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun 	int i;
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(smsc_hw_stats); i++) {
232*4882a593Smuzhiyun 		strncpy(data + i * ETH_GSTRING_LEN,
233*4882a593Smuzhiyun 		       smsc_hw_stats[i].string, ETH_GSTRING_LEN);
234*4882a593Smuzhiyun 	}
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun 
smsc_get_stat(struct phy_device * phydev,int i)237*4882a593Smuzhiyun static u64 smsc_get_stat(struct phy_device *phydev, int i)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun 	struct smsc_hw_stat stat = smsc_hw_stats[i];
240*4882a593Smuzhiyun 	int val;
241*4882a593Smuzhiyun 	u64 ret;
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	val = phy_read(phydev, stat.reg);
244*4882a593Smuzhiyun 	if (val < 0)
245*4882a593Smuzhiyun 		ret = U64_MAX;
246*4882a593Smuzhiyun 	else
247*4882a593Smuzhiyun 		ret = val;
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	return ret;
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun 
smsc_get_stats(struct phy_device * phydev,struct ethtool_stats * stats,u64 * data)252*4882a593Smuzhiyun static void smsc_get_stats(struct phy_device *phydev,
253*4882a593Smuzhiyun 			   struct ethtool_stats *stats, u64 *data)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun 	int i;
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(smsc_hw_stats); i++)
258*4882a593Smuzhiyun 		data[i] = smsc_get_stat(phydev, i);
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun 
smsc_phy_remove(struct phy_device * phydev)261*4882a593Smuzhiyun static void smsc_phy_remove(struct phy_device *phydev)
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun 	struct smsc_phy_priv *priv = phydev->priv;
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	clk_disable_unprepare(priv->refclk);
266*4882a593Smuzhiyun 	clk_put(priv->refclk);
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun 
smsc_phy_probe(struct phy_device * phydev)269*4882a593Smuzhiyun static int smsc_phy_probe(struct phy_device *phydev)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun 	struct device *dev = &phydev->mdio.dev;
272*4882a593Smuzhiyun 	struct device_node *of_node = dev->of_node;
273*4882a593Smuzhiyun 	struct smsc_phy_priv *priv;
274*4882a593Smuzhiyun 	int ret;
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
277*4882a593Smuzhiyun 	if (!priv)
278*4882a593Smuzhiyun 		return -ENOMEM;
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	priv->energy_enable = true;
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	if (of_property_read_bool(of_node, "smsc,disable-energy-detect"))
283*4882a593Smuzhiyun 		priv->energy_enable = false;
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	phydev->priv = priv;
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	/* Make clk optional to keep DTB backward compatibility. */
288*4882a593Smuzhiyun 	priv->refclk = clk_get_optional(dev, NULL);
289*4882a593Smuzhiyun 	if (IS_ERR(priv->refclk))
290*4882a593Smuzhiyun 		return dev_err_probe(dev, PTR_ERR(priv->refclk),
291*4882a593Smuzhiyun 				     "Failed to request clock\n");
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	ret = clk_prepare_enable(priv->refclk);
294*4882a593Smuzhiyun 	if (ret)
295*4882a593Smuzhiyun 		return ret;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	ret = clk_set_rate(priv->refclk, 50 * 1000 * 1000);
298*4882a593Smuzhiyun 	if (ret) {
299*4882a593Smuzhiyun 		clk_disable_unprepare(priv->refclk);
300*4882a593Smuzhiyun 		return ret;
301*4882a593Smuzhiyun 	}
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 	return 0;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun static struct phy_driver smsc_phy_driver[] = {
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun 	.phy_id		= 0x0007c0a0, /* OUI=0x00800f, Model#=0x0a */
309*4882a593Smuzhiyun 	.phy_id_mask	= 0xfffffff0,
310*4882a593Smuzhiyun 	.name		= "SMSC LAN83C185",
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	/* PHY_BASIC_FEATURES */
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	.probe		= smsc_phy_probe,
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	/* basic functions */
317*4882a593Smuzhiyun 	.config_init	= smsc_phy_config_init,
318*4882a593Smuzhiyun 	.soft_reset	= smsc_phy_reset,
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	/* IRQ related */
321*4882a593Smuzhiyun 	.ack_interrupt	= smsc_phy_ack_interrupt,
322*4882a593Smuzhiyun 	.config_intr	= smsc_phy_config_intr,
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	.suspend	= genphy_suspend,
325*4882a593Smuzhiyun 	.resume		= genphy_resume,
326*4882a593Smuzhiyun }, {
327*4882a593Smuzhiyun 	.phy_id		= 0x0007c0b0, /* OUI=0x00800f, Model#=0x0b */
328*4882a593Smuzhiyun 	.phy_id_mask	= 0xfffffff0,
329*4882a593Smuzhiyun 	.name		= "SMSC LAN8187",
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	/* PHY_BASIC_FEATURES */
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	.probe		= smsc_phy_probe,
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	/* basic functions */
336*4882a593Smuzhiyun 	.config_init	= smsc_phy_config_init,
337*4882a593Smuzhiyun 	.soft_reset	= smsc_phy_reset,
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun 	/* IRQ related */
340*4882a593Smuzhiyun 	.ack_interrupt	= smsc_phy_ack_interrupt,
341*4882a593Smuzhiyun 	.config_intr	= smsc_phy_config_intr,
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	/* Statistics */
344*4882a593Smuzhiyun 	.get_sset_count = smsc_get_sset_count,
345*4882a593Smuzhiyun 	.get_strings	= smsc_get_strings,
346*4882a593Smuzhiyun 	.get_stats	= smsc_get_stats,
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	.suspend	= genphy_suspend,
349*4882a593Smuzhiyun 	.resume		= genphy_resume,
350*4882a593Smuzhiyun }, {
351*4882a593Smuzhiyun 	/* This covers internal PHY (phy_id: 0x0007C0C3) for
352*4882a593Smuzhiyun 	 * LAN9500 (PID: 0x9500), LAN9514 (PID: 0xec00), LAN9505 (PID: 0x9505)
353*4882a593Smuzhiyun 	 */
354*4882a593Smuzhiyun 	.phy_id		= 0x0007c0c0, /* OUI=0x00800f, Model#=0x0c */
355*4882a593Smuzhiyun 	.phy_id_mask	= 0xfffffff0,
356*4882a593Smuzhiyun 	.name		= "SMSC LAN8700",
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	/* PHY_BASIC_FEATURES */
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	.probe		= smsc_phy_probe,
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun 	/* basic functions */
363*4882a593Smuzhiyun 	.read_status	= lan87xx_read_status,
364*4882a593Smuzhiyun 	.config_init	= smsc_phy_config_init,
365*4882a593Smuzhiyun 	.soft_reset	= smsc_phy_reset,
366*4882a593Smuzhiyun 	.config_aneg	= lan87xx_config_aneg,
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	/* IRQ related */
369*4882a593Smuzhiyun 	.ack_interrupt	= smsc_phy_ack_interrupt,
370*4882a593Smuzhiyun 	.config_intr	= smsc_phy_config_intr,
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 	/* Statistics */
373*4882a593Smuzhiyun 	.get_sset_count = smsc_get_sset_count,
374*4882a593Smuzhiyun 	.get_strings	= smsc_get_strings,
375*4882a593Smuzhiyun 	.get_stats	= smsc_get_stats,
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun 	.suspend	= genphy_suspend,
378*4882a593Smuzhiyun 	.resume		= genphy_resume,
379*4882a593Smuzhiyun }, {
380*4882a593Smuzhiyun 	.phy_id		= 0x0007c0d0, /* OUI=0x00800f, Model#=0x0d */
381*4882a593Smuzhiyun 	.phy_id_mask	= 0xfffffff0,
382*4882a593Smuzhiyun 	.name		= "SMSC LAN911x Internal PHY",
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun 	/* PHY_BASIC_FEATURES */
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	.probe		= smsc_phy_probe,
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 	/* basic functions */
389*4882a593Smuzhiyun 	.config_init	= lan911x_config_init,
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 	/* IRQ related */
392*4882a593Smuzhiyun 	.ack_interrupt	= smsc_phy_ack_interrupt,
393*4882a593Smuzhiyun 	.config_intr	= smsc_phy_config_intr,
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	.suspend	= genphy_suspend,
396*4882a593Smuzhiyun 	.resume		= genphy_resume,
397*4882a593Smuzhiyun }, {
398*4882a593Smuzhiyun 	/* This covers internal PHY (phy_id: 0x0007C0F0) for
399*4882a593Smuzhiyun 	 * LAN9500A (PID: 0x9E00), LAN9505A (PID: 0x9E01)
400*4882a593Smuzhiyun 	 */
401*4882a593Smuzhiyun 	.phy_id		= 0x0007c0f0, /* OUI=0x00800f, Model#=0x0f */
402*4882a593Smuzhiyun 	.phy_id_mask	= 0xfffffff0,
403*4882a593Smuzhiyun 	.name		= "SMSC LAN8710/LAN8720",
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	/* PHY_BASIC_FEATURES */
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun 	.probe		= smsc_phy_probe,
408*4882a593Smuzhiyun 	.remove		= smsc_phy_remove,
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun 	/* basic functions */
411*4882a593Smuzhiyun 	.read_status	= lan87xx_read_status,
412*4882a593Smuzhiyun 	.config_init	= smsc_phy_config_init,
413*4882a593Smuzhiyun 	.soft_reset	= smsc_phy_reset,
414*4882a593Smuzhiyun 	.config_aneg	= lan95xx_config_aneg_ext,
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 	/* IRQ related */
417*4882a593Smuzhiyun 	.ack_interrupt	= smsc_phy_ack_interrupt,
418*4882a593Smuzhiyun 	.config_intr	= smsc_phy_config_intr,
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 	/* Statistics */
421*4882a593Smuzhiyun 	.get_sset_count = smsc_get_sset_count,
422*4882a593Smuzhiyun 	.get_strings	= smsc_get_strings,
423*4882a593Smuzhiyun 	.get_stats	= smsc_get_stats,
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun 	.suspend	= genphy_suspend,
426*4882a593Smuzhiyun 	.resume		= genphy_resume,
427*4882a593Smuzhiyun }, {
428*4882a593Smuzhiyun 	.phy_id		= 0x0007c110,
429*4882a593Smuzhiyun 	.phy_id_mask	= 0xfffffff0,
430*4882a593Smuzhiyun 	.name		= "SMSC LAN8740",
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun 	/* PHY_BASIC_FEATURES */
433*4882a593Smuzhiyun 	.flags		= PHY_RST_AFTER_CLK_EN,
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun 	.probe		= smsc_phy_probe,
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun 	/* basic functions */
438*4882a593Smuzhiyun 	.read_status	= lan87xx_read_status,
439*4882a593Smuzhiyun 	.config_init	= smsc_phy_config_init,
440*4882a593Smuzhiyun 	.soft_reset	= smsc_phy_reset,
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	/* IRQ related */
443*4882a593Smuzhiyun 	.ack_interrupt	= smsc_phy_ack_interrupt,
444*4882a593Smuzhiyun 	.config_intr	= smsc_phy_config_intr,
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 	/* Statistics */
447*4882a593Smuzhiyun 	.get_sset_count = smsc_get_sset_count,
448*4882a593Smuzhiyun 	.get_strings	= smsc_get_strings,
449*4882a593Smuzhiyun 	.get_stats	= smsc_get_stats,
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun 	.suspend	= genphy_suspend,
452*4882a593Smuzhiyun 	.resume		= genphy_resume,
453*4882a593Smuzhiyun } };
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun module_phy_driver(smsc_phy_driver);
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun MODULE_DESCRIPTION("SMSC PHY driver");
458*4882a593Smuzhiyun MODULE_AUTHOR("Herbert Valerio Riedel");
459*4882a593Smuzhiyun MODULE_LICENSE("GPL");
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun static struct mdio_device_id __maybe_unused smsc_tbl[] = {
462*4882a593Smuzhiyun 	{ 0x0007c0a0, 0xfffffff0 },
463*4882a593Smuzhiyun 	{ 0x0007c0b0, 0xfffffff0 },
464*4882a593Smuzhiyun 	{ 0x0007c0c0, 0xfffffff0 },
465*4882a593Smuzhiyun 	{ 0x0007c0d0, 0xfffffff0 },
466*4882a593Smuzhiyun 	{ 0x0007c0f0, 0xfffffff0 },
467*4882a593Smuzhiyun 	{ 0x0007c110, 0xfffffff0 },
468*4882a593Smuzhiyun 	{ }
469*4882a593Smuzhiyun };
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun MODULE_DEVICE_TABLE(mdio, smsc_tbl);
472