xref: /OK3568_Linux_fs/u-boot/drivers/net/phy/generic_10g.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Generic PHY Management code
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright 2011 Freescale Semiconductor, Inc.
7*4882a593Smuzhiyun  * author Andy Fleming
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * Based loosely off of Linux's PHY Lib
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <config.h>
13*4882a593Smuzhiyun #include <common.h>
14*4882a593Smuzhiyun #include <miiphy.h>
15*4882a593Smuzhiyun #include <phy.h>
16*4882a593Smuzhiyun 
gen10g_shutdown(struct phy_device * phydev)17*4882a593Smuzhiyun int gen10g_shutdown(struct phy_device *phydev)
18*4882a593Smuzhiyun {
19*4882a593Smuzhiyun 	return 0;
20*4882a593Smuzhiyun }
21*4882a593Smuzhiyun 
gen10g_startup(struct phy_device * phydev)22*4882a593Smuzhiyun int gen10g_startup(struct phy_device *phydev)
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun 	int devad, reg;
25*4882a593Smuzhiyun 	u32 mmd_mask = phydev->mmds & MDIO_DEVS_LINK;
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun 	phydev->link = 1;
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun 	/* For now just lie and say it's 10G all the time */
30*4882a593Smuzhiyun 	phydev->speed = SPEED_10000;
31*4882a593Smuzhiyun 	phydev->duplex = DUPLEX_FULL;
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun 	/*
34*4882a593Smuzhiyun 	 * Go through all the link-reporting devices, and make sure
35*4882a593Smuzhiyun 	 * they're all up and happy
36*4882a593Smuzhiyun 	 */
37*4882a593Smuzhiyun 	for (devad = 0; mmd_mask; devad++, mmd_mask = mmd_mask >> 1) {
38*4882a593Smuzhiyun 		if (!(mmd_mask & 1))
39*4882a593Smuzhiyun 			continue;
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 		/* Read twice because link state is latched and a
42*4882a593Smuzhiyun 		 * read moves the current state into the register */
43*4882a593Smuzhiyun 		phy_read(phydev, devad, MDIO_STAT1);
44*4882a593Smuzhiyun 		reg = phy_read(phydev, devad, MDIO_STAT1);
45*4882a593Smuzhiyun 		if (reg < 0 || !(reg & MDIO_STAT1_LSTATUS))
46*4882a593Smuzhiyun 			phydev->link = 0;
47*4882a593Smuzhiyun 	}
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	return 0;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun 
gen10g_discover_mmds(struct phy_device * phydev)52*4882a593Smuzhiyun int gen10g_discover_mmds(struct phy_device *phydev)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun 	int mmd, stat2, devs1, devs2;
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	/* Assume PHY must have at least one of PMA/PMD, WIS, PCS, PHY
57*4882a593Smuzhiyun 	 * XS or DTE XS; give up if none is present. */
58*4882a593Smuzhiyun 	for (mmd = 1; mmd <= 5; mmd++) {
59*4882a593Smuzhiyun 		/* Is this MMD present? */
60*4882a593Smuzhiyun 		stat2 = phy_read(phydev, mmd, MDIO_STAT2);
61*4882a593Smuzhiyun 		if (stat2 < 0 ||
62*4882a593Smuzhiyun 			(stat2 & MDIO_STAT2_DEVPRST) != MDIO_STAT2_DEVPRST_VAL)
63*4882a593Smuzhiyun 			continue;
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 		/* It should tell us about all the other MMDs */
66*4882a593Smuzhiyun 		devs1 = phy_read(phydev, mmd, MDIO_DEVS1);
67*4882a593Smuzhiyun 		devs2 = phy_read(phydev, mmd, MDIO_DEVS2);
68*4882a593Smuzhiyun 		if (devs1 < 0 || devs2 < 0)
69*4882a593Smuzhiyun 			continue;
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 		phydev->mmds = devs1 | (devs2 << 16);
72*4882a593Smuzhiyun 		return 0;
73*4882a593Smuzhiyun 	}
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	return 0;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun 
gen10g_config(struct phy_device * phydev)78*4882a593Smuzhiyun int gen10g_config(struct phy_device *phydev)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun 	/* For now, assume 10000baseT. Fill in later */
81*4882a593Smuzhiyun 	phydev->supported = phydev->advertising = SUPPORTED_10000baseT_Full;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	return gen10g_discover_mmds(phydev);
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun struct phy_driver gen10g_driver = {
87*4882a593Smuzhiyun 	.uid		= 0xffffffff,
88*4882a593Smuzhiyun 	.mask		= 0xffffffff,
89*4882a593Smuzhiyun 	.name		= "Generic 10G PHY",
90*4882a593Smuzhiyun 	.features	= 0,
91*4882a593Smuzhiyun 	.config		= gen10g_config,
92*4882a593Smuzhiyun 	.startup	= gen10g_startup,
93*4882a593Smuzhiyun 	.shutdown	= gen10g_shutdown,
94*4882a593Smuzhiyun };
95