xref: /OK3568_Linux_fs/u-boot/drivers/net/phy/phy.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Generic PHY Management code
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright 2011 Freescale Semiconductor, Inc.
7*4882a593Smuzhiyun  * author Andy Fleming
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * Based loosely off of Linux's PHY Lib
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <config.h>
13*4882a593Smuzhiyun #include <common.h>
14*4882a593Smuzhiyun #include <console.h>
15*4882a593Smuzhiyun #include <dm.h>
16*4882a593Smuzhiyun #include <malloc.h>
17*4882a593Smuzhiyun #include <net.h>
18*4882a593Smuzhiyun #include <command.h>
19*4882a593Smuzhiyun #include <miiphy.h>
20*4882a593Smuzhiyun #include <phy.h>
21*4882a593Smuzhiyun #include <errno.h>
22*4882a593Smuzhiyun #include <linux/err.h>
23*4882a593Smuzhiyun #include <linux/compiler.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun /* Generic PHY support and helper functions */
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun /**
30*4882a593Smuzhiyun  * genphy_config_advert - sanitize and advertise auto-negotation parameters
31*4882a593Smuzhiyun  * @phydev: target phy_device struct
32*4882a593Smuzhiyun  *
33*4882a593Smuzhiyun  * Description: Writes MII_ADVERTISE with the appropriate values,
34*4882a593Smuzhiyun  *   after sanitizing the values to make sure we only advertise
35*4882a593Smuzhiyun  *   what is supported.  Returns < 0 on error, 0 if the PHY's advertisement
36*4882a593Smuzhiyun  *   hasn't changed, and > 0 if it has changed.
37*4882a593Smuzhiyun  */
genphy_config_advert(struct phy_device * phydev)38*4882a593Smuzhiyun static int genphy_config_advert(struct phy_device *phydev)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun 	u32 advertise;
41*4882a593Smuzhiyun 	int oldadv, adv, bmsr;
42*4882a593Smuzhiyun 	int err, changed = 0;
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	/* Only allow advertising what this PHY supports */
45*4882a593Smuzhiyun 	phydev->advertising &= phydev->supported;
46*4882a593Smuzhiyun 	advertise = phydev->advertising;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	/* Setup standard advertisement */
49*4882a593Smuzhiyun 	adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
50*4882a593Smuzhiyun 	oldadv = adv;
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	if (adv < 0)
53*4882a593Smuzhiyun 		return adv;
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
56*4882a593Smuzhiyun 		 ADVERTISE_PAUSE_ASYM);
57*4882a593Smuzhiyun 	if (advertise & ADVERTISED_10baseT_Half)
58*4882a593Smuzhiyun 		adv |= ADVERTISE_10HALF;
59*4882a593Smuzhiyun 	if (advertise & ADVERTISED_10baseT_Full)
60*4882a593Smuzhiyun 		adv |= ADVERTISE_10FULL;
61*4882a593Smuzhiyun 	if (advertise & ADVERTISED_100baseT_Half)
62*4882a593Smuzhiyun 		adv |= ADVERTISE_100HALF;
63*4882a593Smuzhiyun 	if (advertise & ADVERTISED_100baseT_Full)
64*4882a593Smuzhiyun 		adv |= ADVERTISE_100FULL;
65*4882a593Smuzhiyun 	if (advertise & ADVERTISED_Pause)
66*4882a593Smuzhiyun 		adv |= ADVERTISE_PAUSE_CAP;
67*4882a593Smuzhiyun 	if (advertise & ADVERTISED_Asym_Pause)
68*4882a593Smuzhiyun 		adv |= ADVERTISE_PAUSE_ASYM;
69*4882a593Smuzhiyun 	if (advertise & ADVERTISED_1000baseX_Half)
70*4882a593Smuzhiyun 		adv |= ADVERTISE_1000XHALF;
71*4882a593Smuzhiyun 	if (advertise & ADVERTISED_1000baseX_Full)
72*4882a593Smuzhiyun 		adv |= ADVERTISE_1000XFULL;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	if (adv != oldadv) {
75*4882a593Smuzhiyun 		err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 		if (err < 0)
78*4882a593Smuzhiyun 			return err;
79*4882a593Smuzhiyun 		changed = 1;
80*4882a593Smuzhiyun 	}
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
83*4882a593Smuzhiyun 	if (bmsr < 0)
84*4882a593Smuzhiyun 		return bmsr;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	/* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
87*4882a593Smuzhiyun 	 * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
88*4882a593Smuzhiyun 	 * logical 1.
89*4882a593Smuzhiyun 	 */
90*4882a593Smuzhiyun 	if (!(bmsr & BMSR_ESTATEN))
91*4882a593Smuzhiyun 		return changed;
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	/* Configure gigabit if it's supported */
94*4882a593Smuzhiyun 	adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
95*4882a593Smuzhiyun 	oldadv = adv;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	if (adv < 0)
98*4882a593Smuzhiyun 		return adv;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	if (phydev->supported & (SUPPORTED_1000baseT_Half |
103*4882a593Smuzhiyun 				SUPPORTED_1000baseT_Full)) {
104*4882a593Smuzhiyun 		if (advertise & SUPPORTED_1000baseT_Half)
105*4882a593Smuzhiyun 			adv |= ADVERTISE_1000HALF;
106*4882a593Smuzhiyun 		if (advertise & SUPPORTED_1000baseT_Full)
107*4882a593Smuzhiyun 			adv |= ADVERTISE_1000FULL;
108*4882a593Smuzhiyun 	}
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	if (adv != oldadv)
111*4882a593Smuzhiyun 		changed = 1;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
114*4882a593Smuzhiyun 	if (err < 0)
115*4882a593Smuzhiyun 		return err;
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	return changed;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun /**
122*4882a593Smuzhiyun  * genphy_setup_forced - configures/forces speed/duplex from @phydev
123*4882a593Smuzhiyun  * @phydev: target phy_device struct
124*4882a593Smuzhiyun  *
125*4882a593Smuzhiyun  * Description: Configures MII_BMCR to force speed/duplex
126*4882a593Smuzhiyun  *   to the values in phydev. Assumes that the values are valid.
127*4882a593Smuzhiyun  */
genphy_setup_forced(struct phy_device * phydev)128*4882a593Smuzhiyun static int genphy_setup_forced(struct phy_device *phydev)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun 	int err;
131*4882a593Smuzhiyun 	int ctl = BMCR_ANRESTART;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	phydev->pause = phydev->asym_pause = 0;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	if (SPEED_1000 == phydev->speed)
136*4882a593Smuzhiyun 		ctl |= BMCR_SPEED1000;
137*4882a593Smuzhiyun 	else if (SPEED_100 == phydev->speed)
138*4882a593Smuzhiyun 		ctl |= BMCR_SPEED100;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	if (DUPLEX_FULL == phydev->duplex)
141*4882a593Smuzhiyun 		ctl |= BMCR_FULLDPLX;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	return err;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun /**
150*4882a593Smuzhiyun  * genphy_restart_aneg - Enable and Restart Autonegotiation
151*4882a593Smuzhiyun  * @phydev: target phy_device struct
152*4882a593Smuzhiyun  */
genphy_restart_aneg(struct phy_device * phydev)153*4882a593Smuzhiyun int genphy_restart_aneg(struct phy_device *phydev)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun 	int ctl;
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	if (ctl < 0)
160*4882a593Smuzhiyun 		return ctl;
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	/* Don't isolate the PHY if we're negotiating */
165*4882a593Smuzhiyun 	ctl &= ~(BMCR_ISOLATE);
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	return ctl;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun /**
174*4882a593Smuzhiyun  * genphy_config_aneg - restart auto-negotiation or write BMCR
175*4882a593Smuzhiyun  * @phydev: target phy_device struct
176*4882a593Smuzhiyun  *
177*4882a593Smuzhiyun  * Description: If auto-negotiation is enabled, we configure the
178*4882a593Smuzhiyun  *   advertising, and then restart auto-negotiation.  If it is not
179*4882a593Smuzhiyun  *   enabled, then we write the BMCR.
180*4882a593Smuzhiyun  */
genphy_config_aneg(struct phy_device * phydev)181*4882a593Smuzhiyun int genphy_config_aneg(struct phy_device *phydev)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun 	int result;
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	if (AUTONEG_ENABLE != phydev->autoneg)
186*4882a593Smuzhiyun 		return genphy_setup_forced(phydev);
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	result = genphy_config_advert(phydev);
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	if (result < 0) /* error */
191*4882a593Smuzhiyun 		return result;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	if (result == 0) {
194*4882a593Smuzhiyun 		/* Advertisment hasn't changed, but maybe aneg was never on to
195*4882a593Smuzhiyun 		 * begin with?  Or maybe phy was isolated? */
196*4882a593Smuzhiyun 		int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 		if (ctl < 0)
199*4882a593Smuzhiyun 			return ctl;
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 		if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
202*4882a593Smuzhiyun 			result = 1; /* do restart aneg */
203*4882a593Smuzhiyun 	}
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	/* Only restart aneg if we are advertising something different
206*4882a593Smuzhiyun 	 * than we were before.	 */
207*4882a593Smuzhiyun 	if (result > 0)
208*4882a593Smuzhiyun 		result = genphy_restart_aneg(phydev);
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	return result;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun /**
214*4882a593Smuzhiyun  * genphy_update_link - update link status in @phydev
215*4882a593Smuzhiyun  * @phydev: target phy_device struct
216*4882a593Smuzhiyun  *
217*4882a593Smuzhiyun  * Description: Update the value in phydev->link to reflect the
218*4882a593Smuzhiyun  *   current link value.  In order to do this, we need to read
219*4882a593Smuzhiyun  *   the status register twice, keeping the second value.
220*4882a593Smuzhiyun  */
genphy_update_link(struct phy_device * phydev)221*4882a593Smuzhiyun int genphy_update_link(struct phy_device *phydev)
222*4882a593Smuzhiyun {
223*4882a593Smuzhiyun 	unsigned int mii_reg;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	/*
226*4882a593Smuzhiyun 	 * Wait if the link is up, and autonegotiation is in progress
227*4882a593Smuzhiyun 	 * (ie - we're capable and it's not done)
228*4882a593Smuzhiyun 	 */
229*4882a593Smuzhiyun 	mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	/*
232*4882a593Smuzhiyun 	 * If we already saw the link up, and it hasn't gone down, then
233*4882a593Smuzhiyun 	 * we don't need to wait for autoneg again
234*4882a593Smuzhiyun 	 */
235*4882a593Smuzhiyun 	if (phydev->link && mii_reg & BMSR_LSTATUS)
236*4882a593Smuzhiyun 		return 0;
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	if ((phydev->autoneg == AUTONEG_ENABLE) &&
239*4882a593Smuzhiyun 	    !(mii_reg & BMSR_ANEGCOMPLETE)) {
240*4882a593Smuzhiyun 		int i = 0;
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 		printf("%s Waiting for PHY auto negotiation to complete",
243*4882a593Smuzhiyun 			phydev->dev->name);
244*4882a593Smuzhiyun 		while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
245*4882a593Smuzhiyun 			/*
246*4882a593Smuzhiyun 			 * Timeout reached ?
247*4882a593Smuzhiyun 			 */
248*4882a593Smuzhiyun 			if (i > PHY_ANEG_TIMEOUT) {
249*4882a593Smuzhiyun 				printf(" TIMEOUT !\n");
250*4882a593Smuzhiyun 				phydev->link = 0;
251*4882a593Smuzhiyun 				return -ETIMEDOUT;
252*4882a593Smuzhiyun 			}
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 			if (ctrlc()) {
255*4882a593Smuzhiyun 				puts("user interrupt!\n");
256*4882a593Smuzhiyun 				phydev->link = 0;
257*4882a593Smuzhiyun 				return -EINTR;
258*4882a593Smuzhiyun 			}
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 			if ((i++ % 500) == 0)
261*4882a593Smuzhiyun 				printf(".");
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 			udelay(1000);	/* 1 ms */
264*4882a593Smuzhiyun 			mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
265*4882a593Smuzhiyun 		}
266*4882a593Smuzhiyun 		printf(" done\n");
267*4882a593Smuzhiyun 		phydev->link = 1;
268*4882a593Smuzhiyun 	} else {
269*4882a593Smuzhiyun 		/* Read the link a second time to clear the latched state */
270*4882a593Smuzhiyun 		mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 		if (mii_reg & BMSR_LSTATUS)
273*4882a593Smuzhiyun 			phydev->link = 1;
274*4882a593Smuzhiyun 		else
275*4882a593Smuzhiyun 			phydev->link = 0;
276*4882a593Smuzhiyun 	}
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	return 0;
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun /*
282*4882a593Smuzhiyun  * Generic function which updates the speed and duplex.  If
283*4882a593Smuzhiyun  * autonegotiation is enabled, it uses the AND of the link
284*4882a593Smuzhiyun  * partner's advertised capabilities and our advertised
285*4882a593Smuzhiyun  * capabilities.  If autonegotiation is disabled, we use the
286*4882a593Smuzhiyun  * appropriate bits in the control register.
287*4882a593Smuzhiyun  *
288*4882a593Smuzhiyun  * Stolen from Linux's mii.c and phy_device.c
289*4882a593Smuzhiyun  */
genphy_parse_link(struct phy_device * phydev)290*4882a593Smuzhiyun int genphy_parse_link(struct phy_device *phydev)
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun 	int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 	/* We're using autonegotiation */
295*4882a593Smuzhiyun 	if (phydev->autoneg == AUTONEG_ENABLE) {
296*4882a593Smuzhiyun 		u32 lpa = 0;
297*4882a593Smuzhiyun 		int gblpa = 0;
298*4882a593Smuzhiyun 		u32 estatus = 0;
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 		/* Check for gigabit capability */
301*4882a593Smuzhiyun 		if (phydev->supported & (SUPPORTED_1000baseT_Full |
302*4882a593Smuzhiyun 					SUPPORTED_1000baseT_Half)) {
303*4882a593Smuzhiyun 			/* We want a list of states supported by
304*4882a593Smuzhiyun 			 * both PHYs in the link
305*4882a593Smuzhiyun 			 */
306*4882a593Smuzhiyun 			gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
307*4882a593Smuzhiyun 			if (gblpa < 0) {
308*4882a593Smuzhiyun 				debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
309*4882a593Smuzhiyun 				gblpa = 0;
310*4882a593Smuzhiyun 			}
311*4882a593Smuzhiyun 			gblpa &= phy_read(phydev,
312*4882a593Smuzhiyun 					MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
313*4882a593Smuzhiyun 		}
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 		/* Set the baseline so we only have to set them
316*4882a593Smuzhiyun 		 * if they're different
317*4882a593Smuzhiyun 		 */
318*4882a593Smuzhiyun 		phydev->speed = SPEED_10;
319*4882a593Smuzhiyun 		phydev->duplex = DUPLEX_HALF;
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 		/* Check the gigabit fields */
322*4882a593Smuzhiyun 		if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
323*4882a593Smuzhiyun 			phydev->speed = SPEED_1000;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 			if (gblpa & PHY_1000BTSR_1000FD)
326*4882a593Smuzhiyun 				phydev->duplex = DUPLEX_FULL;
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 			/* We're done! */
329*4882a593Smuzhiyun 			return 0;
330*4882a593Smuzhiyun 		}
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 		lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
333*4882a593Smuzhiyun 		lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 		if (lpa & (LPA_100FULL | LPA_100HALF)) {
336*4882a593Smuzhiyun 			phydev->speed = SPEED_100;
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 			if (lpa & LPA_100FULL)
339*4882a593Smuzhiyun 				phydev->duplex = DUPLEX_FULL;
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 		} else if (lpa & LPA_10FULL)
342*4882a593Smuzhiyun 			phydev->duplex = DUPLEX_FULL;
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 		/*
345*4882a593Smuzhiyun 		 * Extended status may indicate that the PHY supports
346*4882a593Smuzhiyun 		 * 1000BASE-T/X even though the 1000BASE-T registers
347*4882a593Smuzhiyun 		 * are missing. In this case we can't tell whether the
348*4882a593Smuzhiyun 		 * peer also supports it, so we only check extended
349*4882a593Smuzhiyun 		 * status if the 1000BASE-T registers are actually
350*4882a593Smuzhiyun 		 * missing.
351*4882a593Smuzhiyun 		 */
352*4882a593Smuzhiyun 		if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
353*4882a593Smuzhiyun 			estatus = phy_read(phydev, MDIO_DEVAD_NONE,
354*4882a593Smuzhiyun 					   MII_ESTATUS);
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 		if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
357*4882a593Smuzhiyun 				ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
358*4882a593Smuzhiyun 			phydev->speed = SPEED_1000;
359*4882a593Smuzhiyun 			if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
360*4882a593Smuzhiyun 				phydev->duplex = DUPLEX_FULL;
361*4882a593Smuzhiyun 		}
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	} else {
364*4882a593Smuzhiyun 		u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 		phydev->speed = SPEED_10;
367*4882a593Smuzhiyun 		phydev->duplex = DUPLEX_HALF;
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun 		if (bmcr & BMCR_FULLDPLX)
370*4882a593Smuzhiyun 			phydev->duplex = DUPLEX_FULL;
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 		if (bmcr & BMCR_SPEED1000)
373*4882a593Smuzhiyun 			phydev->speed = SPEED_1000;
374*4882a593Smuzhiyun 		else if (bmcr & BMCR_SPEED100)
375*4882a593Smuzhiyun 			phydev->speed = SPEED_100;
376*4882a593Smuzhiyun 	}
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 	return 0;
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun 
genphy_config(struct phy_device * phydev)381*4882a593Smuzhiyun int genphy_config(struct phy_device *phydev)
382*4882a593Smuzhiyun {
383*4882a593Smuzhiyun 	int val;
384*4882a593Smuzhiyun 	u32 features;
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	features = (SUPPORTED_TP | SUPPORTED_MII
387*4882a593Smuzhiyun 			| SUPPORTED_AUI | SUPPORTED_FIBRE |
388*4882a593Smuzhiyun 			SUPPORTED_BNC);
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 	/* Do we support autonegotiation? */
391*4882a593Smuzhiyun 	val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	if (val < 0)
394*4882a593Smuzhiyun 		return val;
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun 	if (val & BMSR_ANEGCAPABLE)
397*4882a593Smuzhiyun 		features |= SUPPORTED_Autoneg;
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 	if (val & BMSR_100FULL)
400*4882a593Smuzhiyun 		features |= SUPPORTED_100baseT_Full;
401*4882a593Smuzhiyun 	if (val & BMSR_100HALF)
402*4882a593Smuzhiyun 		features |= SUPPORTED_100baseT_Half;
403*4882a593Smuzhiyun 	if (val & BMSR_10FULL)
404*4882a593Smuzhiyun 		features |= SUPPORTED_10baseT_Full;
405*4882a593Smuzhiyun 	if (val & BMSR_10HALF)
406*4882a593Smuzhiyun 		features |= SUPPORTED_10baseT_Half;
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun 	if (val & BMSR_ESTATEN) {
409*4882a593Smuzhiyun 		val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun 		if (val < 0)
412*4882a593Smuzhiyun 			return val;
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 		if (val & ESTATUS_1000_TFULL)
415*4882a593Smuzhiyun 			features |= SUPPORTED_1000baseT_Full;
416*4882a593Smuzhiyun 		if (val & ESTATUS_1000_THALF)
417*4882a593Smuzhiyun 			features |= SUPPORTED_1000baseT_Half;
418*4882a593Smuzhiyun 		if (val & ESTATUS_1000_XFULL)
419*4882a593Smuzhiyun 			features |= SUPPORTED_1000baseX_Full;
420*4882a593Smuzhiyun 		if (val & ESTATUS_1000_XHALF)
421*4882a593Smuzhiyun 			features |= SUPPORTED_1000baseX_Half;
422*4882a593Smuzhiyun 	}
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun 	phydev->supported &= features;
425*4882a593Smuzhiyun 	phydev->advertising &= features;
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	genphy_config_aneg(phydev);
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	return 0;
430*4882a593Smuzhiyun }
431*4882a593Smuzhiyun 
genphy_startup(struct phy_device * phydev)432*4882a593Smuzhiyun int genphy_startup(struct phy_device *phydev)
433*4882a593Smuzhiyun {
434*4882a593Smuzhiyun 	int ret;
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	ret = genphy_update_link(phydev);
437*4882a593Smuzhiyun 	if (ret)
438*4882a593Smuzhiyun 		return ret;
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun 	return genphy_parse_link(phydev);
441*4882a593Smuzhiyun }
442*4882a593Smuzhiyun 
genphy_shutdown(struct phy_device * phydev)443*4882a593Smuzhiyun int genphy_shutdown(struct phy_device *phydev)
444*4882a593Smuzhiyun {
445*4882a593Smuzhiyun 	return 0;
446*4882a593Smuzhiyun }
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun static struct phy_driver genphy_driver = {
449*4882a593Smuzhiyun 	.uid		= 0xffffffff,
450*4882a593Smuzhiyun 	.mask		= 0xffffffff,
451*4882a593Smuzhiyun 	.name		= "Generic PHY",
452*4882a593Smuzhiyun 	.features	= PHY_GBIT_FEATURES | SUPPORTED_MII |
453*4882a593Smuzhiyun 			  SUPPORTED_AUI | SUPPORTED_FIBRE |
454*4882a593Smuzhiyun 			  SUPPORTED_BNC,
455*4882a593Smuzhiyun 	.config		= genphy_config,
456*4882a593Smuzhiyun 	.startup	= genphy_startup,
457*4882a593Smuzhiyun 	.shutdown	= genphy_shutdown,
458*4882a593Smuzhiyun };
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun static LIST_HEAD(phy_drivers);
461*4882a593Smuzhiyun 
phy_init(void)462*4882a593Smuzhiyun int phy_init(void)
463*4882a593Smuzhiyun {
464*4882a593Smuzhiyun #ifdef CONFIG_MV88E61XX_SWITCH
465*4882a593Smuzhiyun 	phy_mv88e61xx_init();
466*4882a593Smuzhiyun #endif
467*4882a593Smuzhiyun #ifdef CONFIG_PHY_AQUANTIA
468*4882a593Smuzhiyun 	phy_aquantia_init();
469*4882a593Smuzhiyun #endif
470*4882a593Smuzhiyun #ifdef CONFIG_PHY_ATHEROS
471*4882a593Smuzhiyun 	phy_atheros_init();
472*4882a593Smuzhiyun #endif
473*4882a593Smuzhiyun #ifdef CONFIG_PHY_BROADCOM
474*4882a593Smuzhiyun 	phy_broadcom_init();
475*4882a593Smuzhiyun #endif
476*4882a593Smuzhiyun #ifdef CONFIG_PHY_CORTINA
477*4882a593Smuzhiyun 	phy_cortina_init();
478*4882a593Smuzhiyun #endif
479*4882a593Smuzhiyun #ifdef CONFIG_PHY_DAVICOM
480*4882a593Smuzhiyun 	phy_davicom_init();
481*4882a593Smuzhiyun #endif
482*4882a593Smuzhiyun #ifdef CONFIG_PHY_ET1011C
483*4882a593Smuzhiyun 	phy_et1011c_init();
484*4882a593Smuzhiyun #endif
485*4882a593Smuzhiyun #ifdef CONFIG_PHY_LXT
486*4882a593Smuzhiyun 	phy_lxt_init();
487*4882a593Smuzhiyun #endif
488*4882a593Smuzhiyun #ifdef CONFIG_PHY_MARVELL
489*4882a593Smuzhiyun 	phy_marvell_init();
490*4882a593Smuzhiyun #endif
491*4882a593Smuzhiyun #ifdef CONFIG_PHY_MICREL_KSZ8XXX
492*4882a593Smuzhiyun 	phy_micrel_ksz8xxx_init();
493*4882a593Smuzhiyun #endif
494*4882a593Smuzhiyun #ifdef CONFIG_PHY_MICREL_KSZ90X1
495*4882a593Smuzhiyun 	phy_micrel_ksz90x1_init();
496*4882a593Smuzhiyun #endif
497*4882a593Smuzhiyun #ifdef CONFIG_PHY_NATSEMI
498*4882a593Smuzhiyun 	phy_natsemi_init();
499*4882a593Smuzhiyun #endif
500*4882a593Smuzhiyun #ifdef CONFIG_PHY_REALTEK
501*4882a593Smuzhiyun 	phy_realtek_init();
502*4882a593Smuzhiyun #endif
503*4882a593Smuzhiyun #ifdef CONFIG_PHY_RK630
504*4882a593Smuzhiyun 	phy_rk630_init();
505*4882a593Smuzhiyun #endif
506*4882a593Smuzhiyun #ifdef CONFIG_PHY_SMSC
507*4882a593Smuzhiyun 	phy_smsc_init();
508*4882a593Smuzhiyun #endif
509*4882a593Smuzhiyun #ifdef CONFIG_PHY_TERANETICS
510*4882a593Smuzhiyun 	phy_teranetics_init();
511*4882a593Smuzhiyun #endif
512*4882a593Smuzhiyun #ifdef CONFIG_PHY_TI
513*4882a593Smuzhiyun 	phy_ti_init();
514*4882a593Smuzhiyun #endif
515*4882a593Smuzhiyun #ifdef CONFIG_PHY_VITESSE
516*4882a593Smuzhiyun 	phy_vitesse_init();
517*4882a593Smuzhiyun #endif
518*4882a593Smuzhiyun #ifdef CONFIG_PHY_XILINX
519*4882a593Smuzhiyun 	phy_xilinx_init();
520*4882a593Smuzhiyun #endif
521*4882a593Smuzhiyun #ifdef CONFIG_PHY_MSCC
522*4882a593Smuzhiyun 	phy_mscc_init();
523*4882a593Smuzhiyun #endif
524*4882a593Smuzhiyun #ifdef CONFIG_PHY_FIXED
525*4882a593Smuzhiyun 	phy_fixed_init();
526*4882a593Smuzhiyun #endif
527*4882a593Smuzhiyun 	return 0;
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun 
phy_register(struct phy_driver * drv)530*4882a593Smuzhiyun int phy_register(struct phy_driver *drv)
531*4882a593Smuzhiyun {
532*4882a593Smuzhiyun 	INIT_LIST_HEAD(&drv->list);
533*4882a593Smuzhiyun 	list_add_tail(&drv->list, &phy_drivers);
534*4882a593Smuzhiyun 
535*4882a593Smuzhiyun #ifdef CONFIG_NEEDS_MANUAL_RELOC
536*4882a593Smuzhiyun 	if (drv->probe)
537*4882a593Smuzhiyun 		drv->probe += gd->reloc_off;
538*4882a593Smuzhiyun 	if (drv->config)
539*4882a593Smuzhiyun 		drv->config += gd->reloc_off;
540*4882a593Smuzhiyun 	if (drv->startup)
541*4882a593Smuzhiyun 		drv->startup += gd->reloc_off;
542*4882a593Smuzhiyun 	if (drv->shutdown)
543*4882a593Smuzhiyun 		drv->shutdown += gd->reloc_off;
544*4882a593Smuzhiyun 	if (drv->readext)
545*4882a593Smuzhiyun 		drv->readext += gd->reloc_off;
546*4882a593Smuzhiyun 	if (drv->writeext)
547*4882a593Smuzhiyun 		drv->writeext += gd->reloc_off;
548*4882a593Smuzhiyun 	if (drv->read_mmd)
549*4882a593Smuzhiyun 		drv->read_mmd += gd->reloc_off;
550*4882a593Smuzhiyun 	if (drv->write_mmd)
551*4882a593Smuzhiyun 		drv->write_mmd += gd->reloc_off;
552*4882a593Smuzhiyun #endif
553*4882a593Smuzhiyun 	return 0;
554*4882a593Smuzhiyun }
555*4882a593Smuzhiyun 
phy_set_supported(struct phy_device * phydev,u32 max_speed)556*4882a593Smuzhiyun int phy_set_supported(struct phy_device *phydev, u32 max_speed)
557*4882a593Smuzhiyun {
558*4882a593Smuzhiyun 	/* The default values for phydev->supported are provided by the PHY
559*4882a593Smuzhiyun 	 * driver "features" member, we want to reset to sane defaults first
560*4882a593Smuzhiyun 	 * before supporting higher speeds.
561*4882a593Smuzhiyun 	 */
562*4882a593Smuzhiyun 	phydev->supported &= PHY_DEFAULT_FEATURES;
563*4882a593Smuzhiyun 
564*4882a593Smuzhiyun 	switch (max_speed) {
565*4882a593Smuzhiyun 	default:
566*4882a593Smuzhiyun 		return -ENOTSUPP;
567*4882a593Smuzhiyun 	case SPEED_1000:
568*4882a593Smuzhiyun 		phydev->supported |= PHY_1000BT_FEATURES;
569*4882a593Smuzhiyun 		/* fall through */
570*4882a593Smuzhiyun 	case SPEED_100:
571*4882a593Smuzhiyun 		phydev->supported |= PHY_100BT_FEATURES;
572*4882a593Smuzhiyun 		/* fall through */
573*4882a593Smuzhiyun 	case SPEED_10:
574*4882a593Smuzhiyun 		phydev->supported |= PHY_10BT_FEATURES;
575*4882a593Smuzhiyun 	}
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun 	return 0;
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun 
phy_probe(struct phy_device * phydev)580*4882a593Smuzhiyun static int phy_probe(struct phy_device *phydev)
581*4882a593Smuzhiyun {
582*4882a593Smuzhiyun 	int err = 0;
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	phydev->advertising = phydev->supported = phydev->drv->features;
585*4882a593Smuzhiyun 	phydev->mmds = phydev->drv->mmds;
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun 	if (phydev->drv->probe)
588*4882a593Smuzhiyun 		err = phydev->drv->probe(phydev);
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun 	return err;
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun 
generic_for_interface(phy_interface_t interface)593*4882a593Smuzhiyun static struct phy_driver *generic_for_interface(phy_interface_t interface)
594*4882a593Smuzhiyun {
595*4882a593Smuzhiyun #ifdef CONFIG_PHYLIB_10G
596*4882a593Smuzhiyun 	if (is_10g_interface(interface))
597*4882a593Smuzhiyun 		return &gen10g_driver;
598*4882a593Smuzhiyun #endif
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun 	return &genphy_driver;
601*4882a593Smuzhiyun }
602*4882a593Smuzhiyun 
get_phy_driver(struct phy_device * phydev,phy_interface_t interface)603*4882a593Smuzhiyun static struct phy_driver *get_phy_driver(struct phy_device *phydev,
604*4882a593Smuzhiyun 				phy_interface_t interface)
605*4882a593Smuzhiyun {
606*4882a593Smuzhiyun 	struct list_head *entry;
607*4882a593Smuzhiyun 	int phy_id = phydev->phy_id;
608*4882a593Smuzhiyun 	struct phy_driver *drv = NULL;
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun 	list_for_each(entry, &phy_drivers) {
611*4882a593Smuzhiyun 		drv = list_entry(entry, struct phy_driver, list);
612*4882a593Smuzhiyun 		if ((drv->uid & drv->mask) == (phy_id & drv->mask))
613*4882a593Smuzhiyun 			return drv;
614*4882a593Smuzhiyun 	}
615*4882a593Smuzhiyun 
616*4882a593Smuzhiyun 	/* If we made it here, there's no driver for this PHY */
617*4882a593Smuzhiyun 	return generic_for_interface(interface);
618*4882a593Smuzhiyun }
619*4882a593Smuzhiyun 
phy_device_create(struct mii_dev * bus,int addr,u32 phy_id,bool is_c45,phy_interface_t interface)620*4882a593Smuzhiyun static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
621*4882a593Smuzhiyun 					    u32 phy_id, bool is_c45,
622*4882a593Smuzhiyun 					    phy_interface_t interface)
623*4882a593Smuzhiyun {
624*4882a593Smuzhiyun 	struct phy_device *dev;
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun 	/* We allocate the device, and initialize the
627*4882a593Smuzhiyun 	 * default values */
628*4882a593Smuzhiyun 	dev = malloc(sizeof(*dev));
629*4882a593Smuzhiyun 	if (!dev) {
630*4882a593Smuzhiyun 		printf("Failed to allocate PHY device for %s:%d\n",
631*4882a593Smuzhiyun 			bus->name, addr);
632*4882a593Smuzhiyun 		return NULL;
633*4882a593Smuzhiyun 	}
634*4882a593Smuzhiyun 
635*4882a593Smuzhiyun 	memset(dev, 0, sizeof(*dev));
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun 	dev->duplex = -1;
638*4882a593Smuzhiyun 	dev->link = 0;
639*4882a593Smuzhiyun 	dev->interface = interface;
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun #ifdef CONFIG_DM_ETH
642*4882a593Smuzhiyun 	dev->node = ofnode_null();
643*4882a593Smuzhiyun #endif
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun 	dev->autoneg = AUTONEG_ENABLE;
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun 	dev->addr = addr;
648*4882a593Smuzhiyun 	dev->phy_id = phy_id;
649*4882a593Smuzhiyun 	dev->is_c45 = is_c45;
650*4882a593Smuzhiyun 	dev->bus = bus;
651*4882a593Smuzhiyun 
652*4882a593Smuzhiyun 	dev->drv = get_phy_driver(dev, interface);
653*4882a593Smuzhiyun 
654*4882a593Smuzhiyun 	phy_probe(dev);
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun 	bus->phymap[addr] = dev;
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun 	return dev;
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun 
661*4882a593Smuzhiyun /**
662*4882a593Smuzhiyun  * get_phy_id - reads the specified addr for its ID.
663*4882a593Smuzhiyun  * @bus: the target MII bus
664*4882a593Smuzhiyun  * @addr: PHY address on the MII bus
665*4882a593Smuzhiyun  * @phy_id: where to store the ID retrieved.
666*4882a593Smuzhiyun  *
667*4882a593Smuzhiyun  * Description: Reads the ID registers of the PHY at @addr on the
668*4882a593Smuzhiyun  *   @bus, stores it in @phy_id and returns zero on success.
669*4882a593Smuzhiyun  */
get_phy_id(struct mii_dev * bus,int addr,int devad,u32 * phy_id)670*4882a593Smuzhiyun int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
671*4882a593Smuzhiyun {
672*4882a593Smuzhiyun 	int phy_reg;
673*4882a593Smuzhiyun 
674*4882a593Smuzhiyun 	/* Grab the bits from PHYIR1, and put them
675*4882a593Smuzhiyun 	 * in the upper half */
676*4882a593Smuzhiyun 	phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
677*4882a593Smuzhiyun 
678*4882a593Smuzhiyun 	if (phy_reg < 0)
679*4882a593Smuzhiyun 		return -EIO;
680*4882a593Smuzhiyun 
681*4882a593Smuzhiyun 	*phy_id = (phy_reg & 0xffff) << 16;
682*4882a593Smuzhiyun 
683*4882a593Smuzhiyun 	/* Grab the bits from PHYIR2, and put them in the lower half */
684*4882a593Smuzhiyun 	phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun 	if (phy_reg < 0)
687*4882a593Smuzhiyun 		return -EIO;
688*4882a593Smuzhiyun 
689*4882a593Smuzhiyun 	*phy_id |= (phy_reg & 0xffff);
690*4882a593Smuzhiyun 
691*4882a593Smuzhiyun 	return 0;
692*4882a593Smuzhiyun }
693*4882a593Smuzhiyun 
create_phy_by_mask(struct mii_dev * bus,unsigned phy_mask,int devad,phy_interface_t interface)694*4882a593Smuzhiyun static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
695*4882a593Smuzhiyun 		unsigned phy_mask, int devad, phy_interface_t interface)
696*4882a593Smuzhiyun {
697*4882a593Smuzhiyun 	u32 phy_id = 0xffffffff;
698*4882a593Smuzhiyun 	bool is_c45;
699*4882a593Smuzhiyun 
700*4882a593Smuzhiyun 	while (phy_mask) {
701*4882a593Smuzhiyun 		int addr = ffs(phy_mask) - 1;
702*4882a593Smuzhiyun 		int r = get_phy_id(bus, addr, devad, &phy_id);
703*4882a593Smuzhiyun 		/* If the PHY ID is mostly f's, we didn't find anything */
704*4882a593Smuzhiyun 		if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) {
705*4882a593Smuzhiyun 			is_c45 = (devad == MDIO_DEVAD_NONE) ? false : true;
706*4882a593Smuzhiyun 			return phy_device_create(bus, addr, phy_id, is_c45,
707*4882a593Smuzhiyun 						 interface);
708*4882a593Smuzhiyun 		}
709*4882a593Smuzhiyun 		phy_mask &= ~(1 << addr);
710*4882a593Smuzhiyun 	}
711*4882a593Smuzhiyun 	return NULL;
712*4882a593Smuzhiyun }
713*4882a593Smuzhiyun 
search_for_existing_phy(struct mii_dev * bus,unsigned phy_mask,phy_interface_t interface)714*4882a593Smuzhiyun static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
715*4882a593Smuzhiyun 		unsigned phy_mask, phy_interface_t interface)
716*4882a593Smuzhiyun {
717*4882a593Smuzhiyun 	/* If we have one, return the existing device, with new interface */
718*4882a593Smuzhiyun 	while (phy_mask) {
719*4882a593Smuzhiyun 		int addr = ffs(phy_mask) - 1;
720*4882a593Smuzhiyun 		if (bus->phymap[addr]) {
721*4882a593Smuzhiyun 			bus->phymap[addr]->interface = interface;
722*4882a593Smuzhiyun 			return bus->phymap[addr];
723*4882a593Smuzhiyun 		}
724*4882a593Smuzhiyun 		phy_mask &= ~(1 << addr);
725*4882a593Smuzhiyun 	}
726*4882a593Smuzhiyun 	return NULL;
727*4882a593Smuzhiyun }
728*4882a593Smuzhiyun 
get_phy_device_by_mask(struct mii_dev * bus,unsigned phy_mask,phy_interface_t interface)729*4882a593Smuzhiyun static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
730*4882a593Smuzhiyun 		unsigned phy_mask, phy_interface_t interface)
731*4882a593Smuzhiyun {
732*4882a593Smuzhiyun 	int i;
733*4882a593Smuzhiyun 	struct phy_device *phydev;
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun 	phydev = search_for_existing_phy(bus, phy_mask, interface);
736*4882a593Smuzhiyun 	if (phydev)
737*4882a593Smuzhiyun 		return phydev;
738*4882a593Smuzhiyun 	/* Try Standard (ie Clause 22) access */
739*4882a593Smuzhiyun 	/* Otherwise we have to try Clause 45 */
740*4882a593Smuzhiyun 	for (i = 0; i < 5; i++) {
741*4882a593Smuzhiyun 		phydev = create_phy_by_mask(bus, phy_mask,
742*4882a593Smuzhiyun 				i ? i : MDIO_DEVAD_NONE, interface);
743*4882a593Smuzhiyun 		if (IS_ERR(phydev))
744*4882a593Smuzhiyun 			return NULL;
745*4882a593Smuzhiyun 		if (phydev)
746*4882a593Smuzhiyun 			return phydev;
747*4882a593Smuzhiyun 	}
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun 	debug("\n%s PHY: ", bus->name);
750*4882a593Smuzhiyun 	while (phy_mask) {
751*4882a593Smuzhiyun 		int addr = ffs(phy_mask) - 1;
752*4882a593Smuzhiyun 		debug("%d ", addr);
753*4882a593Smuzhiyun 		phy_mask &= ~(1 << addr);
754*4882a593Smuzhiyun 	}
755*4882a593Smuzhiyun 	debug("not found\n");
756*4882a593Smuzhiyun 
757*4882a593Smuzhiyun 	return NULL;
758*4882a593Smuzhiyun }
759*4882a593Smuzhiyun 
760*4882a593Smuzhiyun /**
761*4882a593Smuzhiyun  * get_phy_device - reads the specified PHY device and returns its @phy_device struct
762*4882a593Smuzhiyun  * @bus: the target MII bus
763*4882a593Smuzhiyun  * @addr: PHY address on the MII bus
764*4882a593Smuzhiyun  *
765*4882a593Smuzhiyun  * Description: Reads the ID registers of the PHY at @addr on the
766*4882a593Smuzhiyun  *   @bus, then allocates and returns the phy_device to represent it.
767*4882a593Smuzhiyun  */
get_phy_device(struct mii_dev * bus,int addr,phy_interface_t interface)768*4882a593Smuzhiyun static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
769*4882a593Smuzhiyun 					 phy_interface_t interface)
770*4882a593Smuzhiyun {
771*4882a593Smuzhiyun 	return get_phy_device_by_mask(bus, 1 << addr, interface);
772*4882a593Smuzhiyun }
773*4882a593Smuzhiyun 
phy_reset(struct phy_device * phydev)774*4882a593Smuzhiyun int phy_reset(struct phy_device *phydev)
775*4882a593Smuzhiyun {
776*4882a593Smuzhiyun 	int reg;
777*4882a593Smuzhiyun 	int timeout = 500;
778*4882a593Smuzhiyun 	int devad = MDIO_DEVAD_NONE;
779*4882a593Smuzhiyun 
780*4882a593Smuzhiyun 	if (phydev->flags & PHY_FLAG_BROKEN_RESET)
781*4882a593Smuzhiyun 		return 0;
782*4882a593Smuzhiyun 
783*4882a593Smuzhiyun #ifdef CONFIG_PHYLIB_10G
784*4882a593Smuzhiyun 	/* If it's 10G, we need to issue reset through one of the MMDs */
785*4882a593Smuzhiyun 	if (is_10g_interface(phydev->interface)) {
786*4882a593Smuzhiyun 		if (!phydev->mmds)
787*4882a593Smuzhiyun 			gen10g_discover_mmds(phydev);
788*4882a593Smuzhiyun 
789*4882a593Smuzhiyun 		devad = ffs(phydev->mmds) - 1;
790*4882a593Smuzhiyun 	}
791*4882a593Smuzhiyun #endif
792*4882a593Smuzhiyun 
793*4882a593Smuzhiyun 	if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
794*4882a593Smuzhiyun 		debug("PHY reset failed\n");
795*4882a593Smuzhiyun 		return -1;
796*4882a593Smuzhiyun 	}
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun #ifdef CONFIG_PHY_RESET_DELAY
799*4882a593Smuzhiyun 	udelay(CONFIG_PHY_RESET_DELAY);	/* Intel LXT971A needs this */
800*4882a593Smuzhiyun #endif
801*4882a593Smuzhiyun 	/*
802*4882a593Smuzhiyun 	 * Poll the control register for the reset bit to go to 0 (it is
803*4882a593Smuzhiyun 	 * auto-clearing).  This should happen within 0.5 seconds per the
804*4882a593Smuzhiyun 	 * IEEE spec.
805*4882a593Smuzhiyun 	 */
806*4882a593Smuzhiyun 	reg = phy_read(phydev, devad, MII_BMCR);
807*4882a593Smuzhiyun 	while ((reg & BMCR_RESET) && timeout--) {
808*4882a593Smuzhiyun 		reg = phy_read(phydev, devad, MII_BMCR);
809*4882a593Smuzhiyun 
810*4882a593Smuzhiyun 		if (reg < 0) {
811*4882a593Smuzhiyun 			debug("PHY status read failed\n");
812*4882a593Smuzhiyun 			return -1;
813*4882a593Smuzhiyun 		}
814*4882a593Smuzhiyun 		udelay(1000);
815*4882a593Smuzhiyun 	}
816*4882a593Smuzhiyun 
817*4882a593Smuzhiyun 	if (reg & BMCR_RESET) {
818*4882a593Smuzhiyun 		puts("PHY reset timed out\n");
819*4882a593Smuzhiyun 		return -1;
820*4882a593Smuzhiyun 	}
821*4882a593Smuzhiyun 
822*4882a593Smuzhiyun 	return 0;
823*4882a593Smuzhiyun }
824*4882a593Smuzhiyun 
miiphy_reset(const char * devname,unsigned char addr)825*4882a593Smuzhiyun int miiphy_reset(const char *devname, unsigned char addr)
826*4882a593Smuzhiyun {
827*4882a593Smuzhiyun 	struct mii_dev *bus = miiphy_get_dev_by_name(devname);
828*4882a593Smuzhiyun 	struct phy_device *phydev;
829*4882a593Smuzhiyun 
830*4882a593Smuzhiyun 	/*
831*4882a593Smuzhiyun 	 * miiphy_reset was only used on standard PHYs, so we'll fake it here.
832*4882a593Smuzhiyun 	 * If later code tries to connect with the right interface, this will
833*4882a593Smuzhiyun 	 * be corrected by get_phy_device in phy_connect()
834*4882a593Smuzhiyun 	 */
835*4882a593Smuzhiyun 	phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
836*4882a593Smuzhiyun 
837*4882a593Smuzhiyun 	return phy_reset(phydev);
838*4882a593Smuzhiyun }
839*4882a593Smuzhiyun 
phy_find_by_mask(struct mii_dev * bus,unsigned phy_mask,phy_interface_t interface)840*4882a593Smuzhiyun struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
841*4882a593Smuzhiyun 		phy_interface_t interface)
842*4882a593Smuzhiyun {
843*4882a593Smuzhiyun 	/* Reset the bus */
844*4882a593Smuzhiyun 	if (bus->reset) {
845*4882a593Smuzhiyun 		bus->reset(bus);
846*4882a593Smuzhiyun 
847*4882a593Smuzhiyun 		/* Wait 15ms to make sure the PHY has come out of hard reset */
848*4882a593Smuzhiyun 		udelay(15000);
849*4882a593Smuzhiyun 	}
850*4882a593Smuzhiyun 
851*4882a593Smuzhiyun 	return get_phy_device_by_mask(bus, phy_mask, interface);
852*4882a593Smuzhiyun }
853*4882a593Smuzhiyun 
854*4882a593Smuzhiyun #ifdef CONFIG_DM_ETH
phy_connect_dev(struct phy_device * phydev,struct udevice * dev)855*4882a593Smuzhiyun void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
856*4882a593Smuzhiyun #else
857*4882a593Smuzhiyun void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
858*4882a593Smuzhiyun #endif
859*4882a593Smuzhiyun {
860*4882a593Smuzhiyun 	/* Soft Reset the PHY */
861*4882a593Smuzhiyun 	phy_reset(phydev);
862*4882a593Smuzhiyun 	if (phydev->dev && phydev->dev != dev) {
863*4882a593Smuzhiyun 		printf("%s:%d is connected to %s.  Reconnecting to %s\n",
864*4882a593Smuzhiyun 				phydev->bus->name, phydev->addr,
865*4882a593Smuzhiyun 				phydev->dev->name, dev->name);
866*4882a593Smuzhiyun 	}
867*4882a593Smuzhiyun 	phydev->dev = dev;
868*4882a593Smuzhiyun 	debug("%s connected to %s\n", dev->name, phydev->drv->name);
869*4882a593Smuzhiyun }
870*4882a593Smuzhiyun 
871*4882a593Smuzhiyun #ifdef CONFIG_DM_ETH
phy_connect(struct mii_dev * bus,int addr,struct udevice * dev,phy_interface_t interface)872*4882a593Smuzhiyun struct phy_device *phy_connect(struct mii_dev *bus, int addr,
873*4882a593Smuzhiyun 		struct udevice *dev, phy_interface_t interface)
874*4882a593Smuzhiyun #else
875*4882a593Smuzhiyun struct phy_device *phy_connect(struct mii_dev *bus, int addr,
876*4882a593Smuzhiyun 		struct eth_device *dev, phy_interface_t interface)
877*4882a593Smuzhiyun #endif
878*4882a593Smuzhiyun {
879*4882a593Smuzhiyun 	struct phy_device *phydev = NULL;
880*4882a593Smuzhiyun #ifdef CONFIG_PHY_FIXED
881*4882a593Smuzhiyun 	int sn;
882*4882a593Smuzhiyun 	const char *name;
883*4882a593Smuzhiyun 	sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
884*4882a593Smuzhiyun 	while (sn > 0) {
885*4882a593Smuzhiyun 		name = fdt_get_name(gd->fdt_blob, sn, NULL);
886*4882a593Smuzhiyun 		if (name && strcmp(name, "fixed-link") == 0) {
887*4882a593Smuzhiyun 			phydev = phy_device_create(bus, sn, PHY_FIXED_ID, false,
888*4882a593Smuzhiyun 						   interface);
889*4882a593Smuzhiyun 			break;
890*4882a593Smuzhiyun 		}
891*4882a593Smuzhiyun 		sn = fdt_next_subnode(gd->fdt_blob, sn);
892*4882a593Smuzhiyun 	}
893*4882a593Smuzhiyun #endif
894*4882a593Smuzhiyun 	if (phydev == NULL)
895*4882a593Smuzhiyun 		phydev = phy_find_by_mask(bus, 1 << addr, interface);
896*4882a593Smuzhiyun 
897*4882a593Smuzhiyun 	if (phydev)
898*4882a593Smuzhiyun 		phy_connect_dev(phydev, dev);
899*4882a593Smuzhiyun 	else
900*4882a593Smuzhiyun 		printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
901*4882a593Smuzhiyun 	return phydev;
902*4882a593Smuzhiyun }
903*4882a593Smuzhiyun 
904*4882a593Smuzhiyun /*
905*4882a593Smuzhiyun  * Start the PHY.  Returns 0 on success, or a negative error code.
906*4882a593Smuzhiyun  */
phy_startup(struct phy_device * phydev)907*4882a593Smuzhiyun int phy_startup(struct phy_device *phydev)
908*4882a593Smuzhiyun {
909*4882a593Smuzhiyun 	if (phydev->drv->startup)
910*4882a593Smuzhiyun 		return phydev->drv->startup(phydev);
911*4882a593Smuzhiyun 
912*4882a593Smuzhiyun 	return 0;
913*4882a593Smuzhiyun }
914*4882a593Smuzhiyun 
board_phy_config(struct phy_device * phydev)915*4882a593Smuzhiyun __weak int board_phy_config(struct phy_device *phydev)
916*4882a593Smuzhiyun {
917*4882a593Smuzhiyun 	if (phydev->drv->config)
918*4882a593Smuzhiyun 		return phydev->drv->config(phydev);
919*4882a593Smuzhiyun 	return 0;
920*4882a593Smuzhiyun }
921*4882a593Smuzhiyun 
phy_config(struct phy_device * phydev)922*4882a593Smuzhiyun int phy_config(struct phy_device *phydev)
923*4882a593Smuzhiyun {
924*4882a593Smuzhiyun 	/* Invoke an optional board-specific helper */
925*4882a593Smuzhiyun 	return board_phy_config(phydev);
926*4882a593Smuzhiyun }
927*4882a593Smuzhiyun 
phy_shutdown(struct phy_device * phydev)928*4882a593Smuzhiyun int phy_shutdown(struct phy_device *phydev)
929*4882a593Smuzhiyun {
930*4882a593Smuzhiyun 	if (phydev->drv->shutdown)
931*4882a593Smuzhiyun 		phydev->drv->shutdown(phydev);
932*4882a593Smuzhiyun 
933*4882a593Smuzhiyun 	return 0;
934*4882a593Smuzhiyun }
935*4882a593Smuzhiyun 
phy_get_interface_by_name(const char * str)936*4882a593Smuzhiyun int phy_get_interface_by_name(const char *str)
937*4882a593Smuzhiyun {
938*4882a593Smuzhiyun 	int i;
939*4882a593Smuzhiyun 
940*4882a593Smuzhiyun 	for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
941*4882a593Smuzhiyun 		if (!strcmp(str, phy_interface_strings[i]))
942*4882a593Smuzhiyun 			return i;
943*4882a593Smuzhiyun 	}
944*4882a593Smuzhiyun 
945*4882a593Smuzhiyun 	return -1;
946*4882a593Smuzhiyun }
947