1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * ET1011C PHY driver
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Derived from Linux kernel driver by Chaithrika U S
5*4882a593Smuzhiyun * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun #include <config.h>
10*4882a593Smuzhiyun #include <phy.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #define ET1011C_CONFIG_REG (0x16)
13*4882a593Smuzhiyun #define ET1011C_TX_FIFO_MASK (0x3 << 12)
14*4882a593Smuzhiyun #define ET1011C_TX_FIFO_DEPTH_8 (0x0 << 12)
15*4882a593Smuzhiyun #define ET1011C_TX_FIFO_DEPTH_16 (0x1 << 12)
16*4882a593Smuzhiyun #define ET1011C_INTERFACE_MASK (0x7 << 0)
17*4882a593Smuzhiyun #define ET1011C_GMII_INTERFACE (0x2 << 0)
18*4882a593Smuzhiyun #define ET1011C_SYS_CLK_EN (0x1 << 4)
19*4882a593Smuzhiyun #define ET1011C_TX_CLK_EN (0x1 << 5)
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define ET1011C_STATUS_REG (0x1A)
22*4882a593Smuzhiyun #define ET1011C_DUPLEX_STATUS (0x1 << 7)
23*4882a593Smuzhiyun #define ET1011C_SPEED_MASK (0x3 << 8)
24*4882a593Smuzhiyun #define ET1011C_SPEED_1000 (0x2 << 8)
25*4882a593Smuzhiyun #define ET1011C_SPEED_100 (0x1 << 8)
26*4882a593Smuzhiyun #define ET1011C_SPEED_10 (0x0 << 8)
27*4882a593Smuzhiyun
et1011c_config(struct phy_device * phydev)28*4882a593Smuzhiyun static int et1011c_config(struct phy_device *phydev)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun int ctl = 0;
31*4882a593Smuzhiyun ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
32*4882a593Smuzhiyun if (ctl < 0)
33*4882a593Smuzhiyun return ctl;
34*4882a593Smuzhiyun ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 |
35*4882a593Smuzhiyun BMCR_ANENABLE);
36*4882a593Smuzhiyun /* First clear the PHY */
37*4882a593Smuzhiyun phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl | BMCR_RESET);
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun return genphy_config_aneg(phydev);
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
et1011c_parse_status(struct phy_device * phydev)42*4882a593Smuzhiyun static int et1011c_parse_status(struct phy_device *phydev)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun int mii_reg;
45*4882a593Smuzhiyun int speed;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, ET1011C_STATUS_REG);
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun if (mii_reg & ET1011C_DUPLEX_STATUS)
50*4882a593Smuzhiyun phydev->duplex = DUPLEX_FULL;
51*4882a593Smuzhiyun else
52*4882a593Smuzhiyun phydev->duplex = DUPLEX_HALF;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun speed = mii_reg & ET1011C_SPEED_MASK;
55*4882a593Smuzhiyun switch (speed) {
56*4882a593Smuzhiyun case ET1011C_SPEED_1000:
57*4882a593Smuzhiyun phydev->speed = SPEED_1000;
58*4882a593Smuzhiyun mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, ET1011C_CONFIG_REG);
59*4882a593Smuzhiyun mii_reg &= ~ET1011C_TX_FIFO_MASK;
60*4882a593Smuzhiyun phy_write(phydev, MDIO_DEVAD_NONE, ET1011C_CONFIG_REG,
61*4882a593Smuzhiyun mii_reg |
62*4882a593Smuzhiyun ET1011C_GMII_INTERFACE |
63*4882a593Smuzhiyun ET1011C_SYS_CLK_EN |
64*4882a593Smuzhiyun #ifdef CONFIG_PHY_ET1011C_TX_CLK_FIX
65*4882a593Smuzhiyun ET1011C_TX_CLK_EN |
66*4882a593Smuzhiyun #endif
67*4882a593Smuzhiyun ET1011C_TX_FIFO_DEPTH_16);
68*4882a593Smuzhiyun break;
69*4882a593Smuzhiyun case ET1011C_SPEED_100:
70*4882a593Smuzhiyun phydev->speed = SPEED_100;
71*4882a593Smuzhiyun break;
72*4882a593Smuzhiyun case ET1011C_SPEED_10:
73*4882a593Smuzhiyun phydev->speed = SPEED_10;
74*4882a593Smuzhiyun break;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun return 0;
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
et1011c_startup(struct phy_device * phydev)80*4882a593Smuzhiyun static int et1011c_startup(struct phy_device *phydev)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun int ret;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun ret = genphy_update_link(phydev);
85*4882a593Smuzhiyun if (ret)
86*4882a593Smuzhiyun return ret;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun return et1011c_parse_status(phydev);
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun static struct phy_driver et1011c_driver = {
92*4882a593Smuzhiyun .name = "ET1011C",
93*4882a593Smuzhiyun .uid = 0x0282f014,
94*4882a593Smuzhiyun .mask = 0xfffffff0,
95*4882a593Smuzhiyun .features = PHY_GBIT_FEATURES,
96*4882a593Smuzhiyun .config = &et1011c_config,
97*4882a593Smuzhiyun .startup = &et1011c_startup,
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun
phy_et1011c_init(void)100*4882a593Smuzhiyun int phy_et1011c_init(void)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun phy_register(&et1011c_driver);
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun return 0;
105*4882a593Smuzhiyun }
106